?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_82598.c
blob6321b059ce132f2e7c252f4856754a501262c381
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/pci.h>
30 #include <linux/delay.h>
31 #include <linux/sched.h>
32
33 #include "ixgbe.h"
34 #include "ixgbe_phy.h"
35
36 #define IXGBE_82598_MAX_TX_QUEUES 32
37 #define IXGBE_82598_MAX_RX_QUEUES 64
38 #define IXGBE_82598_RAR_ENTRIES 16
39
40 static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
41 static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
42 bool *autoneg);
43 static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
44 u32 *speed, bool *autoneg);
45 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
46 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
47 static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
48 bool *link_up);
49 static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
50 bool autoneg,
51 bool autoneg_wait_to_complete);
52 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
53 static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
54 bool autoneg,
55 bool autoneg_wait_to_complete);
56 static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
57
58
59 static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
60 {
61 hw->mac.num_rx_queues = IXGBE_82598_MAX_TX_QUEUES;
62 hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES;
63 hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
64
65 /* PHY ops are filled in by default properly for Fiber only */
66 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
67 hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
68 hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
69 hw->mac.ops.get_link_settings =
70 &ixgbe_get_copper_link_settings_82598;
71
72 /* Call PHY identify routine to get the phy type */
73 ixgbe_identify_phy(hw);
74
75 switch (hw->phy.type) {
76 case ixgbe_phy_tn:
77 hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
78 hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
79 hw->phy.ops.setup_link_speed =
80 &ixgbe_setup_tnx_phy_link_speed;
81 break;
82 default:
83 break;
84 }
85 }
86
87 return 0;
88 }
89
90 /**
91 * ixgbe_get_link_settings_82598 - Determines default link settings
92 * @hw: pointer to hardware structure
93 * @speed: pointer to link speed
94 * @autoneg: boolean auto-negotiation value
95 *
96 * Determines the default link settings by reading the AUTOC register.
97 **/
98 static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
99 bool *autoneg)
100 {
101 s32 status = 0;
102 s32 autoc_reg;
103
104 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
105
106 if (hw->mac.link_settings_loaded) {
107 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
108 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
109 autoc_reg |= hw->mac.link_attach_type;
110 autoc_reg |= hw->mac.link_mode_select;
111 }
112
113 switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
114 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
115 *speed = IXGBE_LINK_SPEED_1GB_FULL;
116 *autoneg = false;
117 break;
118
119 case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
120 *speed = IXGBE_LINK_SPEED_10GB_FULL;
121 *autoneg = false;
122 break;
123
124 case IXGBE_AUTOC_LMS_1G_AN:
125 *speed = IXGBE_LINK_SPEED_1GB_FULL;
126 *autoneg = true;
127 break;
128
129 case IXGBE_AUTOC_LMS_KX4_AN:
130 case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
131 *speed = IXGBE_LINK_SPEED_UNKNOWN;
132 if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
133 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
134 if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
135 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
136 *autoneg = true;
137 break;
138
139 default:
140 status = IXGBE_ERR_LINK_SETUP;
141 break;
142 }
143
144 return status;
145 }
146
147 /**
148 * ixgbe_get_copper_link_settings_82598 - Determines default link settings
149 * @hw: pointer to hardware structure
150 * @speed: pointer to link speed
151 * @autoneg: boolean auto-negotiation value
152 *
153 * Determines the default link settings by reading the AUTOC register.
154 **/
155 static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
156 u32 *speed, bool *autoneg)
157 {
158 s32 status = IXGBE_ERR_LINK_SETUP;
159 u16 speed_ability;
160
161 *speed = 0;
162 *autoneg = true;
163
164 status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
165 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
166 &speed_ability);
167
168 if (status == 0) {
169 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
170 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
171 if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
172 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
173 }
174
175 return status;
176 }
177
178 /**
179 * ixgbe_get_media_type_82598 - Determines media type
180 * @hw: pointer to hardware structure
181 *
182 * Returns the media type (fiber, copper, backplane)
183 **/
184 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
185 {
186 enum ixgbe_media_type media_type;
187
188 /* Media type for I82598 is based on device ID */
189 switch (hw->device_id) {
190 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
191 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
192 case IXGBE_DEV_ID_82598EB_CX4:
193 media_type = ixgbe_media_type_fiber;
194 break;
195 case IXGBE_DEV_ID_82598AT_DUAL_PORT:
196 media_type = ixgbe_media_type_copper;
197 break;
198 default:
199 media_type = ixgbe_media_type_unknown;
200 break;
201 }
202
203 return media_type;
204 }
205
206 /**
207 * ixgbe_setup_mac_link_82598 - Configures MAC link settings
208 * @hw: pointer to hardware structure
209 *
210 * Configures link settings based on values in the ixgbe_hw struct.
211 * Restarts the link. Performs autonegotiation if needed.
212 **/
213 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
214 {
215 u32 autoc_reg;
216 u32 links_reg;
217 u32 i;
218 s32 status = 0;
219
220 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
221
222 if (hw->mac.link_settings_loaded) {
223 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
224 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
225 autoc_reg |= hw->mac.link_attach_type;
226 autoc_reg |= hw->mac.link_mode_select;
227
228 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
229 IXGBE_WRITE_FLUSH(hw);
230 msleep(50);
231 }
232
233 /* Restart link */
234 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
235 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
236
237 /* Only poll for autoneg to complete if specified to do so */
238 if (hw->phy.autoneg_wait_to_complete) {
239 if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
240 hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
241 links_reg = 0; /* Just in case Autoneg time = 0 */
242 for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
243 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
244 if (links_reg & IXGBE_LINKS_KX_AN_COMP)
245 break;
246 msleep(100);
247 }
248 if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
249 status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
250 hw_dbg(hw,
251 "Autonegotiation did not complete.\n");
252 }
253 }
254 }
255
256 /*
257 * We want to save off the original Flow Control configuration just in
258 * case we get disconnected and then reconnected into a different hub
259 * or switch with different Flow Control capabilities.
260 */
261 hw->fc.type = hw->fc.original_type;
262 ixgbe_setup_fc(hw, 0);
263
264 /* Add delay to filter out noises during initial link setup */
265 msleep(50);
266
267 return status;
268 }
269
270 /**
271 * ixgbe_check_mac_link_82598 - Get link/speed status
272 * @hw: pointer to hardware structure
273 * @speed: pointer to link speed
274 * @link_up: true is link is up, false otherwise
275 *
276 * Reads the links register to determine if link is up and the current speed
277 **/
278 static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
279 bool *link_up)
280 {
281 u32 links_reg;
282
283 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
284
285 if (links_reg & IXGBE_LINKS_UP)
286 *link_up = true;
287 else
288 *link_up = false;
289
290 if (links_reg & IXGBE_LINKS_SPEED)
291 *speed = IXGBE_LINK_SPEED_10GB_FULL;
292 else
293 *speed = IXGBE_LINK_SPEED_1GB_FULL;
294
295 return 0;
296 }
297
298 /**
299 * ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
300 * @hw: pointer to hardware structure
301 * @speed: new link speed
302 * @autoneg: true if auto-negotiation enabled
303 * @autoneg_wait_to_complete: true if waiting is needed to complete
304 *
305 * Set the link speed in the AUTOC register and restarts link.
306 **/
307 static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
308 u32 speed, bool autoneg,
309 bool autoneg_wait_to_complete)
310 {
311 s32 status = 0;
312
313 /* If speed is 10G, then check for CX4 or XAUI. */
314 if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
315 (!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
316 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
317 else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
318 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
319 else if (autoneg) {
320 /* BX mode - Autonegotiate 1G */
321 if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
322 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
323 else /* KX/KX4 mode */
324 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
325 } else {
326 status = IXGBE_ERR_LINK_SETUP;
327 }
328
329 if (status == 0) {
330 hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
331
332 hw->mac.link_settings_loaded = true;
333 /*
334 * Setup and restart the link based on the new values in
335 * ixgbe_hw This will write the AUTOC register based on the new
336 * stored values
337 */
338 hw->mac.ops.setup_link(hw);
339 }
340
341 return status;
342 }
343
344
345 /**
346 * ixgbe_setup_copper_link_82598 - Setup copper link settings
347 * @hw: pointer to hardware structure
348 *
349 * Configures link settings based on values in the ixgbe_hw struct.
350 * Restarts the link. Performs autonegotiation if needed. Restart
351 * phy and wait for autonegotiate to finish. Then synchronize the
352 * MAC and PHY.
353 **/
354 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
355 {
356 s32 status = 0;
357
358 /* Restart autonegotiation on PHY */
359 if (hw->phy.ops.setup_link)
360 status = hw->phy.ops.setup_link(hw);
361
362 /* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
363 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
364 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
365
366 /* Set up MAC */
367 hw->mac.ops.setup_link(hw);
368
369 return status;
370 }
371
372 /**
373 * ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
374 * @hw: pointer to hardware structure
375 * @speed: new link speed
376 * @autoneg: true if autonegotiation enabled
377 * @autoneg_wait_to_complete: true if waiting is needed to complete
378 *
379 * Sets the link speed in the AUTOC register in the MAC and restarts link.
380 **/
381 static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
382 bool autoneg,
383 bool autoneg_wait_to_complete)
384 {
385 s32 status = 0;
386
387 /* Setup the PHY according to input speed */
388 if (hw->phy.ops.setup_link_speed)
389 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
390 autoneg_wait_to_complete);
391
392 /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
393 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
394 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
395
396 /* Set up MAC */
397 hw->mac.ops.setup_link(hw);
398
399 return status;
400 }
401
402 /**
403 * ixgbe_reset_hw_82598 - Performs hardware reset
404 * @hw: pointer to hardware structure
405 *
406 * Resets the hardware by reseting the transmit and receive units, masks and
407 * clears all interrupts, performing a PHY reset, and performing a link (MAC)
408 * reset.
409 **/
410 static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
411 {
412 s32 status = 0;
413 u32 ctrl;
414 u32 gheccr;
415 u32 i;
416 u32 autoc;
417 u8 analog_val;
418
419 /* Call adapter stop to disable tx/rx and clear interrupts */
420 ixgbe_stop_adapter(hw);
421
422 /*
423 * Power up the Atlas TX lanes if they are currently powered down.
424 * Atlas TX lanes are powered down for MAC loopback tests, but
425 * they are not automatically restored on reset.
426 */
427 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
428 if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
429 /* Enable TX Atlas so packets can be transmitted again */
430 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
431 analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
432 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val);
433
434 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val);
435 analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
436 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val);
437
438 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val);
439 analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
440 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val);
441
442 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val);
443 analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
444 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val);
445 }
446
447 /* Reset PHY */
448 ixgbe_reset_phy(hw);
449
450 /*
451 * Prevent the PCI-E bus from from hanging by disabling PCI-E master
452 * access and verify no pending requests before reset
453 */
454 if (ixgbe_disable_pcie_master(hw) != 0) {
455 status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
456 hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
457 }
458
459 /*
460 * Issue global reset to the MAC. This needs to be a SW reset.
461 * If link reset is used, it might reset the MAC when mng is using it
462 */
463 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
464 IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
465 IXGBE_WRITE_FLUSH(hw);
466
467 /* Poll for reset bit to self-clear indicating reset is complete */
468 for (i = 0; i < 10; i++) {
469 udelay(1);
470 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
471 if (!(ctrl & IXGBE_CTRL_RST))
472 break;
473 }
474 if (ctrl & IXGBE_CTRL_RST) {
475 status = IXGBE_ERR_RESET_FAILED;
476 hw_dbg(hw, "Reset polling failed to complete.\n");
477 }
478
479 msleep(50);
480
481 gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
482 gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
483 IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
484
485 /*
486 * AUTOC register which stores link settings gets cleared
487 * and reloaded from EEPROM after reset. We need to restore
488 * our stored value from init in case SW changed the attach
489 * type or speed. If this is the first time and link settings
490 * have not been stored, store default settings from AUTOC.
491 */
492 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
493 if (hw->mac.link_settings_loaded) {
494 autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
495 autoc &= ~(IXGBE_AUTOC_LMS_MASK);
496 autoc |= hw->mac.link_attach_type;
497 autoc |= hw->mac.link_mode_select;
498 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
499 } else {
500 hw->mac.link_attach_type =
501 (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
502 hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
503 hw->mac.link_settings_loaded = true;
504 }
505
506 /* Store the permanent mac address */
507 ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
508
509 return status;
510 }
511
512 static struct ixgbe_mac_operations mac_ops_82598 = {
513 .reset = &ixgbe_reset_hw_82598,
514 .get_media_type = &ixgbe_get_media_type_82598,
515 .setup_link = &ixgbe_setup_mac_link_82598,
516 .check_link = &ixgbe_check_mac_link_82598,
517 .setup_link_speed = &ixgbe_setup_mac_link_speed_82598,
518 .get_link_settings = &ixgbe_get_link_settings_82598,
519 };
520
521 struct ixgbe_info ixgbe_82598_info = {
522 .mac = ixgbe_mac_82598EB,
523 .get_invariants = &ixgbe_get_invariants_82598,
524 .mac_ops = &mac_ops_82598,
525 };
526
WRT350N Kernel Patches