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x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_ethtool.c
blob36353447716ddeedbe75095a7f3ee1c96f1ebd03
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for ixgbe */
30
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
38
39 #include "ixgbe.h"
40
41
42 #define IXGBE_ALL_RAR_ENTRIES 16
43
44 struct ixgbe_stats {
45 char stat_string[ETH_GSTRING_LEN];
46 int sizeof_stat;
47 int stat_offset;
48 };
49
50 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
51 offsetof(struct ixgbe_adapter, m)
52 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
53 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
54 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
55 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
56 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
57 {"lsc_int", IXGBE_STAT(lsc_int)},
58 {"tx_busy", IXGBE_STAT(tx_busy)},
59 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
60 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
61 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
62 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
63 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
64 {"multicast", IXGBE_STAT(net_stats.multicast)},
65 {"broadcast", IXGBE_STAT(stats.bprc)},
66 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
67 {"collisions", IXGBE_STAT(net_stats.collisions)},
68 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
69 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
70 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
71 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
72 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
73 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
74 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
75 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
76 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
77 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
78 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
79 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
80 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
81 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
82 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
83 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
84 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
85 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
86 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
87 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
88 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
89 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
90 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
91 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
92 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
93 };
94
95 #define IXGBE_QUEUE_STATS_LEN \
96 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
97 ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
98 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
99 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
100 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
101
102 static int ixgbe_get_settings(struct net_device *netdev,
103 struct ethtool_cmd *ecmd)
104 {
105 struct ixgbe_adapter *adapter = netdev_priv(netdev);
106
107 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
108 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
109 ecmd->port = PORT_FIBRE;
110 ecmd->transceiver = XCVR_EXTERNAL;
111
112 if (netif_carrier_ok(adapter->netdev)) {
113 ecmd->speed = SPEED_10000;
114 ecmd->duplex = DUPLEX_FULL;
115 } else {
116 ecmd->speed = -1;
117 ecmd->duplex = -1;
118 }
119
120 ecmd->autoneg = AUTONEG_DISABLE;
121 return 0;
122 }
123
124 static int ixgbe_set_settings(struct net_device *netdev,
125 struct ethtool_cmd *ecmd)
126 {
127 struct ixgbe_adapter *adapter = netdev_priv(netdev);
128
129 if (ecmd->autoneg == AUTONEG_ENABLE ||
130 ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)
131 return -EINVAL;
132
133 if (netif_running(adapter->netdev)) {
134 ixgbe_down(adapter);
135 ixgbe_reset(adapter);
136 ixgbe_up(adapter);
137 } else {
138 ixgbe_reset(adapter);
139 }
140
141 return 0;
142 }
143
144 static void ixgbe_get_pauseparam(struct net_device *netdev,
145 struct ethtool_pauseparam *pause)
146 {
147 struct ixgbe_adapter *adapter = netdev_priv(netdev);
148 struct ixgbe_hw *hw = &adapter->hw;
149
150 pause->autoneg = AUTONEG_DISABLE;
151
152 if (hw->fc.type == ixgbe_fc_rx_pause) {
153 pause->rx_pause = 1;
154 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
155 pause->tx_pause = 1;
156 } else if (hw->fc.type == ixgbe_fc_full) {
157 pause->rx_pause = 1;
158 pause->tx_pause = 1;
159 }
160 }
161
162 static int ixgbe_set_pauseparam(struct net_device *netdev,
163 struct ethtool_pauseparam *pause)
164 {
165 struct ixgbe_adapter *adapter = netdev_priv(netdev);
166 struct ixgbe_hw *hw = &adapter->hw;
167
168 if (pause->autoneg == AUTONEG_ENABLE)
169 return -EINVAL;
170
171 if (pause->rx_pause && pause->tx_pause)
172 hw->fc.type = ixgbe_fc_full;
173 else if (pause->rx_pause && !pause->tx_pause)
174 hw->fc.type = ixgbe_fc_rx_pause;
175 else if (!pause->rx_pause && pause->tx_pause)
176 hw->fc.type = ixgbe_fc_tx_pause;
177 else if (!pause->rx_pause && !pause->tx_pause)
178 hw->fc.type = ixgbe_fc_none;
179
180 hw->fc.original_type = hw->fc.type;
181
182 if (netif_running(adapter->netdev)) {
183 ixgbe_down(adapter);
184 ixgbe_up(adapter);
185 } else {
186 ixgbe_reset(adapter);
187 }
188
189 return 0;
190 }
191
192 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
193 {
194 struct ixgbe_adapter *adapter = netdev_priv(netdev);
195 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
196 }
197
198 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
199 {
200 struct ixgbe_adapter *adapter = netdev_priv(netdev);
201 if (data)
202 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
203 else
204 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
205
206 if (netif_running(netdev)) {
207 ixgbe_down(adapter);
208 ixgbe_up(adapter);
209 } else {
210 ixgbe_reset(adapter);
211 }
212
213 return 0;
214 }
215
216 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
217 {
218 return (netdev->features & NETIF_F_HW_CSUM) != 0;
219 }
220
221 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
222 {
223 if (data)
224 netdev->features |= NETIF_F_HW_CSUM;
225 else
226 netdev->features &= ~NETIF_F_HW_CSUM;
227
228 return 0;
229 }
230
231 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
232 {
233
234 if (data) {
235 netdev->features |= NETIF_F_TSO;
236 netdev->features |= NETIF_F_TSO6;
237 } else {
238 netdev->features &= ~NETIF_F_TSO;
239 netdev->features &= ~NETIF_F_TSO6;
240 }
241 return 0;
242 }
243
244 static u32 ixgbe_get_msglevel(struct net_device *netdev)
245 {
246 struct ixgbe_adapter *adapter = netdev_priv(netdev);
247 return adapter->msg_enable;
248 }
249
250 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
251 {
252 struct ixgbe_adapter *adapter = netdev_priv(netdev);
253 adapter->msg_enable = data;
254 }
255
256 static int ixgbe_get_regs_len(struct net_device *netdev)
257 {
258 #define IXGBE_REGS_LEN 1128
259 return IXGBE_REGS_LEN * sizeof(u32);
260 }
261
262 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
263
264 static void ixgbe_get_regs(struct net_device *netdev,
265 struct ethtool_regs *regs, void *p)
266 {
267 struct ixgbe_adapter *adapter = netdev_priv(netdev);
268 struct ixgbe_hw *hw = &adapter->hw;
269 u32 *regs_buff = p;
270 u8 i;
271
272 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
273
274 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
275
276 /* General Registers */
277 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
278 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
279 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
280 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
281 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
282 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
283 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
284 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
285
286 /* NVM Register */
287 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
288 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
289 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
290 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
291 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
292 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
293 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
294 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
295 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
296 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
297
298 /* Interrupt */
299 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
300 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
301 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
302 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
303 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
304 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
305 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
306 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
307 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
308 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
309 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL);
310 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
311
312 /* Flow Control */
313 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
314 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
315 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
316 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
317 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
318 for (i = 0; i < 8; i++)
319 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
320 for (i = 0; i < 8; i++)
321 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
322 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
323 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
324
325 /* Receive DMA */
326 for (i = 0; i < 64; i++)
327 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
328 for (i = 0; i < 64; i++)
329 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
330 for (i = 0; i < 64; i++)
331 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
332 for (i = 0; i < 64; i++)
333 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
334 for (i = 0; i < 64; i++)
335 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
336 for (i = 0; i < 64; i++)
337 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
338 for (i = 0; i < 16; i++)
339 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
340 for (i = 0; i < 16; i++)
341 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
342 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
343 for (i = 0; i < 8; i++)
344 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
345 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
346 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
347
348 /* Receive */
349 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
350 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
351 for (i = 0; i < 16; i++)
352 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
353 for (i = 0; i < 16; i++)
354 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
355 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE);
356 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
357 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
358 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
359 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
360 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
361 for (i = 0; i < 8; i++)
362 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
363 for (i = 0; i < 8; i++)
364 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
365 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
366
367 /* Transmit */
368 for (i = 0; i < 32; i++)
369 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
370 for (i = 0; i < 32; i++)
371 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
372 for (i = 0; i < 32; i++)
373 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
374 for (i = 0; i < 32; i++)
375 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
376 for (i = 0; i < 32; i++)
377 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
378 for (i = 0; i < 32; i++)
379 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
380 for (i = 0; i < 32; i++)
381 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
382 for (i = 0; i < 32; i++)
383 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
384 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
385 for (i = 0; i < 16; i++)
386 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
387 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
388 for (i = 0; i < 8; i++)
389 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
390 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
391
392 /* Wake Up */
393 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
394 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
395 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
396 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
397 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
398 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
399 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
400 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
401 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
402
403 /* DCE */
404 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
405 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
406 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
407 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
408 for (i = 0; i < 8; i++)
409 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
410 for (i = 0; i < 8; i++)
411 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
412 for (i = 0; i < 8; i++)
413 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
414 for (i = 0; i < 8; i++)
415 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
416 for (i = 0; i < 8; i++)
417 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
418 for (i = 0; i < 8; i++)
419 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
420
421 /* Statistics */
422 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
423 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
424 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
425 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
426 for (i = 0; i < 8; i++)
427 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
428 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
429 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
430 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
431 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
432 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
433 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
434 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
435 for (i = 0; i < 8; i++)
436 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
437 for (i = 0; i < 8; i++)
438 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
439 for (i = 0; i < 8; i++)
440 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
441 for (i = 0; i < 8; i++)
442 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
443 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
444 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
445 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
446 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
447 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
448 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
449 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
450 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
451 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
452 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
453 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
454 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
455 for (i = 0; i < 8; i++)
456 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
457 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
458 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
459 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
460 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
461 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
462 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
463 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
464 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
465 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
466 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
467 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
468 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
469 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
470 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
471 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
472 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
473 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
474 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
475 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
476 for (i = 0; i < 16; i++)
477 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
478 for (i = 0; i < 16; i++)
479 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
480 for (i = 0; i < 16; i++)
481 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
482 for (i = 0; i < 16; i++)
483 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
484
485 /* MAC */
486 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
487 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
488 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
489 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
490 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
491 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
492 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
493 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
494 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
495 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
496 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
497 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
498 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
499 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
500 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
501 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
502 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
503 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
504 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
505 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
506 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
507 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
508 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
509 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
510 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
511 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
512 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
513 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
514 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
515 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
516 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
517 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
518 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
519
520 /* Diagnostic */
521 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
522 for (i = 0; i < 8; i++)
523 regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
524 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
525 regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
526 regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
527 regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
528 regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
529 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
530 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
531 for (i = 0; i < 8; i++)
532 regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
533 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
534 regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
535 regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
536 regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
537 regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
538 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
539 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
540 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
541 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
542 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
543 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
544 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
545 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
546 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
547 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
548 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
549 for (i = 0; i < 8; i++)
550 regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
551 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
552 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
553 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
554 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
555 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
556 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
557 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
558 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
559 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
560 }
561
562 static int ixgbe_get_eeprom_len(struct net_device *netdev)
563 {
564 struct ixgbe_adapter *adapter = netdev_priv(netdev);
565 return adapter->hw.eeprom.word_size * 2;
566 }
567
568 static int ixgbe_get_eeprom(struct net_device *netdev,
569 struct ethtool_eeprom *eeprom, u8 *bytes)
570 {
571 struct ixgbe_adapter *adapter = netdev_priv(netdev);
572 struct ixgbe_hw *hw = &adapter->hw;
573 u16 *eeprom_buff;
574 int first_word, last_word, eeprom_len;
575 int ret_val = 0;
576 u16 i;
577
578 if (eeprom->len == 0)
579 return -EINVAL;
580
581 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
582
583 first_word = eeprom->offset >> 1;
584 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
585 eeprom_len = last_word - first_word + 1;
586
587 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
588 if (!eeprom_buff)
589 return -ENOMEM;
590
591 for (i = 0; i < eeprom_len; i++) {
592 if ((ret_val = ixgbe_read_eeprom(hw, first_word + i,
593 &eeprom_buff[i])))
594 break;
595 }
596
597 /* Device's eeprom is always little-endian, word addressable */
598 for (i = 0; i < eeprom_len; i++)
599 le16_to_cpus(&eeprom_buff[i]);
600
601 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
602 kfree(eeprom_buff);
603
604 return ret_val;
605 }
606
607 static void ixgbe_get_drvinfo(struct net_device *netdev,
608 struct ethtool_drvinfo *drvinfo)
609 {
610 struct ixgbe_adapter *adapter = netdev_priv(netdev);
611
612 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
613 strncpy(drvinfo->version, ixgbe_driver_version, 32);
614 strncpy(drvinfo->fw_version, "N/A", 32);
615 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
616 drvinfo->n_stats = IXGBE_STATS_LEN;
617 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
618 }
619
620 static void ixgbe_get_ringparam(struct net_device *netdev,
621 struct ethtool_ringparam *ring)
622 {
623 struct ixgbe_adapter *adapter = netdev_priv(netdev);
624 struct ixgbe_ring *tx_ring = adapter->tx_ring;
625 struct ixgbe_ring *rx_ring = adapter->rx_ring;
626
627 ring->rx_max_pending = IXGBE_MAX_RXD;
628 ring->tx_max_pending = IXGBE_MAX_TXD;
629 ring->rx_mini_max_pending = 0;
630 ring->rx_jumbo_max_pending = 0;
631 ring->rx_pending = rx_ring->count;
632 ring->tx_pending = tx_ring->count;
633 ring->rx_mini_pending = 0;
634 ring->rx_jumbo_pending = 0;
635 }
636
637 static int ixgbe_set_ringparam(struct net_device *netdev,
638 struct ethtool_ringparam *ring)
639 {
640 struct ixgbe_adapter *adapter = netdev_priv(netdev);
641 struct ixgbe_tx_buffer *old_buf;
642 struct ixgbe_rx_buffer *old_rx_buf;
643 void *old_desc;
644 int i, err;
645 u32 new_rx_count, new_tx_count, old_size;
646 dma_addr_t old_dma;
647
648 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
649 return -EINVAL;
650
651 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
652 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
653 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
654
655 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
656 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
657 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
658
659 if ((new_tx_count == adapter->tx_ring->count) &&
660 (new_rx_count == adapter->rx_ring->count)) {
661 /* nothing to do */
662 return 0;
663 }
664
665 if (netif_running(adapter->netdev))
666 ixgbe_down(adapter);
667
668 /*
669 * We can't just free everything and then setup again,
670 * because the ISRs in MSI-X mode get passed pointers
671 * to the tx and rx ring structs.
672 */
673 if (new_tx_count != adapter->tx_ring->count) {
674 for (i = 0; i < adapter->num_tx_queues; i++) {
675 /* Save existing descriptor ring */
676 old_buf = adapter->tx_ring[i].tx_buffer_info;
677 old_desc = adapter->tx_ring[i].desc;
678 old_size = adapter->tx_ring[i].size;
679 old_dma = adapter->tx_ring[i].dma;
680 /* Try to allocate a new one */
681 adapter->tx_ring[i].tx_buffer_info = NULL;
682 adapter->tx_ring[i].desc = NULL;
683 adapter->tx_ring[i].count = new_tx_count;
684 err = ixgbe_setup_tx_resources(adapter,
685 &adapter->tx_ring[i]);
686 if (err) {
687 /* Restore the old one so at least
688 the adapter still works, even if
689 we failed the request */
690 adapter->tx_ring[i].tx_buffer_info = old_buf;
691 adapter->tx_ring[i].desc = old_desc;
692 adapter->tx_ring[i].size = old_size;
693 adapter->tx_ring[i].dma = old_dma;
694 goto err_setup;
695 }
696 /* Free the old buffer manually */
697 vfree(old_buf);
698 pci_free_consistent(adapter->pdev, old_size,
699 old_desc, old_dma);
700 }
701 }
702
703 if (new_rx_count != adapter->rx_ring->count) {
704 for (i = 0; i < adapter->num_rx_queues; i++) {
705
706 old_rx_buf = adapter->rx_ring[i].rx_buffer_info;
707 old_desc = adapter->rx_ring[i].desc;
708 old_size = adapter->rx_ring[i].size;
709 old_dma = adapter->rx_ring[i].dma;
710
711 adapter->rx_ring[i].rx_buffer_info = NULL;
712 adapter->rx_ring[i].desc = NULL;
713 adapter->rx_ring[i].dma = 0;
714 adapter->rx_ring[i].count = new_rx_count;
715 err = ixgbe_setup_rx_resources(adapter,
716 &adapter->rx_ring[i]);
717 if (err) {
718 adapter->rx_ring[i].rx_buffer_info = old_rx_buf;
719 adapter->rx_ring[i].desc = old_desc;
720 adapter->rx_ring[i].size = old_size;
721 adapter->rx_ring[i].dma = old_dma;
722 goto err_setup;
723 }
724
725 vfree(old_rx_buf);
726 pci_free_consistent(adapter->pdev, old_size, old_desc,
727 old_dma);
728 }
729 }
730
731 err = 0;
732 err_setup:
733 if (netif_running(adapter->netdev))
734 ixgbe_up(adapter);
735
736 return err;
737 }
738
739 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
740 {
741 switch (sset) {
742 case ETH_SS_STATS:
743 return IXGBE_STATS_LEN;
744 default:
745 return -EOPNOTSUPP;
746 }
747 }
748
749 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
750 struct ethtool_stats *stats, u64 *data)
751 {
752 struct ixgbe_adapter *adapter = netdev_priv(netdev);
753 u64 *queue_stat;
754 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
755 int j, k;
756 int i;
757
758 ixgbe_update_stats(adapter);
759 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
760 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
761 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
762 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
763 }
764 for (j = 0; j < adapter->num_tx_queues; j++) {
765 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
766 for (k = 0; k < stat_count; k++)
767 data[i + k] = queue_stat[k];
768 i += k;
769 }
770 for (j = 0; j < adapter->num_rx_queues; j++) {
771 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
772 for (k = 0; k < stat_count; k++)
773 data[i + k] = queue_stat[k];
774 i += k;
775 }
776 }
777
778 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
779 u8 *data)
780 {
781 struct ixgbe_adapter *adapter = netdev_priv(netdev);
782 u8 *p = data;
783 int i;
784
785 switch (stringset) {
786 case ETH_SS_STATS:
787 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
788 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
789 ETH_GSTRING_LEN);
790 p += ETH_GSTRING_LEN;
791 }
792 for (i = 0; i < adapter->num_tx_queues; i++) {
793 sprintf(p, "tx_queue_%u_packets", i);
794 p += ETH_GSTRING_LEN;
795 sprintf(p, "tx_queue_%u_bytes", i);
796 p += ETH_GSTRING_LEN;
797 }
798 for (i = 0; i < adapter->num_rx_queues; i++) {
799 sprintf(p, "rx_queue_%u_packets", i);
800 p += ETH_GSTRING_LEN;
801 sprintf(p, "rx_queue_%u_bytes", i);
802 p += ETH_GSTRING_LEN;
803 }
804 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
805 break;
806 }
807 }
808
809
810 static void ixgbe_get_wol(struct net_device *netdev,
811 struct ethtool_wolinfo *wol)
812 {
813 wol->supported = 0;
814 wol->wolopts = 0;
815
816 return;
817 }
818
819 static int ixgbe_nway_reset(struct net_device *netdev)
820 {
821 struct ixgbe_adapter *adapter = netdev_priv(netdev);
822
823 if (netif_running(netdev)) {
824 ixgbe_down(adapter);
825 ixgbe_reset(adapter);
826 ixgbe_up(adapter);
827 }
828
829 return 0;
830 }
831
832 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
833 {
834 struct ixgbe_adapter *adapter = netdev_priv(netdev);
835 u32 led_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_LEDCTL);
836 u32 i;
837
838 if (!data || data > 300)
839 data = 300;
840
841 for (i = 0; i < (data * 1000); i += 400) {
842 ixgbe_led_on(&adapter->hw, IXGBE_LED_ON);
843 msleep_interruptible(200);
844 ixgbe_led_off(&adapter->hw, IXGBE_LED_ON);
845 msleep_interruptible(200);
846 }
847
848 /* Restore LED settings */
849 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
850
851 return 0;
852 }
853
854 static int ixgbe_get_coalesce(struct net_device *netdev,
855 struct ethtool_coalesce *ec)
856 {
857 struct ixgbe_adapter *adapter = netdev_priv(netdev);
858
859 if (adapter->rx_eitr == 0)
860 ec->rx_coalesce_usecs = 0;
861 else
862 ec->rx_coalesce_usecs = 1000000 / adapter->rx_eitr;
863
864 if (adapter->tx_eitr == 0)
865 ec->tx_coalesce_usecs = 0;
866 else
867 ec->tx_coalesce_usecs = 1000000 / adapter->tx_eitr;
868
869 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
870 return 0;
871 }
872
873 static int ixgbe_set_coalesce(struct net_device *netdev,
874 struct ethtool_coalesce *ec)
875 {
876 struct ixgbe_adapter *adapter = netdev_priv(netdev);
877
878 if ((ec->rx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
879 ((ec->rx_coalesce_usecs > 0) &&
880 (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
881 return -EINVAL;
882 if ((ec->tx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
883 ((ec->tx_coalesce_usecs > 0) &&
884 (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
885 return -EINVAL;
886
887 /* convert to rate of irq's per second */
888 if (ec->rx_coalesce_usecs == 0)
889 adapter->rx_eitr = 0;
890 else
891 adapter->rx_eitr = (1000000 / ec->rx_coalesce_usecs);
892
893 if (ec->tx_coalesce_usecs == 0)
894 adapter->tx_eitr = 0;
895 else
896 adapter->tx_eitr = (1000000 / ec->tx_coalesce_usecs);
897
898 if (ec->tx_max_coalesced_frames_irq)
899 adapter->tx_ring[0].work_limit =
900 ec->tx_max_coalesced_frames_irq;
901
902 if (netif_running(netdev)) {
903 ixgbe_down(adapter);
904 ixgbe_up(adapter);
905 }
906
907 return 0;
908 }
909
910
911 static struct ethtool_ops ixgbe_ethtool_ops = {
912 .get_settings = ixgbe_get_settings,
913 .set_settings = ixgbe_set_settings,
914 .get_drvinfo = ixgbe_get_drvinfo,
915 .get_regs_len = ixgbe_get_regs_len,
916 .get_regs = ixgbe_get_regs,
917 .get_wol = ixgbe_get_wol,
918 .nway_reset = ixgbe_nway_reset,
919 .get_link = ethtool_op_get_link,
920 .get_eeprom_len = ixgbe_get_eeprom_len,
921 .get_eeprom = ixgbe_get_eeprom,
922 .get_ringparam = ixgbe_get_ringparam,
923 .set_ringparam = ixgbe_set_ringparam,
924 .get_pauseparam = ixgbe_get_pauseparam,
925 .set_pauseparam = ixgbe_set_pauseparam,
926 .get_rx_csum = ixgbe_get_rx_csum,
927 .set_rx_csum = ixgbe_set_rx_csum,
928 .get_tx_csum = ixgbe_get_tx_csum,
929 .set_tx_csum = ixgbe_set_tx_csum,
930 .get_sg = ethtool_op_get_sg,
931 .set_sg = ethtool_op_set_sg,
932 .get_msglevel = ixgbe_get_msglevel,
933 .set_msglevel = ixgbe_set_msglevel,
934 .get_tso = ethtool_op_get_tso,
935 .set_tso = ixgbe_set_tso,
936 .get_strings = ixgbe_get_strings,
937 .phys_id = ixgbe_phys_id,
938 .get_sset_count = ixgbe_get_sset_count,
939 .get_ethtool_stats = ixgbe_get_ethtool_stats,
940 .get_coalesce = ixgbe_get_coalesce,
941 .set_coalesce = ixgbe_set_coalesce,
942 };
943
944 void ixgbe_set_ethtool_ops(struct net_device *netdev)
945 {
946 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
947 }
WRT350N Kernel Patches