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x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_main.c
blob3732dd6c4b2a81fe5de5ed2883f51f082aa9b897
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
35 #include <linux/in.h>
36 #include <linux/ip.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43
44 #include "ixgbe.h"
45 #include "ixgbe_common.h"
46
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
50
51 #define DRV_VERSION "1.1.18"
52 const char ixgbe_driver_version[] = DRV_VERSION;
53 static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
55
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info,
58 };
59
60 /* ixgbe_pci_tbl - PCI Device ID Table
61 *
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
70 board_82598 },
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
72 board_82598 },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
74 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
76 board_82598 },
77
78 /* required last entry */
79 {0, }
80 };
81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82
83 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
85 MODULE_LICENSE("GPL");
86 MODULE_VERSION(DRV_VERSION);
87
88 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90
91 #ifdef DEBUG
92 /**
93 * ixgbe_get_hw_dev_name - return device name string
94 * used by hardware layer to print debugging information
95 **/
96 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
97 {
98 struct ixgbe_adapter *adapter = hw->back;
99 struct net_device *netdev = adapter->netdev;
100 return netdev->name;
101 }
102 #endif
103
104 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
105 u8 msix_vector)
106 {
107 u32 ivar, index;
108
109 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
110 index = (int_alloc_entry >> 2) & 0x1F;
111 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
112 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
113 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
114 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
115 }
116
117 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
118 struct ixgbe_tx_buffer
119 *tx_buffer_info)
120 {
121 if (tx_buffer_info->dma) {
122 pci_unmap_page(adapter->pdev,
123 tx_buffer_info->dma,
124 tx_buffer_info->length, PCI_DMA_TODEVICE);
125 tx_buffer_info->dma = 0;
126 }
127 if (tx_buffer_info->skb) {
128 dev_kfree_skb_any(tx_buffer_info->skb);
129 tx_buffer_info->skb = NULL;
130 }
131 /* tx_buffer_info must be completely set up in the transmit path */
132 }
133
134 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
135 struct ixgbe_ring *tx_ring,
136 unsigned int eop,
137 union ixgbe_adv_tx_desc *eop_desc)
138 {
139 /* Detect a transmit hang in hardware, this serializes the
140 * check with the clearing of time_stamp and movement of i */
141 adapter->detect_tx_hung = false;
142 if (tx_ring->tx_buffer_info[eop].dma &&
143 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
144 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
145 /* detected Tx unit hang */
146 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
147 " TDH <%x>\n"
148 " TDT <%x>\n"
149 " next_to_use <%x>\n"
150 " next_to_clean <%x>\n"
151 "tx_buffer_info[next_to_clean]\n"
152 " time_stamp <%lx>\n"
153 " next_to_watch <%x>\n"
154 " jiffies <%lx>\n"
155 " next_to_watch.status <%x>\n",
156 readl(adapter->hw.hw_addr + tx_ring->head),
157 readl(adapter->hw.hw_addr + tx_ring->tail),
158 tx_ring->next_to_use,
159 tx_ring->next_to_clean,
160 tx_ring->tx_buffer_info[eop].time_stamp,
161 eop, jiffies, eop_desc->wb.status);
162 return true;
163 }
164
165 return false;
166 }
167
168 /**
169 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
170 * @adapter: board private structure
171 **/
172 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
173 struct ixgbe_ring *tx_ring)
174 {
175 struct net_device *netdev = adapter->netdev;
176 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
177 struct ixgbe_tx_buffer *tx_buffer_info;
178 unsigned int i, eop;
179 bool cleaned = false;
180 int count = 0;
181
182 i = tx_ring->next_to_clean;
183 eop = tx_ring->tx_buffer_info[i].next_to_watch;
184 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
185 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
186 for (cleaned = false; !cleaned;) {
187 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
188 tx_buffer_info = &tx_ring->tx_buffer_info[i];
189 cleaned = (i == eop);
190
191 tx_ring->stats.bytes += tx_buffer_info->length;
192 ixgbe_unmap_and_free_tx_resource(adapter,
193 tx_buffer_info);
194 tx_desc->wb.status = 0;
195
196 i++;
197 if (i == tx_ring->count)
198 i = 0;
199 }
200
201 tx_ring->stats.packets++;
202
203 eop = tx_ring->tx_buffer_info[i].next_to_watch;
204 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
205
206 /* weight of a sort for tx, avoid endless transmit cleanup */
207 if (count++ >= tx_ring->work_limit)
208 break;
209 }
210
211 tx_ring->next_to_clean = i;
212
213 #define TX_WAKE_THRESHOLD 32
214 spin_lock(&tx_ring->tx_lock);
215
216 if (cleaned && netif_carrier_ok(netdev) &&
217 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD) &&
218 !test_bit(__IXGBE_DOWN, &adapter->state))
219 netif_wake_queue(netdev);
220
221 spin_unlock(&tx_ring->tx_lock);
222
223 if (adapter->detect_tx_hung)
224 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
225 netif_stop_queue(netdev);
226
227 if (count >= tx_ring->work_limit)
228 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
229
230 return cleaned;
231 }
232
233 /**
234 * ixgbe_receive_skb - Send a completed packet up the stack
235 * @adapter: board private structure
236 * @skb: packet to send up
237 * @is_vlan: packet has a VLAN tag
238 * @tag: VLAN tag from descriptor
239 **/
240 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
241 struct sk_buff *skb, bool is_vlan,
242 u16 tag)
243 {
244 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
245 if (adapter->vlgrp && is_vlan)
246 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
247 else
248 netif_receive_skb(skb);
249 } else {
250
251 if (adapter->vlgrp && is_vlan)
252 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
253 else
254 netif_rx(skb);
255 }
256 }
257
258 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
259 u32 status_err,
260 struct sk_buff *skb)
261 {
262 skb->ip_summed = CHECKSUM_NONE;
263
264 /* Ignore Checksum bit is set */
265 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
266 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
267 return;
268 /* TCP/UDP checksum error bit is set */
269 if (status_err & (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE)) {
270 /* let the stack verify checksum errors */
271 adapter->hw_csum_rx_error++;
272 return;
273 }
274 /* It must be a TCP or UDP packet with a valid checksum */
275 if (status_err & (IXGBE_RXD_STAT_L4CS | IXGBE_RXD_STAT_UDPCS))
276 skb->ip_summed = CHECKSUM_UNNECESSARY;
277 adapter->hw_csum_rx_good++;
278 }
279
280 /**
281 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
282 * @adapter: address of board private structure
283 **/
284 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
285 struct ixgbe_ring *rx_ring,
286 int cleaned_count)
287 {
288 struct net_device *netdev = adapter->netdev;
289 struct pci_dev *pdev = adapter->pdev;
290 union ixgbe_adv_rx_desc *rx_desc;
291 struct ixgbe_rx_buffer *rx_buffer_info;
292 struct sk_buff *skb;
293 unsigned int i;
294 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
295
296 i = rx_ring->next_to_use;
297 rx_buffer_info = &rx_ring->rx_buffer_info[i];
298
299 while (cleaned_count--) {
300 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
301
302 if (!rx_buffer_info->page &&
303 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
304 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
305 if (!rx_buffer_info->page) {
306 adapter->alloc_rx_page_failed++;
307 goto no_buffers;
308 }
309 rx_buffer_info->page_dma =
310 pci_map_page(pdev, rx_buffer_info->page,
311 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
312 }
313
314 if (!rx_buffer_info->skb) {
315 skb = netdev_alloc_skb(netdev, bufsz);
316
317 if (!skb) {
318 adapter->alloc_rx_buff_failed++;
319 goto no_buffers;
320 }
321
322 /*
323 * Make buffer alignment 2 beyond a 16 byte boundary
324 * this will result in a 16 byte aligned IP header after
325 * the 14 byte MAC header is removed
326 */
327 skb_reserve(skb, NET_IP_ALIGN);
328
329 rx_buffer_info->skb = skb;
330 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
331 bufsz,
332 PCI_DMA_FROMDEVICE);
333 }
334 /* Refresh the desc even if buffer_addrs didn't change because
335 * each write-back erases this info. */
336 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
337 rx_desc->read.pkt_addr =
338 cpu_to_le64(rx_buffer_info->page_dma);
339 rx_desc->read.hdr_addr =
340 cpu_to_le64(rx_buffer_info->dma);
341 } else {
342 rx_desc->read.pkt_addr =
343 cpu_to_le64(rx_buffer_info->dma);
344 }
345
346 i++;
347 if (i == rx_ring->count)
348 i = 0;
349 rx_buffer_info = &rx_ring->rx_buffer_info[i];
350 }
351 no_buffers:
352 if (rx_ring->next_to_use != i) {
353 rx_ring->next_to_use = i;
354 if (i-- == 0)
355 i = (rx_ring->count - 1);
356
357 /*
358 * Force memory writes to complete before letting h/w
359 * know there are new descriptors to fetch. (Only
360 * applicable for weak-ordered memory model archs,
361 * such as IA-64).
362 */
363 wmb();
364 writel(i, adapter->hw.hw_addr + rx_ring->tail);
365 }
366 }
367
368 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
369 struct ixgbe_ring *rx_ring,
370 int *work_done, int work_to_do)
371 {
372 struct net_device *netdev = adapter->netdev;
373 struct pci_dev *pdev = adapter->pdev;
374 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
375 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
376 struct sk_buff *skb;
377 unsigned int i;
378 u32 upper_len, len, staterr;
379 u16 hdr_info, vlan_tag;
380 bool is_vlan, cleaned = false;
381 int cleaned_count = 0;
382
383 i = rx_ring->next_to_clean;
384 upper_len = 0;
385 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
386 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
387 rx_buffer_info = &rx_ring->rx_buffer_info[i];
388 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
389 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
390
391 while (staterr & IXGBE_RXD_STAT_DD) {
392 if (*work_done >= work_to_do)
393 break;
394 (*work_done)++;
395
396 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
397 hdr_info =
398 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
399 len =
400 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
401 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
402 if (hdr_info & IXGBE_RXDADV_SPH)
403 adapter->rx_hdr_split++;
404 if (len > IXGBE_RX_HDR_SIZE)
405 len = IXGBE_RX_HDR_SIZE;
406 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
407 } else
408 len = le16_to_cpu(rx_desc->wb.upper.length);
409
410 cleaned = true;
411 skb = rx_buffer_info->skb;
412 prefetch(skb->data - NET_IP_ALIGN);
413 rx_buffer_info->skb = NULL;
414
415 if (len && !skb_shinfo(skb)->nr_frags) {
416 pci_unmap_single(pdev, rx_buffer_info->dma,
417 adapter->rx_buf_len + NET_IP_ALIGN,
418 PCI_DMA_FROMDEVICE);
419 skb_put(skb, len);
420 }
421
422 if (upper_len) {
423 pci_unmap_page(pdev, rx_buffer_info->page_dma,
424 PAGE_SIZE, PCI_DMA_FROMDEVICE);
425 rx_buffer_info->page_dma = 0;
426 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
427 rx_buffer_info->page, 0, upper_len);
428 rx_buffer_info->page = NULL;
429
430 skb->len += upper_len;
431 skb->data_len += upper_len;
432 skb->truesize += upper_len;
433 }
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_buffer = &rx_ring->rx_buffer_info[i];
439
440 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
441 prefetch(next_rxd);
442
443 cleaned_count++;
444 if (staterr & IXGBE_RXD_STAT_EOP) {
445 rx_ring->stats.packets++;
446 rx_ring->stats.bytes += skb->len;
447 } else {
448 rx_buffer_info->skb = next_buffer->skb;
449 rx_buffer_info->dma = next_buffer->dma;
450 next_buffer->skb = skb;
451 adapter->non_eop_descs++;
452 goto next_desc;
453 }
454
455 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
456 dev_kfree_skb_irq(skb);
457 goto next_desc;
458 }
459
460 ixgbe_rx_checksum(adapter, staterr, skb);
461 skb->protocol = eth_type_trans(skb, netdev);
462 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
463 netdev->last_rx = jiffies;
464
465 next_desc:
466 rx_desc->wb.upper.status_error = 0;
467
468 /* return some buffers to hardware, one at a time is too slow */
469 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
470 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
471 cleaned_count = 0;
472 }
473
474 /* use prefetched values */
475 rx_desc = next_rxd;
476 rx_buffer_info = next_buffer;
477
478 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
479 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
480 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
481 }
482
483 rx_ring->next_to_clean = i;
484 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
485
486 if (cleaned_count)
487 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
488
489 return cleaned;
490 }
491
492 #define IXGBE_MAX_INTR 10
493 /**
494 * ixgbe_configure_msix - Configure MSI-X hardware
495 * @adapter: board private structure
496 *
497 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
498 * interrupts.
499 **/
500 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
501 {
502 int i, vector = 0;
503
504 for (i = 0; i < adapter->num_tx_queues; i++) {
505 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
506 IXGBE_MSIX_VECTOR(vector));
507 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
508 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
509 vector++;
510 }
511
512 for (i = 0; i < adapter->num_rx_queues; i++) {
513 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
514 IXGBE_MSIX_VECTOR(vector));
515 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
516 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
517 vector++;
518 }
519
520 vector = adapter->num_tx_queues + adapter->num_rx_queues;
521 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
522 IXGBE_MSIX_VECTOR(vector));
523 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
524 }
525
526 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
527 {
528 struct net_device *netdev = data;
529 struct ixgbe_adapter *adapter = netdev_priv(netdev);
530 struct ixgbe_hw *hw = &adapter->hw;
531 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
532
533 if (eicr & IXGBE_EICR_LSC) {
534 adapter->lsc_int++;
535 if (!test_bit(__IXGBE_DOWN, &adapter->state))
536 mod_timer(&adapter->watchdog_timer, jiffies);
537 }
538 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
539
540 return IRQ_HANDLED;
541 }
542
543 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
544 {
545 struct ixgbe_ring *txr = data;
546 struct ixgbe_adapter *adapter = txr->adapter;
547
548 ixgbe_clean_tx_irq(adapter, txr);
549
550 return IRQ_HANDLED;
551 }
552
553 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
554 {
555 struct ixgbe_ring *rxr = data;
556 struct ixgbe_adapter *adapter = rxr->adapter;
557
558 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
559 netif_rx_schedule(adapter->netdev, &adapter->napi);
560 return IRQ_HANDLED;
561 }
562
563 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
564 {
565 struct ixgbe_adapter *adapter = container_of(napi,
566 struct ixgbe_adapter, napi);
567 struct net_device *netdev = adapter->netdev;
568 int work_done = 0;
569 struct ixgbe_ring *rxr = adapter->rx_ring;
570
571 /* Keep link state information with original netdev */
572 if (!netif_carrier_ok(netdev))
573 goto quit_polling;
574
575 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
576
577 /* If no Tx and not enough Rx work done, exit the polling mode */
578 if ((work_done < budget) || !netif_running(netdev)) {
579 quit_polling:
580 netif_rx_complete(netdev, napi);
581 if (!test_bit(__IXGBE_DOWN, &adapter->state))
582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
583 rxr->eims_value);
584 }
585
586 return work_done;
587 }
588
589 /**
590 * ixgbe_setup_msix - Initialize MSI-X interrupts
591 *
592 * ixgbe_setup_msix allocates MSI-X vectors and requests
593 * interrutps from the kernel.
594 **/
595 static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
596 {
597 struct net_device *netdev = adapter->netdev;
598 int i, int_vector = 0, err = 0;
599 int max_msix_count;
600
601 /* +1 for the LSC interrupt */
602 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
603 adapter->msix_entries = kcalloc(max_msix_count,
604 sizeof(struct msix_entry), GFP_KERNEL);
605 if (!adapter->msix_entries)
606 return -ENOMEM;
607
608 for (i = 0; i < max_msix_count; i++)
609 adapter->msix_entries[i].entry = i;
610
611 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
612 max_msix_count);
613 if (err)
614 goto out;
615
616 for (i = 0; i < adapter->num_tx_queues; i++) {
617 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
618 err = request_irq(adapter->msix_entries[int_vector].vector,
619 &ixgbe_msix_clean_tx,
620 0,
621 adapter->tx_ring[i].name,
622 &(adapter->tx_ring[i]));
623 if (err) {
624 DPRINTK(PROBE, ERR,
625 "request_irq failed for MSIX interrupt "
626 "Error: %d\n", err);
627 goto release_irqs;
628 }
629 adapter->tx_ring[i].eims_value =
630 (1 << IXGBE_MSIX_VECTOR(int_vector));
631 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
632 int_vector++;
633 }
634
635 for (i = 0; i < adapter->num_rx_queues; i++) {
636 if (strlen(netdev->name) < (IFNAMSIZ - 5))
637 sprintf(adapter->rx_ring[i].name,
638 "%s-rx%d", netdev->name, i);
639 else
640 memcpy(adapter->rx_ring[i].name,
641 netdev->name, IFNAMSIZ);
642 err = request_irq(adapter->msix_entries[int_vector].vector,
643 &ixgbe_msix_clean_rx, 0,
644 adapter->rx_ring[i].name,
645 &(adapter->rx_ring[i]));
646 if (err) {
647 DPRINTK(PROBE, ERR,
648 "request_irq failed for MSIX interrupt "
649 "Error: %d\n", err);
650 goto release_irqs;
651 }
652
653 adapter->rx_ring[i].eims_value =
654 (1 << IXGBE_MSIX_VECTOR(int_vector));
655 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
656 int_vector++;
657 }
658
659 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
660 err = request_irq(adapter->msix_entries[int_vector].vector,
661 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
662 if (err) {
663 DPRINTK(PROBE, ERR,
664 "request_irq for msix_lsc failed: %d\n", err);
665 goto release_irqs;
666 }
667
668 /* FIXME: implement netif_napi_remove() instead */
669 adapter->napi.poll = ixgbe_clean_rxonly;
670 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
671 return 0;
672
673 release_irqs:
674 int_vector--;
675 for (; int_vector >= adapter->num_tx_queues; int_vector--)
676 free_irq(adapter->msix_entries[int_vector].vector,
677 &(adapter->rx_ring[int_vector -
678 adapter->num_tx_queues]));
679
680 for (; int_vector >= 0; int_vector--)
681 free_irq(adapter->msix_entries[int_vector].vector,
682 &(adapter->tx_ring[int_vector]));
683 out:
684 kfree(adapter->msix_entries);
685 adapter->msix_entries = NULL;
686 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
687 return err;
688 }
689
690 /**
691 * ixgbe_intr - Interrupt Handler
692 * @irq: interrupt number
693 * @data: pointer to a network interface device structure
694 * @pt_regs: CPU registers structure
695 **/
696 static irqreturn_t ixgbe_intr(int irq, void *data)
697 {
698 struct net_device *netdev = data;
699 struct ixgbe_adapter *adapter = netdev_priv(netdev);
700 struct ixgbe_hw *hw = &adapter->hw;
701 u32 eicr;
702
703 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
704
705 if (!eicr)
706 return IRQ_NONE; /* Not our interrupt */
707
708 if (eicr & IXGBE_EICR_LSC) {
709 adapter->lsc_int++;
710 if (!test_bit(__IXGBE_DOWN, &adapter->state))
711 mod_timer(&adapter->watchdog_timer, jiffies);
712 }
713 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
714 /* Disable interrupts and register for poll. The flush of the
715 * posted write is intentionally left out. */
716 atomic_inc(&adapter->irq_sem);
717 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
718 __netif_rx_schedule(netdev, &adapter->napi);
719 }
720
721 return IRQ_HANDLED;
722 }
723
724 /**
725 * ixgbe_request_irq - initialize interrupts
726 * @adapter: board private structure
727 *
728 * Attempts to configure interrupts using the best available
729 * capabilities of the hardware and kernel.
730 **/
731 static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
732 {
733 struct net_device *netdev = adapter->netdev;
734 int flags, err;
735 irq_handler_t handler = ixgbe_intr;
736
737 flags = IRQF_SHARED;
738
739 err = ixgbe_setup_msix(adapter);
740 if (!err)
741 goto request_done;
742
743 /*
744 * if we can't do MSI-X, fall through and try MSI
745 * No need to reallocate memory since we're decreasing the number of
746 * queues. We just won't use the other ones, also it is freed correctly
747 * on ixgbe_remove.
748 */
749 *num_rx_queues = 1;
750
751 /* do MSI */
752 err = pci_enable_msi(adapter->pdev);
753 if (!err) {
754 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
755 flags &= ~IRQF_SHARED;
756 handler = &ixgbe_intr;
757 }
758
759 err = request_irq(adapter->pdev->irq, handler, flags,
760 netdev->name, netdev);
761 if (err)
762 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
763
764 request_done:
765 return err;
766 }
767
768 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
769 {
770 struct net_device *netdev = adapter->netdev;
771
772 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
773 int i;
774
775 for (i = 0; i < adapter->num_tx_queues; i++)
776 free_irq(adapter->msix_entries[i].vector,
777 &(adapter->tx_ring[i]));
778 for (i = 0; i < adapter->num_rx_queues; i++)
779 free_irq(adapter->msix_entries[i +
780 adapter->num_tx_queues].vector,
781 &(adapter->rx_ring[i]));
782 i = adapter->num_rx_queues + adapter->num_tx_queues;
783 free_irq(adapter->msix_entries[i].vector, netdev);
784 pci_disable_msix(adapter->pdev);
785 kfree(adapter->msix_entries);
786 adapter->msix_entries = NULL;
787 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
788 return;
789 }
790
791 free_irq(adapter->pdev->irq, netdev);
792 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
793 pci_disable_msi(adapter->pdev);
794 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
795 }
796 }
797
798 /**
799 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
800 * @adapter: board private structure
801 **/
802 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
803 {
804 atomic_inc(&adapter->irq_sem);
805 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
806 IXGBE_WRITE_FLUSH(&adapter->hw);
807 synchronize_irq(adapter->pdev->irq);
808 }
809
810 /**
811 * ixgbe_irq_enable - Enable default interrupt generation settings
812 * @adapter: board private structure
813 **/
814 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
815 {
816 if (atomic_dec_and_test(&adapter->irq_sem)) {
817 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
818 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
819 (IXGBE_EIMS_ENABLE_MASK &
820 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
821 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
822 IXGBE_EIMS_ENABLE_MASK);
823 IXGBE_WRITE_FLUSH(&adapter->hw);
824 }
825 }
826
827 /**
828 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
829 *
830 **/
831 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
832 {
833 int i;
834 struct ixgbe_hw *hw = &adapter->hw;
835
836 if (adapter->rx_eitr)
837 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
838 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
839
840 /* for re-triggering the interrupt in non-NAPI mode */
841 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
842 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
843
844 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
845 for (i = 0; i < adapter->num_tx_queues; i++)
846 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
847 }
848
849 /**
850 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
851 * @adapter: board private structure
852 *
853 * Configure the Tx unit of the MAC after a reset.
854 **/
855 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
856 {
857 u64 tdba;
858 struct ixgbe_hw *hw = &adapter->hw;
859 u32 i, tdlen;
860
861 /* Setup the HW Tx Head and Tail descriptor pointers */
862 for (i = 0; i < adapter->num_tx_queues; i++) {
863 tdba = adapter->tx_ring[i].dma;
864 tdlen = adapter->tx_ring[i].count *
865 sizeof(union ixgbe_adv_tx_desc);
866 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
867 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
868 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
869 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
870 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
871 adapter->tx_ring[i].head = IXGBE_TDH(i);
872 adapter->tx_ring[i].tail = IXGBE_TDT(i);
873 }
874
875 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
876 }
877
878 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
879 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
880
881 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
882 /**
883 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
884 * @adapter: board private structure
885 *
886 * Configure the Rx unit of the MAC after a reset.
887 **/
888 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
889 {
890 u64 rdba;
891 struct ixgbe_hw *hw = &adapter->hw;
892 struct net_device *netdev = adapter->netdev;
893 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
894 u32 rdlen, rxctrl, rxcsum;
895 u32 random[10];
896 u32 reta, mrqc;
897 int i;
898 u32 fctrl, hlreg0;
899 u32 srrctl;
900 u32 pages;
901
902 /* Decide whether to use packet split mode or not */
903 if (netdev->mtu > ETH_DATA_LEN)
904 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
905 else
906 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
907
908 /* Set the RX buffer length according to the mode */
909 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
910 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
911 } else {
912 if (netdev->mtu <= ETH_DATA_LEN)
913 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
914 else
915 adapter->rx_buf_len = ALIGN(max_frame, 1024);
916 }
917
918 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
919 fctrl |= IXGBE_FCTRL_BAM;
920 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
921
922 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
923 if (adapter->netdev->mtu <= ETH_DATA_LEN)
924 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
925 else
926 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
927 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
928
929 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
930
931 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
932 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
933 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
934
935 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
936 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
937 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
938 srrctl |= ((IXGBE_RX_HDR_SIZE <<
939 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
940 IXGBE_SRRCTL_BSIZEHDR_MASK);
941 } else {
942 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
943
944 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
945 srrctl |=
946 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
947 else
948 srrctl |=
949 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
950 }
951 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
952
953 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
954 /* disable receives while setting up the descriptors */
955 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
956 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
957
958 /* Setup the HW Rx Head and Tail Descriptor Pointers and
959 * the Base and Length of the Rx Descriptor Ring */
960 for (i = 0; i < adapter->num_rx_queues; i++) {
961 rdba = adapter->rx_ring[i].dma;
962 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
963 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
964 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
965 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
966 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
967 adapter->rx_ring[i].head = IXGBE_RDH(i);
968 adapter->rx_ring[i].tail = IXGBE_RDT(i);
969 }
970
971 if (adapter->num_rx_queues > 1) {
972 /* Random 40bytes used as random key in RSS hash function */
973 get_random_bytes(&random[0], 40);
974
975 switch (adapter->num_rx_queues) {
976 case 8:
977 case 4:
978 /* Bits [3:0] in each byte refers the Rx queue no */
979 reta = 0x00010203;
980 break;
981 case 2:
982 reta = 0x00010001;
983 break;
984 default:
985 reta = 0x00000000;
986 break;
987 }
988
989 /* Fill out redirection table */
990 for (i = 0; i < 32; i++) {
991 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
992 if (adapter->num_rx_queues > 4) {
993 i++;
994 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
995 0x04050607);
996 }
997 }
998
999 /* Fill out hash function seeds */
1000 for (i = 0; i < 10; i++)
1001 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1002
1003 mrqc = IXGBE_MRQC_RSSEN
1004 /* Perform hash on these packet types */
1005 | IXGBE_MRQC_RSS_FIELD_IPV4
1006 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1007 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1008 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1009 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1010 | IXGBE_MRQC_RSS_FIELD_IPV6
1011 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1012 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1013 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1014 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1015
1016 /* Multiqueue and packet checksumming are mutually exclusive. */
1017 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1018 rxcsum |= IXGBE_RXCSUM_PCSD;
1019 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1020 } else {
1021 /* Enable Receive Checksum Offload for TCP and UDP */
1022 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1023 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1024 /* Enable IPv4 payload checksum for UDP fragments
1025 * Must be used in conjunction with packet-split. */
1026 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1027 } else {
1028 /* don't need to clear IPPCSE as it defaults to 0 */
1029 }
1030 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1031 }
1032 /* Enable Receives */
1033 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1034 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1035 }
1036
1037 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1038 struct vlan_group *grp)
1039 {
1040 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1041 u32 ctrl;
1042
1043 ixgbe_irq_disable(adapter);
1044 adapter->vlgrp = grp;
1045
1046 if (grp) {
1047 /* enable VLAN tag insert/strip */
1048 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1049 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1050 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1051 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1052 }
1053
1054 ixgbe_irq_enable(adapter);
1055 }
1056
1057 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1058 {
1059 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1060
1061 /* add VID to filter table */
1062 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1063 }
1064
1065 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1066 {
1067 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1068
1069 ixgbe_irq_disable(adapter);
1070 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1071 ixgbe_irq_enable(adapter);
1072
1073 /* remove VID from filter table */
1074 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1075 }
1076
1077 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1078 {
1079 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1080
1081 if (adapter->vlgrp) {
1082 u16 vid;
1083 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1084 if (!vlan_group_get_device(adapter->vlgrp, vid))
1085 continue;
1086 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1087 }
1088 }
1089 }
1090
1091 /**
1092 * ixgbe_set_multi - Multicast and Promiscuous mode set
1093 * @netdev: network interface device structure
1094 *
1095 * The set_multi entry point is called whenever the multicast address
1096 * list or the network interface flags are updated. This routine is
1097 * responsible for configuring the hardware for proper multicast,
1098 * promiscuous mode, and all-multi behavior.
1099 **/
1100 static void ixgbe_set_multi(struct net_device *netdev)
1101 {
1102 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1103 struct ixgbe_hw *hw = &adapter->hw;
1104 struct dev_mc_list *mc_ptr;
1105 u8 *mta_list;
1106 u32 fctrl;
1107 int i;
1108
1109 /* Check for Promiscuous and All Multicast modes */
1110
1111 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1112
1113 if (netdev->flags & IFF_PROMISC) {
1114 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1115 } else if (netdev->flags & IFF_ALLMULTI) {
1116 fctrl |= IXGBE_FCTRL_MPE;
1117 fctrl &= ~IXGBE_FCTRL_UPE;
1118 } else {
1119 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1120 }
1121
1122 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1123
1124 if (netdev->mc_count) {
1125 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1126 if (!mta_list)
1127 return;
1128
1129 /* Shared function expects packed array of only addresses. */
1130 mc_ptr = netdev->mc_list;
1131
1132 for (i = 0; i < netdev->mc_count; i++) {
1133 if (!mc_ptr)
1134 break;
1135 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1136 ETH_ALEN);
1137 mc_ptr = mc_ptr->next;
1138 }
1139
1140 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1141 kfree(mta_list);
1142 } else {
1143 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1144 }
1145
1146 }
1147
1148 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1149 {
1150 struct net_device *netdev = adapter->netdev;
1151 int i;
1152
1153 ixgbe_set_multi(netdev);
1154
1155 ixgbe_restore_vlan(adapter);
1156
1157 ixgbe_configure_tx(adapter);
1158 ixgbe_configure_rx(adapter);
1159 for (i = 0; i < adapter->num_rx_queues; i++)
1160 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1161 (adapter->rx_ring[i].count - 1));
1162 }
1163
1164 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1165 {
1166 struct net_device *netdev = adapter->netdev;
1167 int i;
1168 u32 gpie = 0;
1169 struct ixgbe_hw *hw = &adapter->hw;
1170 u32 txdctl, rxdctl, mhadd;
1171 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1172
1173 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1174 IXGBE_FLAG_MSI_ENABLED)) {
1175 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1176 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1177 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1178 } else {
1179 /* MSI only */
1180 gpie = (IXGBE_GPIE_EIAME |
1181 IXGBE_GPIE_PBA_SUPPORT);
1182 }
1183 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1184 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1185 }
1186
1187 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1188
1189 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1190 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1191 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1192
1193 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1194 }
1195
1196 for (i = 0; i < adapter->num_tx_queues; i++) {
1197 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1198 txdctl |= IXGBE_TXDCTL_ENABLE;
1199 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1200 }
1201
1202 for (i = 0; i < adapter->num_rx_queues; i++) {
1203 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1204 rxdctl |= IXGBE_RXDCTL_ENABLE;
1205 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1206 }
1207 /* enable all receives */
1208 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1209 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1210 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1211
1212 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1213 ixgbe_configure_msix(adapter);
1214 else
1215 ixgbe_configure_msi_and_legacy(adapter);
1216
1217 clear_bit(__IXGBE_DOWN, &adapter->state);
1218 napi_enable(&adapter->napi);
1219 ixgbe_irq_enable(adapter);
1220
1221 /* bring the link up in the watchdog, this could race with our first
1222 * link up interrupt but shouldn't be a problem */
1223 mod_timer(&adapter->watchdog_timer, jiffies);
1224 return 0;
1225 }
1226
1227 int ixgbe_up(struct ixgbe_adapter *adapter)
1228 {
1229 /* hardware has been reset, we need to reload some things */
1230 ixgbe_configure(adapter);
1231
1232 return ixgbe_up_complete(adapter);
1233 }
1234
1235 void ixgbe_reset(struct ixgbe_adapter *adapter)
1236 {
1237 if (ixgbe_init_hw(&adapter->hw))
1238 DPRINTK(PROBE, ERR, "Hardware Error\n");
1239
1240 /* reprogram the RAR[0] in case user changed it. */
1241 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1242
1243 }
1244
1245 #ifdef CONFIG_PM
1246 static int ixgbe_resume(struct pci_dev *pdev)
1247 {
1248 struct net_device *netdev = pci_get_drvdata(pdev);
1249 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1250 u32 err, num_rx_queues = adapter->num_rx_queues;
1251
1252 pci_set_power_state(pdev, PCI_D0);
1253 pci_restore_state(pdev);
1254 err = pci_enable_device(pdev);
1255 if (err) {
1256 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1257 "suspend\n");
1258 return err;
1259 }
1260 pci_set_master(pdev);
1261
1262 pci_enable_wake(pdev, PCI_D3hot, 0);
1263 pci_enable_wake(pdev, PCI_D3cold, 0);
1264
1265 if (netif_running(netdev)) {
1266 err = ixgbe_request_irq(adapter, &num_rx_queues);
1267 if (err)
1268 return err;
1269 }
1270
1271 ixgbe_reset(adapter);
1272
1273 if (netif_running(netdev))
1274 ixgbe_up(adapter);
1275
1276 netif_device_attach(netdev);
1277
1278 return 0;
1279 }
1280 #endif
1281
1282 /**
1283 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1284 * @adapter: board private structure
1285 * @rx_ring: ring to free buffers from
1286 **/
1287 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1288 struct ixgbe_ring *rx_ring)
1289 {
1290 struct pci_dev *pdev = adapter->pdev;
1291 unsigned long size;
1292 unsigned int i;
1293
1294 /* Free all the Rx ring sk_buffs */
1295
1296 for (i = 0; i < rx_ring->count; i++) {
1297 struct ixgbe_rx_buffer *rx_buffer_info;
1298
1299 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1300 if (rx_buffer_info->dma) {
1301 pci_unmap_single(pdev, rx_buffer_info->dma,
1302 adapter->rx_buf_len,
1303 PCI_DMA_FROMDEVICE);
1304 rx_buffer_info->dma = 0;
1305 }
1306 if (rx_buffer_info->skb) {
1307 dev_kfree_skb(rx_buffer_info->skb);
1308 rx_buffer_info->skb = NULL;
1309 }
1310 if (!rx_buffer_info->page)
1311 continue;
1312 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1313 PCI_DMA_FROMDEVICE);
1314 rx_buffer_info->page_dma = 0;
1315
1316 put_page(rx_buffer_info->page);
1317 rx_buffer_info->page = NULL;
1318 }
1319
1320 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1321 memset(rx_ring->rx_buffer_info, 0, size);
1322
1323 /* Zero out the descriptor ring */
1324 memset(rx_ring->desc, 0, rx_ring->size);
1325
1326 rx_ring->next_to_clean = 0;
1327 rx_ring->next_to_use = 0;
1328
1329 writel(0, adapter->hw.hw_addr + rx_ring->head);
1330 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1331 }
1332
1333 /**
1334 * ixgbe_clean_tx_ring - Free Tx Buffers
1335 * @adapter: board private structure
1336 * @tx_ring: ring to be cleaned
1337 **/
1338 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1339 struct ixgbe_ring *tx_ring)
1340 {
1341 struct ixgbe_tx_buffer *tx_buffer_info;
1342 unsigned long size;
1343 unsigned int i;
1344
1345 /* Free all the Tx ring sk_buffs */
1346
1347 for (i = 0; i < tx_ring->count; i++) {
1348 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1349 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1350 }
1351
1352 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1353 memset(tx_ring->tx_buffer_info, 0, size);
1354
1355 /* Zero out the descriptor ring */
1356 memset(tx_ring->desc, 0, tx_ring->size);
1357
1358 tx_ring->next_to_use = 0;
1359 tx_ring->next_to_clean = 0;
1360
1361 writel(0, adapter->hw.hw_addr + tx_ring->head);
1362 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1363 }
1364
1365 /**
1366 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1367 * @adapter: board private structure
1368 **/
1369 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1370 {
1371 int i;
1372
1373 for (i = 0; i < adapter->num_tx_queues; i++)
1374 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1375 }
1376
1377 /**
1378 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1379 * @adapter: board private structure
1380 **/
1381 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1382 {
1383 int i;
1384
1385 for (i = 0; i < adapter->num_rx_queues; i++)
1386 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1387 }
1388
1389 void ixgbe_down(struct ixgbe_adapter *adapter)
1390 {
1391 struct net_device *netdev = adapter->netdev;
1392 u32 rxctrl;
1393
1394 /* signal that we are down to the interrupt handler */
1395 set_bit(__IXGBE_DOWN, &adapter->state);
1396
1397 /* disable receives */
1398 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1399 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1400 rxctrl & ~IXGBE_RXCTRL_RXEN);
1401
1402 netif_tx_disable(netdev);
1403
1404 /* disable transmits in the hardware */
1405
1406 /* flush both disables */
1407 IXGBE_WRITE_FLUSH(&adapter->hw);
1408 msleep(10);
1409
1410 napi_disable(&adapter->napi);
1411 atomic_set(&adapter->irq_sem, 0);
1412
1413 ixgbe_irq_disable(adapter);
1414
1415 del_timer_sync(&adapter->watchdog_timer);
1416
1417 netif_carrier_off(netdev);
1418 netif_stop_queue(netdev);
1419
1420 ixgbe_reset(adapter);
1421 ixgbe_clean_all_tx_rings(adapter);
1422 ixgbe_clean_all_rx_rings(adapter);
1423
1424 }
1425
1426 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1427 {
1428 struct net_device *netdev = pci_get_drvdata(pdev);
1429 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1430 #ifdef CONFIG_PM
1431 int retval = 0;
1432 #endif
1433
1434 netif_device_detach(netdev);
1435
1436 if (netif_running(netdev)) {
1437 ixgbe_down(adapter);
1438 ixgbe_free_irq(adapter);
1439 }
1440
1441 #ifdef CONFIG_PM
1442 retval = pci_save_state(pdev);
1443 if (retval)
1444 return retval;
1445 #endif
1446
1447 pci_enable_wake(pdev, PCI_D3hot, 0);
1448 pci_enable_wake(pdev, PCI_D3cold, 0);
1449
1450 pci_disable_device(pdev);
1451
1452 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1453
1454 return 0;
1455 }
1456
1457 static void ixgbe_shutdown(struct pci_dev *pdev)
1458 {
1459 ixgbe_suspend(pdev, PMSG_SUSPEND);
1460 }
1461
1462 /**
1463 * ixgbe_clean - NAPI Rx polling callback
1464 * @adapter: board private structure
1465 **/
1466 static int ixgbe_clean(struct napi_struct *napi, int budget)
1467 {
1468 struct ixgbe_adapter *adapter = container_of(napi,
1469 struct ixgbe_adapter, napi);
1470 struct net_device *netdev = adapter->netdev;
1471 int tx_cleaned = 0, work_done = 0;
1472
1473 /* In non-MSIX case, there is no multi-Tx/Rx queue */
1474 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
1475 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1476 budget);
1477
1478 if (tx_cleaned)
1479 work_done = budget;
1480
1481 /* If budget not fully consumed, exit the polling mode */
1482 if (work_done < budget) {
1483 netif_rx_complete(netdev, napi);
1484 ixgbe_irq_enable(adapter);
1485 }
1486
1487 return work_done;
1488 }
1489
1490 /**
1491 * ixgbe_tx_timeout - Respond to a Tx Hang
1492 * @netdev: network interface device structure
1493 **/
1494 static void ixgbe_tx_timeout(struct net_device *netdev)
1495 {
1496 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1497
1498 /* Do the reset outside of interrupt context */
1499 schedule_work(&adapter->reset_task);
1500 }
1501
1502 static void ixgbe_reset_task(struct work_struct *work)
1503 {
1504 struct ixgbe_adapter *adapter;
1505 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1506
1507 adapter->tx_timeout_count++;
1508
1509 ixgbe_down(adapter);
1510 ixgbe_up(adapter);
1511 }
1512
1513 /**
1514 * ixgbe_alloc_queues - Allocate memory for all rings
1515 * @adapter: board private structure to initialize
1516 *
1517 * We allocate one ring per queue at run-time since we don't know the
1518 * number of queues at compile-time. The polling_netdev array is
1519 * intended for Multiqueue, but should work fine with a single queue.
1520 **/
1521 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1522 {
1523 int i;
1524
1525 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1526 sizeof(struct ixgbe_ring), GFP_KERNEL);
1527 if (!adapter->tx_ring)
1528 return -ENOMEM;
1529
1530 for (i = 0; i < adapter->num_tx_queues; i++)
1531 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1532
1533 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1534 sizeof(struct ixgbe_ring), GFP_KERNEL);
1535 if (!adapter->rx_ring) {
1536 kfree(adapter->tx_ring);
1537 return -ENOMEM;
1538 }
1539
1540 for (i = 0; i < adapter->num_rx_queues; i++) {
1541 adapter->rx_ring[i].adapter = adapter;
1542 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1543 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1544 }
1545
1546 return 0;
1547 }
1548
1549 /**
1550 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1551 * @adapter: board private structure to initialize
1552 *
1553 * ixgbe_sw_init initializes the Adapter private data structure.
1554 * Fields are initialized based on PCI device information and
1555 * OS network device settings (MTU size).
1556 **/
1557 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1558 {
1559 struct ixgbe_hw *hw = &adapter->hw;
1560 struct pci_dev *pdev = adapter->pdev;
1561
1562 /* default flow control settings */
1563 hw->fc.original_type = ixgbe_fc_full;
1564 hw->fc.type = ixgbe_fc_full;
1565
1566 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1567 if (hw->mac.ops.reset(hw)) {
1568 dev_err(&pdev->dev, "HW Init failed\n");
1569 return -EIO;
1570 }
1571 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1572 false)) {
1573 dev_err(&pdev->dev, "Link Speed setup failed\n");
1574 return -EIO;
1575 }
1576
1577 /* initialize eeprom parameters */
1578 if (ixgbe_init_eeprom(hw)) {
1579 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1580 return -EIO;
1581 }
1582
1583 /* Set the default values */
1584 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1585 adapter->num_tx_queues = 1;
1586 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1587
1588 if (ixgbe_alloc_queues(adapter)) {
1589 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1590 return -ENOMEM;
1591 }
1592
1593 atomic_set(&adapter->irq_sem, 1);
1594 set_bit(__IXGBE_DOWN, &adapter->state);
1595
1596 return 0;
1597 }
1598
1599 /**
1600 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1601 * @adapter: board private structure
1602 * @txdr: tx descriptor ring (for a specific queue) to setup
1603 *
1604 * Return 0 on success, negative on failure
1605 **/
1606 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1607 struct ixgbe_ring *txdr)
1608 {
1609 struct pci_dev *pdev = adapter->pdev;
1610 int size;
1611
1612 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1613 txdr->tx_buffer_info = vmalloc(size);
1614 if (!txdr->tx_buffer_info) {
1615 DPRINTK(PROBE, ERR,
1616 "Unable to allocate memory for the transmit descriptor ring\n");
1617 return -ENOMEM;
1618 }
1619 memset(txdr->tx_buffer_info, 0, size);
1620
1621 /* round up to nearest 4K */
1622 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1623 txdr->size = ALIGN(txdr->size, 4096);
1624
1625 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1626 if (!txdr->desc) {
1627 vfree(txdr->tx_buffer_info);
1628 DPRINTK(PROBE, ERR,
1629 "Memory allocation failed for the tx desc ring\n");
1630 return -ENOMEM;
1631 }
1632
1633 txdr->adapter = adapter;
1634 txdr->next_to_use = 0;
1635 txdr->next_to_clean = 0;
1636 txdr->work_limit = txdr->count;
1637 spin_lock_init(&txdr->tx_lock);
1638
1639 return 0;
1640 }
1641
1642 /**
1643 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1644 * @adapter: board private structure
1645 * @rxdr: rx descriptor ring (for a specific queue) to setup
1646 *
1647 * Returns 0 on success, negative on failure
1648 **/
1649 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1650 struct ixgbe_ring *rxdr)
1651 {
1652 struct pci_dev *pdev = adapter->pdev;
1653 int size, desc_len;
1654
1655 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1656 rxdr->rx_buffer_info = vmalloc(size);
1657 if (!rxdr->rx_buffer_info) {
1658 DPRINTK(PROBE, ERR,
1659 "vmalloc allocation failed for the rx desc ring\n");
1660 return -ENOMEM;
1661 }
1662 memset(rxdr->rx_buffer_info, 0, size);
1663
1664 desc_len = sizeof(union ixgbe_adv_rx_desc);
1665
1666 /* Round up to nearest 4K */
1667 rxdr->size = rxdr->count * desc_len;
1668 rxdr->size = ALIGN(rxdr->size, 4096);
1669
1670 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1671
1672 if (!rxdr->desc) {
1673 DPRINTK(PROBE, ERR,
1674 "Memory allocation failed for the rx desc ring\n");
1675 vfree(rxdr->rx_buffer_info);
1676 return -ENOMEM;
1677 }
1678
1679 rxdr->next_to_clean = 0;
1680 rxdr->next_to_use = 0;
1681 rxdr->adapter = adapter;
1682
1683 return 0;
1684 }
1685
1686 /**
1687 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1688 * @adapter: board private structure
1689 * @tx_ring: Tx descriptor ring for a specific queue
1690 *
1691 * Free all transmit software resources
1692 **/
1693 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1694 struct ixgbe_ring *tx_ring)
1695 {
1696 struct pci_dev *pdev = adapter->pdev;
1697
1698 ixgbe_clean_tx_ring(adapter, tx_ring);
1699
1700 vfree(tx_ring->tx_buffer_info);
1701 tx_ring->tx_buffer_info = NULL;
1702
1703 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1704
1705 tx_ring->desc = NULL;
1706 }
1707
1708 /**
1709 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1710 * @adapter: board private structure
1711 *
1712 * Free all transmit software resources
1713 **/
1714 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1715 {
1716 int i;
1717
1718 for (i = 0; i < adapter->num_tx_queues; i++)
1719 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1720 }
1721
1722 /**
1723 * ixgbe_free_rx_resources - Free Rx Resources
1724 * @adapter: board private structure
1725 * @rx_ring: ring to clean the resources from
1726 *
1727 * Free all receive software resources
1728 **/
1729 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1730 struct ixgbe_ring *rx_ring)
1731 {
1732 struct pci_dev *pdev = adapter->pdev;
1733
1734 ixgbe_clean_rx_ring(adapter, rx_ring);
1735
1736 vfree(rx_ring->rx_buffer_info);
1737 rx_ring->rx_buffer_info = NULL;
1738
1739 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1740
1741 rx_ring->desc = NULL;
1742 }
1743
1744 /**
1745 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1746 * @adapter: board private structure
1747 *
1748 * Free all receive software resources
1749 **/
1750 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1751 {
1752 int i;
1753
1754 for (i = 0; i < adapter->num_rx_queues; i++)
1755 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1756 }
1757
1758 /**
1759 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1760 * (Descriptors) for all queues
1761 * @adapter: board private structure
1762 *
1763 * If this function returns with an error, then it's possible one or
1764 * more of the rings is populated (while the rest are not). It is the
1765 * callers duty to clean those orphaned rings.
1766 *
1767 * Return 0 on success, negative on failure
1768 **/
1769 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1770 {
1771 int i, err = 0;
1772
1773 for (i = 0; i < adapter->num_tx_queues; i++) {
1774 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1775 if (err) {
1776 DPRINTK(PROBE, ERR,
1777 "Allocation for Tx Queue %u failed\n", i);
1778 break;
1779 }
1780 }
1781
1782 return err;
1783 }
1784
1785 /**
1786 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1787 * (Descriptors) for all queues
1788 * @adapter: board private structure
1789 *
1790 * If this function returns with an error, then it's possible one or
1791 * more of the rings is populated (while the rest are not). It is the
1792 * callers duty to clean those orphaned rings.
1793 *
1794 * Return 0 on success, negative on failure
1795 **/
1796
1797 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1798 {
1799 int i, err = 0;
1800
1801 for (i = 0; i < adapter->num_rx_queues; i++) {
1802 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1803 if (err) {
1804 DPRINTK(PROBE, ERR,
1805 "Allocation for Rx Queue %u failed\n", i);
1806 break;
1807 }
1808 }
1809
1810 return err;
1811 }
1812
1813 /**
1814 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1815 * @netdev: network interface device structure
1816 * @new_mtu: new value for maximum frame size
1817 *
1818 * Returns 0 on success, negative on failure
1819 **/
1820 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1821 {
1822 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1823 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1824
1825 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1826 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1827 return -EINVAL;
1828
1829 netdev->mtu = new_mtu;
1830
1831 if (netif_running(netdev)) {
1832 ixgbe_down(adapter);
1833 ixgbe_up(adapter);
1834 }
1835
1836 return 0;
1837 }
1838
1839 /**
1840 * ixgbe_open - Called when a network interface is made active
1841 * @netdev: network interface device structure
1842 *
1843 * Returns 0 on success, negative value on failure
1844 *
1845 * The open entry point is called when a network interface is made
1846 * active by the system (IFF_UP). At this point all resources needed
1847 * for transmit and receive operations are allocated, the interrupt
1848 * handler is registered with the OS, the watchdog timer is started,
1849 * and the stack is notified that the interface is ready.
1850 **/
1851 static int ixgbe_open(struct net_device *netdev)
1852 {
1853 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1854 int err;
1855 u32 ctrl_ext;
1856 u32 num_rx_queues = adapter->num_rx_queues;
1857
1858 /* Let firmware know the driver has taken over */
1859 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1860 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1861 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
1862
1863 try_intr_reinit:
1864 /* allocate transmit descriptors */
1865 err = ixgbe_setup_all_tx_resources(adapter);
1866 if (err)
1867 goto err_setup_tx;
1868
1869 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1870 num_rx_queues = 1;
1871 adapter->num_rx_queues = num_rx_queues;
1872 }
1873
1874 /* allocate receive descriptors */
1875 err = ixgbe_setup_all_rx_resources(adapter);
1876 if (err)
1877 goto err_setup_rx;
1878
1879 ixgbe_configure(adapter);
1880
1881 err = ixgbe_request_irq(adapter, &num_rx_queues);
1882 if (err)
1883 goto err_req_irq;
1884
1885 /* ixgbe_request might have reduced num_rx_queues */
1886 if (num_rx_queues < adapter->num_rx_queues) {
1887 /* We didn't get MSI-X, so we need to release everything,
1888 * set our Rx queue count to num_rx_queues, and redo the
1889 * whole init process.
1890 */
1891 ixgbe_free_irq(adapter);
1892 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1893 pci_disable_msi(adapter->pdev);
1894 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1895 }
1896 ixgbe_free_all_rx_resources(adapter);
1897 ixgbe_free_all_tx_resources(adapter);
1898 adapter->num_rx_queues = num_rx_queues;
1899
1900 /* Reset the hardware, and start over. */
1901 ixgbe_reset(adapter);
1902
1903 goto try_intr_reinit;
1904 }
1905
1906 err = ixgbe_up_complete(adapter);
1907 if (err)
1908 goto err_up;
1909
1910 return 0;
1911
1912 err_up:
1913 ixgbe_free_irq(adapter);
1914 err_req_irq:
1915 ixgbe_free_all_rx_resources(adapter);
1916 err_setup_rx:
1917 ixgbe_free_all_tx_resources(adapter);
1918 err_setup_tx:
1919 ixgbe_reset(adapter);
1920
1921 return err;
1922 }
1923
1924 /**
1925 * ixgbe_close - Disables a network interface
1926 * @netdev: network interface device structure
1927 *
1928 * Returns 0, this is not allowed to fail
1929 *
1930 * The close entry point is called when an interface is de-activated
1931 * by the OS. The hardware is still under the drivers control, but
1932 * needs to be disabled. A global MAC reset is issued to stop the
1933 * hardware, and all transmit and receive resources are freed.
1934 **/
1935 static int ixgbe_close(struct net_device *netdev)
1936 {
1937 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1938 u32 ctrl_ext;
1939
1940 ixgbe_down(adapter);
1941 ixgbe_free_irq(adapter);
1942
1943 ixgbe_free_all_tx_resources(adapter);
1944 ixgbe_free_all_rx_resources(adapter);
1945
1946 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1947 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1948 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
1949
1950 return 0;
1951 }
1952
1953 /**
1954 * ixgbe_update_stats - Update the board statistics counters.
1955 * @adapter: board private structure
1956 **/
1957 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1958 {
1959 struct ixgbe_hw *hw = &adapter->hw;
1960 u64 good_rx, missed_rx, bprc;
1961
1962 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1963 good_rx = IXGBE_READ_REG(hw, IXGBE_GPRC);
1964 missed_rx = IXGBE_READ_REG(hw, IXGBE_MPC(0));
1965 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(1));
1966 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(2));
1967 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(3));
1968 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(4));
1969 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(5));
1970 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(6));
1971 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(7));
1972 adapter->stats.gprc += (good_rx - missed_rx);
1973
1974 adapter->stats.mpc[0] += missed_rx;
1975 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
1976 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1977 adapter->stats.bprc += bprc;
1978 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
1979 adapter->stats.mprc -= bprc;
1980 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
1981 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
1982 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
1983 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
1984 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
1985 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1986 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1987
1988 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
1989 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1990 adapter->stats.lxontxc += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1991 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1992 adapter->stats.lxofftxc += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1993 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1994 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
1995 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
1996 adapter->stats.rnbc[0] += IXGBE_READ_REG(hw, IXGBE_RNBC(0));
1997 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1998 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
1999 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2000 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2001 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2002 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2003 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2004 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2005 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2006 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2007 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2008 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2009 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2010
2011 /* Fill out the OS statistics structure */
2012 adapter->net_stats.rx_packets = adapter->stats.gprc;
2013 adapter->net_stats.tx_packets = adapter->stats.gptc;
2014 adapter->net_stats.rx_bytes = adapter->stats.gorc;
2015 adapter->net_stats.tx_bytes = adapter->stats.gotc;
2016 adapter->net_stats.multicast = adapter->stats.mprc;
2017
2018 /* Rx Errors */
2019 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2020 adapter->stats.rlec;
2021 adapter->net_stats.rx_dropped = 0;
2022 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2023 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2024 adapter->net_stats.rx_missed_errors = adapter->stats.mpc[0];
2025
2026 }
2027
2028 /**
2029 * ixgbe_watchdog - Timer Call-back
2030 * @data: pointer to adapter cast into an unsigned long
2031 **/
2032 static void ixgbe_watchdog(unsigned long data)
2033 {
2034 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2035 struct net_device *netdev = adapter->netdev;
2036 bool link_up;
2037 u32 link_speed = 0;
2038
2039 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2040
2041 if (link_up) {
2042 if (!netif_carrier_ok(netdev)) {
2043 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2044 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2045 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2046 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2047 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2048 "Flow Control: %s\n",
2049 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2050 "10 Gbps" :
2051 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2052 "1 Gpbs" : "unknown speed")),
2053 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2054 (FLOW_RX ? "RX" :
2055 (FLOW_TX ? "TX" : "None"))));
2056
2057 netif_carrier_on(netdev);
2058 netif_wake_queue(netdev);
2059 } else {
2060 /* Force detection of hung controller */
2061 adapter->detect_tx_hung = true;
2062 }
2063 } else {
2064 if (netif_carrier_ok(netdev)) {
2065 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2066 netif_carrier_off(netdev);
2067 netif_stop_queue(netdev);
2068 }
2069 }
2070
2071 ixgbe_update_stats(adapter);
2072
2073 /* Reset the timer */
2074 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2075 mod_timer(&adapter->watchdog_timer,
2076 round_jiffies(jiffies + 2 * HZ));
2077 }
2078
2079 #define IXGBE_MAX_TXD_PWR 14
2080 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
2081
2082 /* Tx Descriptors needed, worst case */
2083 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
2084 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
2085 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
2086 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
2087
2088 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2089 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2090 u32 tx_flags, u8 *hdr_len)
2091 {
2092 struct ixgbe_adv_tx_context_desc *context_desc;
2093 unsigned int i;
2094 int err;
2095 struct ixgbe_tx_buffer *tx_buffer_info;
2096 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2097 u32 mss_l4len_idx = 0, l4len;
2098 *hdr_len = 0;
2099
2100 if (skb_is_gso(skb)) {
2101 if (skb_header_cloned(skb)) {
2102 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2103 if (err)
2104 return err;
2105 }
2106 l4len = tcp_hdrlen(skb);
2107 *hdr_len += l4len;
2108
2109 if (skb->protocol == htons(ETH_P_IP)) {
2110 struct iphdr *iph = ip_hdr(skb);
2111 iph->tot_len = 0;
2112 iph->check = 0;
2113 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2114 iph->daddr, 0,
2115 IPPROTO_TCP,
2116 0);
2117 adapter->hw_tso_ctxt++;
2118 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2119 ipv6_hdr(skb)->payload_len = 0;
2120 tcp_hdr(skb)->check =
2121 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2122 &ipv6_hdr(skb)->daddr,
2123 0, IPPROTO_TCP, 0);
2124 adapter->hw_tso6_ctxt++;
2125 }
2126
2127 i = tx_ring->next_to_use;
2128
2129 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2130 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2131
2132 /* VLAN MACLEN IPLEN */
2133 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2134 vlan_macip_lens |=
2135 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2136 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2137 IXGBE_ADVTXD_MACLEN_SHIFT);
2138 *hdr_len += skb_network_offset(skb);
2139 vlan_macip_lens |=
2140 (skb_transport_header(skb) - skb_network_header(skb));
2141 *hdr_len +=
2142 (skb_transport_header(skb) - skb_network_header(skb));
2143 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2144 context_desc->seqnum_seed = 0;
2145
2146 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2147 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2148 IXGBE_ADVTXD_DTYP_CTXT);
2149
2150 if (skb->protocol == htons(ETH_P_IP))
2151 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2152 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2153 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2154
2155 /* MSS L4LEN IDX */
2156 mss_l4len_idx |=
2157 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2158 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2159 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2160
2161 tx_buffer_info->time_stamp = jiffies;
2162 tx_buffer_info->next_to_watch = i;
2163
2164 i++;
2165 if (i == tx_ring->count)
2166 i = 0;
2167 tx_ring->next_to_use = i;
2168
2169 return true;
2170 }
2171 return false;
2172 }
2173
2174 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2175 struct ixgbe_ring *tx_ring,
2176 struct sk_buff *skb, u32 tx_flags)
2177 {
2178 struct ixgbe_adv_tx_context_desc *context_desc;
2179 unsigned int i;
2180 struct ixgbe_tx_buffer *tx_buffer_info;
2181 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2182
2183 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2184 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2185 i = tx_ring->next_to_use;
2186 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2187 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2188
2189 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2190 vlan_macip_lens |=
2191 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2192 vlan_macip_lens |= (skb_network_offset(skb) <<
2193 IXGBE_ADVTXD_MACLEN_SHIFT);
2194 if (skb->ip_summed == CHECKSUM_PARTIAL)
2195 vlan_macip_lens |= (skb_transport_header(skb) -
2196 skb_network_header(skb));
2197
2198 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2199 context_desc->seqnum_seed = 0;
2200
2201 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2202 IXGBE_ADVTXD_DTYP_CTXT);
2203
2204 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2205 if (skb->protocol == htons(ETH_P_IP))
2206 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2207
2208 if (skb->sk->sk_protocol == IPPROTO_TCP)
2209 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2210 }
2211
2212 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2213 context_desc->mss_l4len_idx = 0;
2214
2215 tx_buffer_info->time_stamp = jiffies;
2216 tx_buffer_info->next_to_watch = i;
2217 adapter->hw_csum_tx_good++;
2218 i++;
2219 if (i == tx_ring->count)
2220 i = 0;
2221 tx_ring->next_to_use = i;
2222
2223 return true;
2224 }
2225 return false;
2226 }
2227
2228 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2229 struct ixgbe_ring *tx_ring,
2230 struct sk_buff *skb, unsigned int first)
2231 {
2232 struct ixgbe_tx_buffer *tx_buffer_info;
2233 unsigned int len = skb->len;
2234 unsigned int offset = 0, size, count = 0, i;
2235 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2236 unsigned int f;
2237
2238 len -= skb->data_len;
2239
2240 i = tx_ring->next_to_use;
2241
2242 while (len) {
2243 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2244 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2245
2246 tx_buffer_info->length = size;
2247 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2248 skb->data + offset,
2249 size, PCI_DMA_TODEVICE);
2250 tx_buffer_info->time_stamp = jiffies;
2251 tx_buffer_info->next_to_watch = i;
2252
2253 len -= size;
2254 offset += size;
2255 count++;
2256 i++;
2257 if (i == tx_ring->count)
2258 i = 0;
2259 }
2260
2261 for (f = 0; f < nr_frags; f++) {
2262 struct skb_frag_struct *frag;
2263
2264 frag = &skb_shinfo(skb)->frags[f];
2265 len = frag->size;
2266 offset = frag->page_offset;
2267
2268 while (len) {
2269 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2270 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2271
2272 tx_buffer_info->length = size;
2273 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2274 frag->page,
2275 offset,
2276 size, PCI_DMA_TODEVICE);
2277 tx_buffer_info->time_stamp = jiffies;
2278 tx_buffer_info->next_to_watch = i;
2279
2280 len -= size;
2281 offset += size;
2282 count++;
2283 i++;
2284 if (i == tx_ring->count)
2285 i = 0;
2286 }
2287 }
2288 if (i == 0)
2289 i = tx_ring->count - 1;
2290 else
2291 i = i - 1;
2292 tx_ring->tx_buffer_info[i].skb = skb;
2293 tx_ring->tx_buffer_info[first].next_to_watch = i;
2294
2295 return count;
2296 }
2297
2298 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2299 struct ixgbe_ring *tx_ring,
2300 int tx_flags, int count, u32 paylen, u8 hdr_len)
2301 {
2302 union ixgbe_adv_tx_desc *tx_desc = NULL;
2303 struct ixgbe_tx_buffer *tx_buffer_info;
2304 u32 olinfo_status = 0, cmd_type_len = 0;
2305 unsigned int i;
2306 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2307
2308 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2309
2310 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2311
2312 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2313 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2314
2315 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2316 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2317
2318 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2319 IXGBE_ADVTXD_POPTS_SHIFT;
2320
2321 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2322 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2323 IXGBE_ADVTXD_POPTS_SHIFT;
2324
2325 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2326 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2327 IXGBE_ADVTXD_POPTS_SHIFT;
2328
2329 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2330
2331 i = tx_ring->next_to_use;
2332 while (count--) {
2333 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2334 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2335 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2336 tx_desc->read.cmd_type_len =
2337 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2338 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2339
2340 i++;
2341 if (i == tx_ring->count)
2342 i = 0;
2343 }
2344
2345 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2346
2347 /*
2348 * Force memory writes to complete before letting h/w
2349 * know there are new descriptors to fetch. (Only
2350 * applicable for weak-ordered memory model archs,
2351 * such as IA-64).
2352 */
2353 wmb();
2354
2355 tx_ring->next_to_use = i;
2356 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2357 }
2358
2359 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2360 {
2361 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2362 struct ixgbe_ring *tx_ring;
2363 unsigned int len = skb->len;
2364 unsigned int first;
2365 unsigned int tx_flags = 0;
2366 unsigned long flags = 0;
2367 u8 hdr_len;
2368 int tso;
2369 unsigned int mss = 0;
2370 int count = 0;
2371 unsigned int f;
2372 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2373 len -= skb->data_len;
2374
2375 tx_ring = adapter->tx_ring;
2376
2377 if (skb->len <= 0) {
2378 dev_kfree_skb(skb);
2379 return NETDEV_TX_OK;
2380 }
2381 mss = skb_shinfo(skb)->gso_size;
2382
2383 if (mss)
2384 count++;
2385 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2386 count++;
2387
2388 count += TXD_USE_COUNT(len);
2389 for (f = 0; f < nr_frags; f++)
2390 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2391
2392 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2393 if (IXGBE_DESC_UNUSED(tx_ring) < (count + 2)) {
2394 adapter->tx_busy++;
2395 netif_stop_queue(netdev);
2396 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2397 return NETDEV_TX_BUSY;
2398 }
2399 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2400 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2401 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2402 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2403 }
2404
2405 if (skb->protocol == htons(ETH_P_IP))
2406 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2407 first = tx_ring->next_to_use;
2408 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2409 if (tso < 0) {
2410 dev_kfree_skb_any(skb);
2411 return NETDEV_TX_OK;
2412 }
2413
2414 if (tso)
2415 tx_flags |= IXGBE_TX_FLAGS_TSO;
2416 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2417 (skb->ip_summed == CHECKSUM_PARTIAL))
2418 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2419
2420 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2421 ixgbe_tx_map(adapter, tx_ring, skb, first),
2422 skb->len, hdr_len);
2423
2424 netdev->trans_start = jiffies;
2425
2426 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2427 /* Make sure there is space in the ring for the next send. */
2428 if (IXGBE_DESC_UNUSED(tx_ring) < DESC_NEEDED)
2429 netif_stop_queue(netdev);
2430 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2431
2432 return NETDEV_TX_OK;
2433 }
2434
2435 /**
2436 * ixgbe_get_stats - Get System Network Statistics
2437 * @netdev: network interface device structure
2438 *
2439 * Returns the address of the device statistics structure.
2440 * The statistics are actually updated from the timer callback.
2441 **/
2442 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2443 {
2444 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2445
2446 /* only return the current stats */
2447 return &adapter->net_stats;
2448 }
2449
2450 /**
2451 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2452 * @netdev: network interface device structure
2453 * @p: pointer to an address structure
2454 *
2455 * Returns 0 on success, negative on failure
2456 **/
2457 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2458 {
2459 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2460 struct sockaddr *addr = p;
2461
2462 if (!is_valid_ether_addr(addr->sa_data))
2463 return -EADDRNOTAVAIL;
2464
2465 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2466 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2467
2468 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2469
2470 return 0;
2471 }
2472
2473 #ifdef CONFIG_NET_POLL_CONTROLLER
2474 /*
2475 * Polling 'interrupt' - used by things like netconsole to send skbs
2476 * without having to re-enable interrupts. It's not called while
2477 * the interrupt routine is executing.
2478 */
2479 static void ixgbe_netpoll(struct net_device *netdev)
2480 {
2481 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2482
2483 disable_irq(adapter->pdev->irq);
2484 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2485 ixgbe_intr(adapter->pdev->irq, netdev);
2486 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2487 enable_irq(adapter->pdev->irq);
2488 }
2489 #endif
2490
2491 /**
2492 * ixgbe_probe - Device Initialization Routine
2493 * @pdev: PCI device information struct
2494 * @ent: entry in ixgbe_pci_tbl
2495 *
2496 * Returns 0 on success, negative on failure
2497 *
2498 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2499 * The OS initialization, configuring of the adapter private structure,
2500 * and a hardware reset occur.
2501 **/
2502 static int __devinit ixgbe_probe(struct pci_dev *pdev,
2503 const struct pci_device_id *ent)
2504 {
2505 struct net_device *netdev;
2506 struct ixgbe_adapter *adapter = NULL;
2507 struct ixgbe_hw *hw;
2508 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2509 unsigned long mmio_start, mmio_len;
2510 static int cards_found;
2511 int i, err, pci_using_dac;
2512 u16 link_status, link_speed, link_width;
2513 u32 part_num;
2514
2515 err = pci_enable_device(pdev);
2516 if (err)
2517 return err;
2518
2519 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2520 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2521 pci_using_dac = 1;
2522 } else {
2523 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2524 if (err) {
2525 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2526 if (err) {
2527 dev_err(&pdev->dev, "No usable DMA "
2528 "configuration, aborting\n");
2529 goto err_dma;
2530 }
2531 }
2532 pci_using_dac = 0;
2533 }
2534
2535 err = pci_request_regions(pdev, ixgbe_driver_name);
2536 if (err) {
2537 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2538 goto err_pci_reg;
2539 }
2540
2541 pci_set_master(pdev);
2542
2543 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2544 if (!netdev) {
2545 err = -ENOMEM;
2546 goto err_alloc_etherdev;
2547 }
2548
2549 SET_NETDEV_DEV(netdev, &pdev->dev);
2550
2551 pci_set_drvdata(pdev, netdev);
2552 adapter = netdev_priv(netdev);
2553
2554 adapter->netdev = netdev;
2555 adapter->pdev = pdev;
2556 hw = &adapter->hw;
2557 hw->back = adapter;
2558 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2559
2560 mmio_start = pci_resource_start(pdev, 0);
2561 mmio_len = pci_resource_len(pdev, 0);
2562
2563 hw->hw_addr = ioremap(mmio_start, mmio_len);
2564 if (!hw->hw_addr) {
2565 err = -EIO;
2566 goto err_ioremap;
2567 }
2568
2569 for (i = 1; i <= 5; i++) {
2570 if (pci_resource_len(pdev, i) == 0)
2571 continue;
2572 }
2573
2574 netdev->open = &ixgbe_open;
2575 netdev->stop = &ixgbe_close;
2576 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2577 netdev->get_stats = &ixgbe_get_stats;
2578 netdev->set_multicast_list = &ixgbe_set_multi;
2579 netdev->set_mac_address = &ixgbe_set_mac;
2580 netdev->change_mtu = &ixgbe_change_mtu;
2581 ixgbe_set_ethtool_ops(netdev);
2582 netdev->tx_timeout = &ixgbe_tx_timeout;
2583 netdev->watchdog_timeo = 5 * HZ;
2584 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2585 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2586 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2587 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2588 #ifdef CONFIG_NET_POLL_CONTROLLER
2589 netdev->poll_controller = ixgbe_netpoll;
2590 #endif
2591 strcpy(netdev->name, pci_name(pdev));
2592
2593 netdev->mem_start = mmio_start;
2594 netdev->mem_end = mmio_start + mmio_len;
2595
2596 adapter->bd_number = cards_found;
2597
2598 /* PCI config space info */
2599 hw->vendor_id = pdev->vendor;
2600 hw->device_id = pdev->device;
2601 hw->revision_id = pdev->revision;
2602 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2603 hw->subsystem_device_id = pdev->subsystem_device;
2604
2605 /* Setup hw api */
2606 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2607
2608 err = ii->get_invariants(hw);
2609 if (err)
2610 goto err_hw_init;
2611
2612 /* setup the private structure */
2613 err = ixgbe_sw_init(adapter);
2614 if (err)
2615 goto err_sw_init;
2616
2617 netdev->features = NETIF_F_SG |
2618 NETIF_F_HW_CSUM |
2619 NETIF_F_HW_VLAN_TX |
2620 NETIF_F_HW_VLAN_RX |
2621 NETIF_F_HW_VLAN_FILTER;
2622
2623 netdev->features |= NETIF_F_TSO;
2624
2625 netdev->features |= NETIF_F_TSO6;
2626 if (pci_using_dac)
2627 netdev->features |= NETIF_F_HIGHDMA;
2628
2629
2630 /* make sure the EEPROM is good */
2631 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2632 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2633 err = -EIO;
2634 goto err_eeprom;
2635 }
2636
2637 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2638 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2639
2640 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2641 err = -EIO;
2642 goto err_eeprom;
2643 }
2644
2645 init_timer(&adapter->watchdog_timer);
2646 adapter->watchdog_timer.function = &ixgbe_watchdog;
2647 adapter->watchdog_timer.data = (unsigned long)adapter;
2648
2649 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2650
2651 /* initialize default flow control settings */
2652 hw->fc.original_type = ixgbe_fc_full;
2653 hw->fc.type = ixgbe_fc_full;
2654 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2655 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2656 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2657
2658 /* Interrupt Throttle Rate */
2659 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2660 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2661
2662 /* print bus type/speed/width info */
2663 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2664 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2665 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2666 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2667 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2668 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2669 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2670 "Unknown"),
2671 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2672 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2673 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2674 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2675 "Unknown"),
2676 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2677 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2678 ixgbe_read_part_num(hw, &part_num);
2679 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2680 hw->mac.type, hw->phy.type,
2681 (part_num >> 8), (part_num & 0xff));
2682
2683 /* reset the hardware with the new settings */
2684 ixgbe_start_hw(hw);
2685
2686 netif_carrier_off(netdev);
2687 netif_stop_queue(netdev);
2688
2689 strcpy(netdev->name, "eth%d");
2690 err = register_netdev(netdev);
2691 if (err)
2692 goto err_register;
2693
2694
2695 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2696 cards_found++;
2697 return 0;
2698
2699 err_register:
2700 err_hw_init:
2701 err_sw_init:
2702 err_eeprom:
2703 iounmap(hw->hw_addr);
2704 err_ioremap:
2705 free_netdev(netdev);
2706 err_alloc_etherdev:
2707 pci_release_regions(pdev);
2708 err_pci_reg:
2709 err_dma:
2710 pci_disable_device(pdev);
2711 return err;
2712 }
2713
2714 /**
2715 * ixgbe_remove - Device Removal Routine
2716 * @pdev: PCI device information struct
2717 *
2718 * ixgbe_remove is called by the PCI subsystem to alert the driver
2719 * that it should release a PCI device. The could be caused by a
2720 * Hot-Plug event, or because the driver is going to be removed from
2721 * memory.
2722 **/
2723 static void __devexit ixgbe_remove(struct pci_dev *pdev)
2724 {
2725 struct net_device *netdev = pci_get_drvdata(pdev);
2726 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2727
2728 set_bit(__IXGBE_DOWN, &adapter->state);
2729 del_timer_sync(&adapter->watchdog_timer);
2730
2731 flush_scheduled_work();
2732
2733 unregister_netdev(netdev);
2734
2735 kfree(adapter->tx_ring);
2736 kfree(adapter->rx_ring);
2737
2738 iounmap(adapter->hw.hw_addr);
2739 pci_release_regions(pdev);
2740
2741 free_netdev(netdev);
2742
2743 pci_disable_device(pdev);
2744 }
2745
2746 /**
2747 * ixgbe_io_error_detected - called when PCI error is detected
2748 * @pdev: Pointer to PCI device
2749 * @state: The current pci connection state
2750 *
2751 * This function is called after a PCI bus error affecting
2752 * this device has been detected.
2753 */
2754 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2755 pci_channel_state_t state)
2756 {
2757 struct net_device *netdev = pci_get_drvdata(pdev);
2758 struct ixgbe_adapter *adapter = netdev->priv;
2759
2760 netif_device_detach(netdev);
2761
2762 if (netif_running(netdev))
2763 ixgbe_down(adapter);
2764 pci_disable_device(pdev);
2765
2766 /* Request a slot slot reset. */
2767 return PCI_ERS_RESULT_NEED_RESET;
2768 }
2769
2770 /**
2771 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2772 * @pdev: Pointer to PCI device
2773 *
2774 * Restart the card from scratch, as if from a cold-boot.
2775 */
2776 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2777 {
2778 struct net_device *netdev = pci_get_drvdata(pdev);
2779 struct ixgbe_adapter *adapter = netdev->priv;
2780
2781 if (pci_enable_device(pdev)) {
2782 DPRINTK(PROBE, ERR,
2783 "Cannot re-enable PCI device after reset.\n");
2784 return PCI_ERS_RESULT_DISCONNECT;
2785 }
2786 pci_set_master(pdev);
2787
2788 pci_enable_wake(pdev, PCI_D3hot, 0);
2789 pci_enable_wake(pdev, PCI_D3cold, 0);
2790
2791 ixgbe_reset(adapter);
2792
2793 return PCI_ERS_RESULT_RECOVERED;
2794 }
2795
2796 /**
2797 * ixgbe_io_resume - called when traffic can start flowing again.
2798 * @pdev: Pointer to PCI device
2799 *
2800 * This callback is called when the error recovery driver tells us that
2801 * its OK to resume normal operation.
2802 */
2803 static void ixgbe_io_resume(struct pci_dev *pdev)
2804 {
2805 struct net_device *netdev = pci_get_drvdata(pdev);
2806 struct ixgbe_adapter *adapter = netdev->priv;
2807
2808 if (netif_running(netdev)) {
2809 if (ixgbe_up(adapter)) {
2810 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2811 return;
2812 }
2813 }
2814
2815 netif_device_attach(netdev);
2816
2817 }
2818
2819 static struct pci_error_handlers ixgbe_err_handler = {
2820 .error_detected = ixgbe_io_error_detected,
2821 .slot_reset = ixgbe_io_slot_reset,
2822 .resume = ixgbe_io_resume,
2823 };
2824
2825 static struct pci_driver ixgbe_driver = {
2826 .name = ixgbe_driver_name,
2827 .id_table = ixgbe_pci_tbl,
2828 .probe = ixgbe_probe,
2829 .remove = __devexit_p(ixgbe_remove),
2830 #ifdef CONFIG_PM
2831 .suspend = ixgbe_suspend,
2832 .resume = ixgbe_resume,
2833 #endif
2834 .shutdown = ixgbe_shutdown,
2835 .err_handler = &ixgbe_err_handler
2836 };
2837
2838 /**
2839 * ixgbe_init_module - Driver Registration Routine
2840 *
2841 * ixgbe_init_module is the first routine called when the driver is
2842 * loaded. All it does is register with the PCI subsystem.
2843 **/
2844 static int __init ixgbe_init_module(void)
2845 {
2846 int ret;
2847 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2848 ixgbe_driver_string, ixgbe_driver_version);
2849
2850 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2851
2852 ret = pci_register_driver(&ixgbe_driver);
2853 return ret;
2854 }
2855 module_init(ixgbe_init_module);
2856
2857 /**
2858 * ixgbe_exit_module - Driver Exit Cleanup Routine
2859 *
2860 * ixgbe_exit_module is called just before the driver is removed
2861 * from memory.
2862 **/
2863 static void __exit ixgbe_exit_module(void)
2864 {
2865 pci_unregister_driver(&ixgbe_driver);
2866 }
2867 module_exit(ixgbe_exit_module);
2868
2869 /* ixgbe_main.c */
WRT350N Kernel Patches