x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / net / wireless / p54common.h
bloba721334e20d96db17af5e4dd760fdaf90f00c4a0
1 #ifndef PRISM54COMMON_H
2 #define PRISM54COMMON_H
4 /*
5 * Common code specific definitions for mac80211 Prism54 drivers
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
10 * Based on the islsm (softmac prism54) driver, which is:
11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 struct bootrec {
19 __le32 code;
20 __le32 len;
21 u32 data[0];
22 } __attribute__((packed));
24 struct bootrec_exp_if {
25 __le16 role;
26 __le16 if_id;
27 __le16 variant;
28 __le16 btm_compat;
29 __le16 top_compat;
30 } __attribute__((packed));
32 #define BR_CODE_MIN 0x80000000
33 #define BR_CODE_COMPONENT_ID 0x80000001
34 #define BR_CODE_COMPONENT_VERSION 0x80000002
35 #define BR_CODE_DEPENDENT_IF 0x80000003
36 #define BR_CODE_EXPOSED_IF 0x80000004
37 #define BR_CODE_DESCR 0x80000101
38 #define BR_CODE_MAX 0x8FFFFFFF
39 #define BR_CODE_END_OF_BRA 0xFF0000FF
40 #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
42 #define FW_FMAC 0x464d4143
43 #define FW_LM86 0x4c4d3836
44 #define FW_LM87 0x4c4d3837
45 #define FW_LM20 0x4c4d3230
47 /* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
49 struct pda_entry {
50 __le16 len; /* includes both code and data */
51 __le16 code;
52 u8 data[0];
53 } __attribute__ ((packed));
55 struct eeprom_pda_wrap {
56 u32 magic;
57 u16 pad;
58 u16 len;
59 u32 arm_opcode;
60 u8 data[0];
61 } __attribute__ ((packed));
63 struct pda_iq_autocal_entry {
64 __le16 freq;
65 __le16 iq_param[4];
66 } __attribute__ ((packed));
68 struct pda_channel_output_limit {
69 __le16 freq;
70 u8 val_bpsk;
71 u8 val_qpsk;
72 u8 val_16qam;
73 u8 val_64qam;
74 u8 rate_set_mask;
75 u8 rate_set_size;
76 } __attribute__ ((packed));
78 struct pda_pa_curve_data_sample_rev0 {
79 u8 rf_power;
80 u8 pa_detector;
81 u8 pcv;
82 } __attribute__ ((packed));
84 struct pda_pa_curve_data_sample_rev1 {
85 u8 rf_power;
86 u8 pa_detector;
87 u8 data_barker;
88 u8 data_bpsk;
89 u8 data_qpsk;
90 u8 data_16qam;
91 u8 data_64qam;
92 u8 padding;
93 } __attribute__ ((packed));
95 struct pda_pa_curve_data {
96 u8 cal_method_rev;
97 u8 channels;
98 u8 points_per_channel;
99 u8 padding;
100 u8 data[0];
101 } __attribute__ ((packed));
104 * this defines the PDR codes used to build PDAs as defined in document
105 * number 553155. The current implementation mirrors version 1.1 of the
106 * document and lists only PDRs supported by the ARM platform.
109 /* common and choice range (0x0000 - 0x0fff) */
110 #define PDR_END 0x0000
111 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
112 #define PDR_PDA_VERSION 0x0002
113 #define PDR_NIC_SERIAL_NUMBER 0x0003
115 #define PDR_MAC_ADDRESS 0x0101
116 #define PDR_REGULATORY_DOMAIN_LIST 0x0103
117 #define PDR_TEMPERATURE_TYPE 0x0107
119 #define PDR_PRISM_PCI_IDENTIFIER 0x0402
121 /* ARM range (0x1000 - 0x1fff) */
122 #define PDR_COUNTRY_INFORMATION 0x1000
123 #define PDR_INTERFACE_LIST 0x1001
124 #define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
125 #define PDR_OEM_NAME 0x1003
126 #define PDR_PRODUCT_NAME 0x1004
127 #define PDR_UTF8_OEM_NAME 0x1005
128 #define PDR_UTF8_PRODUCT_NAME 0x1006
129 #define PDR_COUNTRY_LIST 0x1007
130 #define PDR_DEFAULT_COUNTRY 0x1008
132 #define PDR_ANTENNA_GAIN 0x1100
134 #define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
135 #define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
136 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
137 #define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
138 #define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
139 #define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
140 #define PDR_REGULATORY_POWER_LIMITS 0x1907
141 #define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
142 #define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
143 #define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
145 /* reserved range (0x2000 - 0x7fff) */
147 /* customer range (0x8000 - 0xffff) */
148 #define PDR_BASEBAND_REGISTERS 0x8000
149 #define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
151 /* stored in skb->cb */
152 struct memrecord {
153 u32 start_addr;
154 u32 end_addr;
155 struct ieee80211_tx_control *control;
158 struct p54_eeprom_lm86 {
159 __le16 offset;
160 __le16 len;
161 u8 data[0];
162 } __attribute__ ((packed));
164 struct p54_rx_hdr {
165 __le16 magic;
166 __le16 len;
167 __le16 freq;
168 u8 antenna;
169 u8 rate;
170 u8 rssi;
171 u8 quality;
172 u16 unknown2;
173 __le64 timestamp;
174 u8 data[0];
175 } __attribute__ ((packed));
177 struct p54_frame_sent_hdr {
178 u8 status;
179 u8 retries;
180 __le16 ack_rssi;
181 __le16 seq;
182 u16 rate;
183 } __attribute__ ((packed));
185 struct p54_tx_control_allocdata {
186 u8 rateset[8];
187 u16 padding;
188 u8 wep_key_present;
189 u8 wep_key_len;
190 u8 wep_key[16];
191 __le32 frame_type;
192 u32 padding2;
193 __le16 magic4;
194 u8 antenna;
195 u8 output_power;
196 __le32 magic5;
197 u8 align[0];
198 } __attribute__ ((packed));
200 struct p54_tx_control_filter {
201 __le16 filter_type;
202 u8 dst[ETH_ALEN];
203 u8 src[ETH_ALEN];
204 u8 antenna;
205 u8 debug;
206 __le32 magic3;
207 u8 rates[8]; // FIXME: what's this for?
208 __le32 rx_addr;
209 __le16 max_rx;
210 __le16 rxhw;
211 __le16 magic8;
212 __le16 magic9;
213 } __attribute__ ((packed));
215 struct p54_tx_control_channel {
216 __le16 magic1;
217 __le16 magic2;
218 u8 padding1[20];
219 struct pda_iq_autocal_entry iq_autocal;
220 u8 pa_points_per_curve;
221 u8 val_barker;
222 u8 val_bpsk;
223 u8 val_qpsk;
224 u8 val_16qam;
225 u8 val_64qam;
226 struct pda_pa_curve_data_sample_rev1 curve_data[0];
227 /* additional padding/data after curve_data */
228 } __attribute__ ((packed));
230 struct p54_tx_control_led {
231 __le16 mode;
232 __le16 led_temporary;
233 __le16 led_permanent;
234 __le16 duration;
235 } __attribute__ ((packed));
237 struct p54_tx_vdcf_queues {
238 __le16 aifs;
239 __le16 cwmin;
240 __le16 cwmax;
241 __le16 txop;
242 } __attribute__ ((packed));
244 struct p54_tx_control_vdcf {
245 u8 padding;
246 u8 slottime;
247 u8 magic1;
248 u8 magic2;
249 struct p54_tx_vdcf_queues queue[8];
250 u8 pad2[4];
251 __le16 frameburst;
252 } __attribute__ ((packed));
254 static const struct ieee80211_rate p54_rates[] = {
255 { .rate = 10,
256 .val = 0,
257 .val2 = 0x10,
258 .flags = IEEE80211_RATE_CCK_2 },
259 { .rate = 20,
260 .val = 1,
261 .val2 = 0x11,
262 .flags = IEEE80211_RATE_CCK_2 },
263 { .rate = 55,
264 .val = 2,
265 .val2 = 0x12,
266 .flags = IEEE80211_RATE_CCK_2 },
267 { .rate = 110,
268 .val = 3,
269 .val2 = 0x13,
270 .flags = IEEE80211_RATE_CCK_2 },
271 { .rate = 60,
272 .val = 4,
273 .flags = IEEE80211_RATE_OFDM },
274 { .rate = 90,
275 .val = 5,
276 .flags = IEEE80211_RATE_OFDM },
277 { .rate = 120,
278 .val = 6,
279 .flags = IEEE80211_RATE_OFDM },
280 { .rate = 180,
281 .val = 7,
282 .flags = IEEE80211_RATE_OFDM },
283 { .rate = 240,
284 .val = 8,
285 .flags = IEEE80211_RATE_OFDM },
286 { .rate = 360,
287 .val = 9,
288 .flags = IEEE80211_RATE_OFDM },
289 { .rate = 480,
290 .val = 10,
291 .flags = IEEE80211_RATE_OFDM },
292 { .rate = 540,
293 .val = 11,
294 .flags = IEEE80211_RATE_OFDM },
297 // TODO: just generate this..
298 static const struct ieee80211_channel p54_channels[] = {
299 { .chan = 1,
300 .freq = 2412},
301 { .chan = 2,
302 .freq = 2417},
303 { .chan = 3,
304 .freq = 2422},
305 { .chan = 4,
306 .freq = 2427},
307 { .chan = 5,
308 .freq = 2432},
309 { .chan = 6,
310 .freq = 2437},
311 { .chan = 7,
312 .freq = 2442},
313 { .chan = 8,
314 .freq = 2447},
315 { .chan = 9,
316 .freq = 2452},
317 { .chan = 10,
318 .freq = 2457},
319 { .chan = 11,
320 .freq = 2462},
321 { .chan = 12,
322 .freq = 2467},
323 { .chan = 13,
324 .freq = 2472},
325 { .chan = 14,
326 .freq = 2484}
329 #endif /* PRISM54COMMON_H */