x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / net / wireless / rtl8180.h
blob2cbfe3c8081f9acf1ac9d90c676e44e1615e24e3
1 #ifndef RTL8180_H
2 #define RTL8180_H
4 #include "rtl818x.h"
6 #define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD
8 #define RF_PARAM_ANALOGPHY (1 << 0)
9 #define RF_PARAM_ANTBDEFAULT (1 << 1)
10 #define RF_PARAM_CARRIERSENSE1 (1 << 2)
11 #define RF_PARAM_CARRIERSENSE2 (1 << 3)
13 #define BB_ANTATTEN_CHAN14 0x0C
14 #define BB_ANTENNA_B 0x40
16 #define BB_HOST_BANG (1 << 30)
17 #define BB_HOST_BANG_EN (1 << 2)
18 #define BB_HOST_BANG_CLK (1 << 1)
19 #define BB_HOST_BANG_DATA 1
21 #define ANAPARAM_TXDACOFF_SHIFT 27
22 #define ANAPARAM_PWR0_SHIFT 28
23 #define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
24 #define ANAPARAM_PWR1_SHIFT 20
25 #define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
27 enum rtl8180_tx_desc_flags {
28 RTL8180_TX_DESC_FLAG_NO_ENC = (1 << 15),
29 RTL8180_TX_DESC_FLAG_TX_OK = (1 << 15),
30 RTL8180_TX_DESC_FLAG_SPLCP = (1 << 16),
31 RTL8180_TX_DESC_FLAG_RX_UNDER = (1 << 16),
32 RTL8180_TX_DESC_FLAG_MOREFRAG = (1 << 17),
33 RTL8180_TX_DESC_FLAG_CTS = (1 << 18),
34 RTL8180_TX_DESC_FLAG_RTS = (1 << 23),
35 RTL8180_TX_DESC_FLAG_LS = (1 << 28),
36 RTL8180_TX_DESC_FLAG_FS = (1 << 29),
37 RTL8180_TX_DESC_FLAG_DMA = (1 << 30),
38 RTL8180_TX_DESC_FLAG_OWN = (1 << 31)
41 struct rtl8180_tx_desc {
42 __le32 flags;
43 __le16 rts_duration;
44 __le16 plcp_len;
45 __le32 tx_buf;
46 __le32 frame_len;
47 __le32 next_tx_desc;
48 u8 cw;
49 u8 retry_limit;
50 u8 agc;
51 u8 flags2;
52 u32 reserved[2];
53 } __attribute__ ((packed));
55 enum rtl8180_rx_desc_flags {
56 RTL8180_RX_DESC_FLAG_ICV_ERR = (1 << 12),
57 RTL8180_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
58 RTL8180_RX_DESC_FLAG_PM = (1 << 14),
59 RTL8180_RX_DESC_FLAG_RX_ERR = (1 << 15),
60 RTL8180_RX_DESC_FLAG_BCAST = (1 << 16),
61 RTL8180_RX_DESC_FLAG_PAM = (1 << 17),
62 RTL8180_RX_DESC_FLAG_MCAST = (1 << 18),
63 RTL8180_RX_DESC_FLAG_SPLCP = (1 << 25),
64 RTL8180_RX_DESC_FLAG_FOF = (1 << 26),
65 RTL8180_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
66 RTL8180_RX_DESC_FLAG_LS = (1 << 28),
67 RTL8180_RX_DESC_FLAG_FS = (1 << 29),
68 RTL8180_RX_DESC_FLAG_EOR = (1 << 30),
69 RTL8180_RX_DESC_FLAG_OWN = (1 << 31)
72 struct rtl8180_rx_desc {
73 __le32 flags;
74 __le32 flags2;
75 union {
76 __le32 rx_buf;
77 __le64 tsft;
79 } __attribute__ ((packed));
81 struct rtl8180_tx_ring {
82 struct rtl8180_tx_desc *desc;
83 dma_addr_t dma;
84 unsigned int idx;
85 unsigned int entries;
86 struct sk_buff_head queue;
89 struct rtl8180_priv {
90 /* common between rtl818x drivers */
91 struct rtl818x_csr __iomem *map;
92 const struct rtl818x_rf_ops *rf;
93 struct ieee80211_vif *vif;
94 int mode;
96 /* rtl8180 driver specific */
97 spinlock_t lock;
98 struct rtl8180_rx_desc *rx_ring;
99 dma_addr_t rx_ring_dma;
100 unsigned int rx_idx;
101 struct sk_buff *rx_buf[32];
102 struct rtl8180_tx_ring tx_ring[4];
103 struct ieee80211_channel channels[14];
104 struct ieee80211_rate rates[12];
105 struct ieee80211_hw_mode modes[2];
106 struct pci_dev *pdev;
107 u32 rx_conf;
109 int r8185;
110 u32 anaparam;
111 u16 rfparam;
112 u8 csthreshold;
115 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
116 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);
118 static inline u8 rtl818x_ioread8(struct rtl8180_priv *priv, u8 __iomem *addr)
120 return ioread8(addr);
123 static inline u16 rtl818x_ioread16(struct rtl8180_priv *priv, __le16 __iomem *addr)
125 return ioread16(addr);
128 static inline u32 rtl818x_ioread32(struct rtl8180_priv *priv, __le32 __iomem *addr)
130 return ioread32(addr);
133 static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
134 u8 __iomem *addr, u8 val)
136 iowrite8(val, addr);
139 static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
140 __le16 __iomem *addr, u16 val)
142 iowrite16(val, addr);
145 static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
146 __le32 __iomem *addr, u32 val)
148 iowrite32(val, addr);
151 #endif /* RTL8180_H */