include/asm-xtensa/processor.h

   1 /*
   2  * include/asm-xtensa/processor.h
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2005 Tensilica Inc.
   9  */
  10
  11 #ifndef _XTENSA_PROCESSOR_H
  12 #define _XTENSA_PROCESSOR_H
  13
  14 #include <asm/variant/core.h>
  15 #include <asm/coprocessor.h>
  16
  17 #include <linux/compiler.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/types.h>
  20 #include <asm/regs.h>
  21
  22 /* Assertions. */
  23
  24 #if (XCHAL_HAVE_WINDOWED != 1)
  25 # error Linux requires the Xtensa Windowed Registers Option.
  26 #endif
  27
  28 /*
  29  * User space process size: 1 GB.
  30  * Windowed call ABI requires caller and callee to be located within the same
  31  * 1 GB region. The C compiler places trampoline code on the stack for sources
  32  * that take the address of a nested C function (a feature used by glibc), so
  33  * the 1 GB requirement applies to the stack as well.
  34  */
  35
  36 #define TASK_SIZE       __XTENSA_UL_CONST(0x40000000)
  37
  38 /*
  39  * General exception cause assigned to debug exceptions. Debug exceptions go
  40  * to their own vector, rather than the general exception vectors (user,
  41  * kernel, double); and their specific causes are reported via DEBUGCAUSE
  42  * rather than EXCCAUSE.  However it is sometimes convenient to redirect debug
  43  * exceptions to the general exception mechanism.  To do this, an otherwise
  44  * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
  45  */
  46
  47 #define EXCCAUSE_MAPPED_DEBUG   63
  48
  49 /*
  50  * We use DEPC also as a flag to distinguish between double and regular
  51  * exceptions. For performance reasons, DEPC might contain the value of
  52  * EXCCAUSE for regular exceptions, so we use this definition to mark a
  53  * valid double exception address.
  54  * (Note: We use it in bgeui, so it should be 64, 128, or 256)
  55  */
  56
  57 #define VALID_DOUBLE_EXCEPTION_ADDRESS  64
  58
  59 /* LOCKLEVEL defines the interrupt level that masks all
  60  * general-purpose interrupts.
  61  */
  62 #define LOCKLEVEL 1
  63
  64 /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
  65  * registers
  66  */
  67 #define WSBITS  (XCHAL_NUM_AREGS / 4)      /* width of WINDOWSTART in bits */
  68 #define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
  69
  70 #ifndef __ASSEMBLY__
  71
  72 /* Build a valid return address for the specified call winsize.
  73  * winsize must be 1 (call4), 2 (call8), or 3 (call12)
  74  */
  75 #define MAKE_RA_FOR_CALL(ra,ws)   (((ra) & 0x3fffffff) | (ws) << 30)
  76
  77 /* Convert return address to a valid pc
  78  * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
  79  */
  80 #define MAKE_PC_FROM_RA(ra,sp)    (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
  81
  82 typedef struct {
  83     unsigned long seg;
  84 } mm_segment_t;
  85
  86 struct thread_struct {
  87
  88         /* kernel's return address and stack pointer for context switching */
  89         unsigned long ra; /* kernel's a0: return address and window call size */
  90         unsigned long sp; /* kernel's a1: stack pointer */
  91
  92         mm_segment_t current_ds;    /* see uaccess.h for example uses */
  93
  94         /* struct xtensa_cpuinfo info; */
  95
  96         unsigned long bad_vaddr; /* last user fault */
  97         unsigned long bad_uaddr; /* last kernel fault accessing user space */
  98         unsigned long error_code;
  99
 100         unsigned long ibreak[XCHAL_NUM_IBREAK];
 101         unsigned long dbreaka[XCHAL_NUM_DBREAK];
 102         unsigned long dbreakc[XCHAL_NUM_DBREAK];
 103
 104         /* Allocate storage for extra state and coprocessor state. */
 105         unsigned char cp_save[XTENSA_CP_EXTRA_SIZE]
 106                 __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN)));
 107
 108         /* Make structure 16 bytes aligned. */
 109         int align[0] __attribute__ ((aligned(16)));
 110 };
 111
 112
 113 /*
 114  * Default implementation of macro that returns current
 115  * instruction pointer ("program counter").
 116  */
 117 #define current_text_addr()  ({ __label__ _l; _l: &&_l;})
 118
 119
 120 /* This decides where the kernel will search for a free chunk of vm
 121  * space during mmap's.
 122  */
 123 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 2)
 124
 125 #define INIT_THREAD  \
 126 {                                                                       \
 127         ra:             0,                                              \
 128         sp:             sizeof(init_stack) + (long) &init_stack,        \
 129         current_ds:     {0},                                            \
 130         /*info:         {0}, */                                         \
 131         bad_vaddr:      0,                                              \
 132         bad_uaddr:      0,                                              \
 133         error_code:     0,                                              \
 134 }
 135
 136
 137 /*
 138  * Do necessary setup to start up a newly executed thread.
 139  * Note: We set-up ps as if we did a call4 to the new pc.
 140  *       set_thread_state in signal.c depends on it.
 141  */
 142 #define USER_PS_VALUE ((1 << PS_WOE_BIT) |                              \
 143                        (1 << PS_CALLINC_SHIFT) |                        \
 144                        (USER_RING << PS_RING_SHIFT) |                   \
 145                        (1 << PS_UM_BIT) |                               \
 146                        (1 << PS_EXCM_BIT))
 147
 148 /* Clearing a0 terminates the backtrace. */
 149 #define start_thread(regs, new_pc, new_sp) \
 150         regs->pc = new_pc; \
 151         regs->ps = USER_PS_VALUE; \
 152         regs->areg[1] = new_sp; \
 153         regs->areg[0] = 0; \
 154         regs->wmask = 1; \
 155         regs->depc = 0; \
 156         regs->windowbase = 0; \
 157         regs->windowstart = 1;
 158
 159 /* Forward declaration */
 160 struct task_struct;
 161 struct mm_struct;
 162
 163 // FIXME: do we need release_thread for CP??
 164 /* Free all resources held by a thread. */
 165 #define release_thread(thread) do { } while(0)
 166
 167 // FIXME: do we need prepare_to_copy (lazy status) for CP??
 168 /* Prepare to copy thread state - unlazy all lazy status */
 169 #define prepare_to_copy(tsk)    do { } while (0)
 170
 171 /*
 172  * create a kernel thread without removing it from tasklists
 173  */
 174 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 175
 176 /* Copy and release all segment info associated with a VM */
 177
 178 #define copy_segments(p, mm)    do { } while(0)
 179 #define release_segments(mm)    do { } while(0)
 180 #define forget_segments()       do { } while (0)
 181
 182 #define thread_saved_pc(tsk)    (task_pt_regs(tsk)->pc)
 183
 184 extern unsigned long get_wchan(struct task_struct *p);
 185
 186 #define KSTK_EIP(tsk)           (task_pt_regs(tsk)->pc)
 187 #define KSTK_ESP(tsk)           (task_pt_regs(tsk)->areg[1])
 188
 189 #define cpu_relax()  barrier()
 190
 191 /* Special register access. */
 192
 193 #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
 194 #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
 195
 196 #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
 197 #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
 198
 199 #endif  /* __ASSEMBLY__ */
 200 #endif  /* _XTENSA_PROCESSOR_H */