?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
x86: rodata config hookup
[wrt350n-kernel.git] / sound / pci / nm256 / nm256.c
blob276c5763f0e5dc0e2894d14c4daca58293b2ff00
1 /*
2 * Driver for NeoMagic 256AV and 256ZX chipsets.
3 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
4 *
5 * Based on nm256_audio.c OSS driver in linux kernel.
6 * The original author of OSS nm256 driver wishes to remain anonymous,
7 * so I just put my acknoledgment to him/her here.
8 * The original author's web page is found at
9 * http://www.uglx.org/sony.html
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <sound/driver.h>
28 #include <asm/io.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/init.h>
32 #include <linux/pci.h>
33 #include <linux/slab.h>
34 #include <linux/moduleparam.h>
35 #include <linux/mutex.h>
36
37 #include <sound/core.h>
38 #include <sound/info.h>
39 #include <sound/control.h>
40 #include <sound/pcm.h>
41 #include <sound/ac97_codec.h>
42 #include <sound/initval.h>
43
44 #define CARD_NAME "NeoMagic 256AV/ZX"
45 #define DRIVER_NAME "NM256"
46
47 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
48 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
49 MODULE_LICENSE("GPL");
50 MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
51 "{NeoMagic,NM256ZX}}");
52
53 /*
54 * some compile conditions.
55 */
56
57 static int index = SNDRV_DEFAULT_IDX1; /* Index */
58 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
59 static int playback_bufsize = 16;
60 static int capture_bufsize = 16;
61 static int force_ac97; /* disabled as default */
62 static int buffer_top; /* not specified */
63 static int use_cache; /* disabled */
64 static int vaio_hack; /* disabled */
65 static int reset_workaround;
66 static int reset_workaround_2;
67
68 module_param(index, int, 0444);
69 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
70 module_param(id, charp, 0444);
71 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
72 module_param(playback_bufsize, int, 0444);
73 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
74 module_param(capture_bufsize, int, 0444);
75 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
76 module_param(force_ac97, bool, 0444);
77 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
78 module_param(buffer_top, int, 0444);
79 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
80 module_param(use_cache, bool, 0444);
81 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
82 module_param(vaio_hack, bool, 0444);
83 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
84 module_param(reset_workaround, bool, 0444);
85 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
86 module_param(reset_workaround_2, bool, 0444);
87 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
88
89 /* just for backward compatibility */
90 static int enable;
91 module_param(enable, bool, 0444);
92
93
94
95 /*
96 * hw definitions
97 */
98
99 /* The BIOS signature. */
100 #define NM_SIGNATURE 0x4e4d0000
101 /* Signature mask. */
102 #define NM_SIG_MASK 0xffff0000
103
104 /* Size of the second memory area. */
105 #define NM_PORT2_SIZE 4096
106
107 /* The base offset of the mixer in the second memory area. */
108 #define NM_MIXER_OFFSET 0x600
109
110 /* The maximum size of a coefficient entry. */
111 #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
112 #define NM_MAX_RECORD_COEF_SIZE 0x1260
113
114 /* The interrupt register. */
115 #define NM_INT_REG 0xa04
116 /* And its bits. */
117 #define NM_PLAYBACK_INT 0x40
118 #define NM_RECORD_INT 0x100
119 #define NM_MISC_INT_1 0x4000
120 #define NM_MISC_INT_2 0x1
121 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
122
123 /* The AV's "mixer ready" status bit and location. */
124 #define NM_MIXER_STATUS_OFFSET 0xa04
125 #define NM_MIXER_READY_MASK 0x0800
126 #define NM_MIXER_PRESENCE 0xa06
127 #define NM_PRESENCE_MASK 0x0050
128 #define NM_PRESENCE_VALUE 0x0040
129
130 /*
131 * For the ZX. It uses the same interrupt register, but it holds 32
132 * bits instead of 16.
133 */
134 #define NM2_PLAYBACK_INT 0x10000
135 #define NM2_RECORD_INT 0x80000
136 #define NM2_MISC_INT_1 0x8
137 #define NM2_MISC_INT_2 0x2
138 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
139
140 /* The ZX's "mixer ready" status bit and location. */
141 #define NM2_MIXER_STATUS_OFFSET 0xa06
142 #define NM2_MIXER_READY_MASK 0x0800
143
144 /* The playback registers start from here. */
145 #define NM_PLAYBACK_REG_OFFSET 0x0
146 /* The record registers start from here. */
147 #define NM_RECORD_REG_OFFSET 0x200
148
149 /* The rate register is located 2 bytes from the start of the register area. */
150 #define NM_RATE_REG_OFFSET 2
151
152 /* Mono/stereo flag, number of bits on playback, and rate mask. */
153 #define NM_RATE_STEREO 1
154 #define NM_RATE_BITS_16 2
155 #define NM_RATE_MASK 0xf0
156
157 /* Playback enable register. */
158 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
159 #define NM_PLAYBACK_ENABLE_FLAG 1
160 #define NM_PLAYBACK_ONESHOT 2
161 #define NM_PLAYBACK_FREERUN 4
162
163 /* Mutes the audio output. */
164 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
165 #define NM_AUDIO_MUTE_LEFT 0x8000
166 #define NM_AUDIO_MUTE_RIGHT 0x0080
167
168 /* Recording enable register. */
169 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
170 #define NM_RECORD_ENABLE_FLAG 1
171 #define NM_RECORD_FREERUN 2
172
173 /* coefficient buffer pointer */
174 #define NM_COEFF_START_OFFSET 0x1c
175 #define NM_COEFF_END_OFFSET 0x20
176
177 /* DMA buffer offsets */
178 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
179 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
180 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
181 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
182
183 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
184 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
185 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
186 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
187
188 struct nm256_stream {
189
190 struct nm256 *chip;
191 struct snd_pcm_substream *substream;
192 int running;
193 int suspended;
194
195 u32 buf; /* offset from chip->buffer */
196 int bufsize; /* buffer size in bytes */
197 void __iomem *bufptr; /* mapped pointer */
198 unsigned long bufptr_addr; /* physical address of the mapped pointer */
199
200 int dma_size; /* buffer size of the substream in bytes */
201 int period_size; /* period size in bytes */
202 int periods; /* # of periods */
203 int shift; /* bit shifts */
204 int cur_period; /* current period # */
205
206 };
207
208 struct nm256 {
209
210 struct snd_card *card;
211
212 void __iomem *cport; /* control port */
213 struct resource *res_cport; /* its resource */
214 unsigned long cport_addr; /* physical address */
215
216 void __iomem *buffer; /* buffer */
217 struct resource *res_buffer; /* its resource */
218 unsigned long buffer_addr; /* buffer phyiscal address */
219
220 u32 buffer_start; /* start offset from pci resource 0 */
221 u32 buffer_end; /* end offset */
222 u32 buffer_size; /* total buffer size */
223
224 u32 all_coeff_buf; /* coefficient buffer */
225 u32 coeff_buf[2]; /* coefficient buffer for each stream */
226
227 unsigned int coeffs_current: 1; /* coeff. table is loaded? */
228 unsigned int use_cache: 1; /* use one big coef. table */
229 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
230 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
231 unsigned int in_resume: 1;
232
233 int mixer_base; /* register offset of ac97 mixer */
234 int mixer_status_offset; /* offset of mixer status reg. */
235 int mixer_status_mask; /* bit mask to test the mixer status */
236
237 int irq;
238 int irq_acks;
239 irq_handler_t interrupt;
240 int badintrcount; /* counter to check bogus interrupts */
241 struct mutex irq_mutex;
242
243 struct nm256_stream streams[2];
244
245 struct snd_ac97 *ac97;
246 unsigned short *ac97_regs; /* register caches, only for valid regs */
247
248 struct snd_pcm *pcm;
249
250 struct pci_dev *pci;
251
252 spinlock_t reg_lock;
253
254 };
255
256
257 /*
258 * include coefficient table
259 */
260 #include "nm256_coef.c"
261
262
263 /*
264 * PCI ids
265 */
266 static struct pci_device_id snd_nm256_ids[] = {
267 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
268 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
269 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
270 {0,},
271 };
272
273 MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
274
275
276 /*
277 * lowlvel stuffs
278 */
279
280 static inline u8
281 snd_nm256_readb(struct nm256 *chip, int offset)
282 {
283 return readb(chip->cport + offset);
284 }
285
286 static inline u16
287 snd_nm256_readw(struct nm256 *chip, int offset)
288 {
289 return readw(chip->cport + offset);
290 }
291
292 static inline u32
293 snd_nm256_readl(struct nm256 *chip, int offset)
294 {
295 return readl(chip->cport + offset);
296 }
297
298 static inline void
299 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
300 {
301 writeb(val, chip->cport + offset);
302 }
303
304 static inline void
305 snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
306 {
307 writew(val, chip->cport + offset);
308 }
309
310 static inline void
311 snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
312 {
313 writel(val, chip->cport + offset);
314 }
315
316 static inline void
317 snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
318 {
319 offset -= chip->buffer_start;
320 #ifdef CONFIG_SND_DEBUG
321 if (offset < 0 || offset >= chip->buffer_size) {
322 snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
323 offset, size);
324 return;
325 }
326 #endif
327 memcpy_toio(chip->buffer + offset, src, size);
328 }
329
330 /*
331 * coefficient handlers -- what a magic!
332 */
333
334 static u16
335 snd_nm256_get_start_offset(int which)
336 {
337 u16 offset = 0;
338 while (which-- > 0)
339 offset += coefficient_sizes[which];
340 return offset;
341 }
342
343 static void
344 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
345 {
346 u32 coeff_buf = chip->coeff_buf[stream];
347 u16 offset = snd_nm256_get_start_offset(which);
348 u16 size = coefficient_sizes[which];
349
350 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
351 snd_nm256_writel(chip, port, coeff_buf);
352 /* ??? Record seems to behave differently than playback. */
353 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
354 size--;
355 snd_nm256_writel(chip, port + 4, coeff_buf + size);
356 }
357
358 static void
359 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
360 {
361 /* The enable register for the specified engine. */
362 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
363 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
364 u32 addr = NM_COEFF_START_OFFSET;
365
366 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
367 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
368
369 if (snd_nm256_readb(chip, poffset) & 1) {
370 snd_printd("NM256: Engine was enabled while loading coefficients!\n");
371 return;
372 }
373
374 /* The recording engine uses coefficient values 8-15. */
375 number &= 7;
376 if (stream == SNDRV_PCM_STREAM_CAPTURE)
377 number += 8;
378
379 if (! chip->use_cache) {
380 snd_nm256_load_one_coefficient(chip, stream, addr, number);
381 return;
382 }
383 if (! chip->coeffs_current) {
384 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
385 NM_TOTAL_COEFF_COUNT * 4);
386 chip->coeffs_current = 1;
387 } else {
388 u32 base = chip->all_coeff_buf;
389 u32 offset = snd_nm256_get_start_offset(number);
390 u32 end_offset = offset + coefficient_sizes[number];
391 snd_nm256_writel(chip, addr, base + offset);
392 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
393 end_offset--;
394 snd_nm256_writel(chip, addr + 4, base + end_offset);
395 }
396 }
397
398
399 /* The actual rates supported by the card. */
400 static unsigned int samplerates[8] = {
401 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
402 };
403 static struct snd_pcm_hw_constraint_list constraints_rates = {
404 .count = ARRAY_SIZE(samplerates),
405 .list = samplerates,
406 .mask = 0,
407 };
408
409 /*
410 * return the index of the target rate
411 */
412 static int
413 snd_nm256_fixed_rate(unsigned int rate)
414 {
415 unsigned int i;
416 for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
417 if (rate == samplerates[i])
418 return i;
419 }
420 snd_BUG();
421 return 0;
422 }
423
424 /*
425 * set sample rate and format
426 */
427 static void
428 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
429 struct snd_pcm_substream *substream)
430 {
431 struct snd_pcm_runtime *runtime = substream->runtime;
432 int rate_index = snd_nm256_fixed_rate(runtime->rate);
433 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
434
435 s->shift = 0;
436 if (snd_pcm_format_width(runtime->format) == 16) {
437 ratebits |= NM_RATE_BITS_16;
438 s->shift++;
439 }
440 if (runtime->channels > 1) {
441 ratebits |= NM_RATE_STEREO;
442 s->shift++;
443 }
444
445 runtime->rate = samplerates[rate_index];
446
447 switch (substream->stream) {
448 case SNDRV_PCM_STREAM_PLAYBACK:
449 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
450 snd_nm256_writeb(chip,
451 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
452 ratebits);
453 break;
454 case SNDRV_PCM_STREAM_CAPTURE:
455 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
456 snd_nm256_writeb(chip,
457 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
458 ratebits);
459 break;
460 }
461 }
462
463 /* acquire interrupt */
464 static int snd_nm256_acquire_irq(struct nm256 *chip)
465 {
466 mutex_lock(&chip->irq_mutex);
467 if (chip->irq < 0) {
468 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
469 chip->card->driver, chip)) {
470 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
471 mutex_unlock(&chip->irq_mutex);
472 return -EBUSY;
473 }
474 chip->irq = chip->pci->irq;
475 }
476 chip->irq_acks++;
477 mutex_unlock(&chip->irq_mutex);
478 return 0;
479 }
480
481 /* release interrupt */
482 static void snd_nm256_release_irq(struct nm256 *chip)
483 {
484 mutex_lock(&chip->irq_mutex);
485 if (chip->irq_acks > 0)
486 chip->irq_acks--;
487 if (chip->irq_acks == 0 && chip->irq >= 0) {
488 free_irq(chip->irq, chip);
489 chip->irq = -1;
490 }
491 mutex_unlock(&chip->irq_mutex);
492 }
493
494 /*
495 * start / stop
496 */
497
498 /* update the watermark (current period) */
499 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
500 {
501 s->cur_period++;
502 s->cur_period %= s->periods;
503 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
504 }
505
506 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
507 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
508
509 static void
510 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
511 struct snd_pcm_substream *substream)
512 {
513 /* program buffer pointers */
514 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
515 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
516 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
517 snd_nm256_playback_mark(chip, s);
518
519 /* Enable playback engine and interrupts. */
520 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
521 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
522 /* Enable both channels. */
523 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
524 }
525
526 static void
527 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
528 struct snd_pcm_substream *substream)
529 {
530 /* program buffer pointers */
531 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
532 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
533 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
534 snd_nm256_capture_mark(chip, s);
535
536 /* Enable playback engine and interrupts. */
537 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
538 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
539 }
540
541 /* Stop the play engine. */
542 static void
543 snd_nm256_playback_stop(struct nm256 *chip)
544 {
545 /* Shut off sound from both channels. */
546 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
547 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
548 /* Disable play engine. */
549 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
550 }
551
552 static void
553 snd_nm256_capture_stop(struct nm256 *chip)
554 {
555 /* Disable recording engine. */
556 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
557 }
558
559 static int
560 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
561 {
562 struct nm256 *chip = snd_pcm_substream_chip(substream);
563 struct nm256_stream *s = substream->runtime->private_data;
564 int err = 0;
565
566 snd_assert(s != NULL, return -ENXIO);
567
568 spin_lock(&chip->reg_lock);
569 switch (cmd) {
570 case SNDRV_PCM_TRIGGER_RESUME:
571 s->suspended = 0;
572 /* fallthru */
573 case SNDRV_PCM_TRIGGER_START:
574 if (! s->running) {
575 snd_nm256_playback_start(chip, s, substream);
576 s->running = 1;
577 }
578 break;
579 case SNDRV_PCM_TRIGGER_SUSPEND:
580 s->suspended = 1;
581 /* fallthru */
582 case SNDRV_PCM_TRIGGER_STOP:
583 if (s->running) {
584 snd_nm256_playback_stop(chip);
585 s->running = 0;
586 }
587 break;
588 default:
589 err = -EINVAL;
590 break;
591 }
592 spin_unlock(&chip->reg_lock);
593 return err;
594 }
595
596 static int
597 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
598 {
599 struct nm256 *chip = snd_pcm_substream_chip(substream);
600 struct nm256_stream *s = substream->runtime->private_data;
601 int err = 0;
602
603 snd_assert(s != NULL, return -ENXIO);
604
605 spin_lock(&chip->reg_lock);
606 switch (cmd) {
607 case SNDRV_PCM_TRIGGER_START:
608 case SNDRV_PCM_TRIGGER_RESUME:
609 if (! s->running) {
610 snd_nm256_capture_start(chip, s, substream);
611 s->running = 1;
612 }
613 break;
614 case SNDRV_PCM_TRIGGER_STOP:
615 case SNDRV_PCM_TRIGGER_SUSPEND:
616 if (s->running) {
617 snd_nm256_capture_stop(chip);
618 s->running = 0;
619 }
620 break;
621 default:
622 err = -EINVAL;
623 break;
624 }
625 spin_unlock(&chip->reg_lock);
626 return err;
627 }
628
629
630 /*
631 * prepare playback/capture channel
632 */
633 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
634 {
635 struct nm256 *chip = snd_pcm_substream_chip(substream);
636 struct snd_pcm_runtime *runtime = substream->runtime;
637 struct nm256_stream *s = runtime->private_data;
638
639 snd_assert(s, return -ENXIO);
640 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
641 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
642 s->periods = substream->runtime->periods;
643 s->cur_period = 0;
644
645 spin_lock_irq(&chip->reg_lock);
646 s->running = 0;
647 snd_nm256_set_format(chip, s, substream);
648 spin_unlock_irq(&chip->reg_lock);
649
650 return 0;
651 }
652
653
654 /*
655 * get the current pointer
656 */
657 static snd_pcm_uframes_t
658 snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
659 {
660 struct nm256 *chip = snd_pcm_substream_chip(substream);
661 struct nm256_stream *s = substream->runtime->private_data;
662 unsigned long curp;
663
664 snd_assert(s, return 0);
665 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
666 curp %= s->dma_size;
667 return bytes_to_frames(substream->runtime, curp);
668 }
669
670 static snd_pcm_uframes_t
671 snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
672 {
673 struct nm256 *chip = snd_pcm_substream_chip(substream);
674 struct nm256_stream *s = substream->runtime->private_data;
675 unsigned long curp;
676
677 snd_assert(s != NULL, return 0);
678 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
679 curp %= s->dma_size;
680 return bytes_to_frames(substream->runtime, curp);
681 }
682
683 /* Remapped I/O space can be accessible as pointer on i386 */
684 /* This might be changed in the future */
685 #ifndef __i386__
686 /*
687 * silence / copy for playback
688 */
689 static int
690 snd_nm256_playback_silence(struct snd_pcm_substream *substream,
691 int channel, /* not used (interleaved data) */
692 snd_pcm_uframes_t pos,
693 snd_pcm_uframes_t count)
694 {
695 struct snd_pcm_runtime *runtime = substream->runtime;
696 struct nm256_stream *s = runtime->private_data;
697 count = frames_to_bytes(runtime, count);
698 pos = frames_to_bytes(runtime, pos);
699 memset_io(s->bufptr + pos, 0, count);
700 return 0;
701 }
702
703 static int
704 snd_nm256_playback_copy(struct snd_pcm_substream *substream,
705 int channel, /* not used (interleaved data) */
706 snd_pcm_uframes_t pos,
707 void __user *src,
708 snd_pcm_uframes_t count)
709 {
710 struct snd_pcm_runtime *runtime = substream->runtime;
711 struct nm256_stream *s = runtime->private_data;
712 count = frames_to_bytes(runtime, count);
713 pos = frames_to_bytes(runtime, pos);
714 if (copy_from_user_toio(s->bufptr + pos, src, count))
715 return -EFAULT;
716 return 0;
717 }
718
719 /*
720 * copy to user
721 */
722 static int
723 snd_nm256_capture_copy(struct snd_pcm_substream *substream,
724 int channel, /* not used (interleaved data) */
725 snd_pcm_uframes_t pos,
726 void __user *dst,
727 snd_pcm_uframes_t count)
728 {
729 struct snd_pcm_runtime *runtime = substream->runtime;
730 struct nm256_stream *s = runtime->private_data;
731 count = frames_to_bytes(runtime, count);
732 pos = frames_to_bytes(runtime, pos);
733 if (copy_to_user_fromio(dst, s->bufptr + pos, count))
734 return -EFAULT;
735 return 0;
736 }
737
738 #endif /* !__i386__ */
739
740
741 /*
742 * update playback/capture watermarks
743 */
744
745 /* spinlock held! */
746 static void
747 snd_nm256_playback_update(struct nm256 *chip)
748 {
749 struct nm256_stream *s;
750
751 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
752 if (s->running && s->substream) {
753 spin_unlock(&chip->reg_lock);
754 snd_pcm_period_elapsed(s->substream);
755 spin_lock(&chip->reg_lock);
756 snd_nm256_playback_mark(chip, s);
757 }
758 }
759
760 /* spinlock held! */
761 static void
762 snd_nm256_capture_update(struct nm256 *chip)
763 {
764 struct nm256_stream *s;
765
766 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
767 if (s->running && s->substream) {
768 spin_unlock(&chip->reg_lock);
769 snd_pcm_period_elapsed(s->substream);
770 spin_lock(&chip->reg_lock);
771 snd_nm256_capture_mark(chip, s);
772 }
773 }
774
775 /*
776 * hardware info
777 */
778 static struct snd_pcm_hardware snd_nm256_playback =
779 {
780 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
781 SNDRV_PCM_INFO_INTERLEAVED |
782 /*SNDRV_PCM_INFO_PAUSE |*/
783 SNDRV_PCM_INFO_RESUME,
784 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
785 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
786 .rate_min = 8000,
787 .rate_max = 48000,
788 .channels_min = 1,
789 .channels_max = 2,
790 .periods_min = 2,
791 .periods_max = 1024,
792 .buffer_bytes_max = 128 * 1024,
793 .period_bytes_min = 256,
794 .period_bytes_max = 128 * 1024,
795 };
796
797 static struct snd_pcm_hardware snd_nm256_capture =
798 {
799 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
800 SNDRV_PCM_INFO_INTERLEAVED |
801 /*SNDRV_PCM_INFO_PAUSE |*/
802 SNDRV_PCM_INFO_RESUME,
803 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
804 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
805 .rate_min = 8000,
806 .rate_max = 48000,
807 .channels_min = 1,
808 .channels_max = 2,
809 .periods_min = 2,
810 .periods_max = 1024,
811 .buffer_bytes_max = 128 * 1024,
812 .period_bytes_min = 256,
813 .period_bytes_max = 128 * 1024,
814 };
815
816
817 /* set dma transfer size */
818 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
819 struct snd_pcm_hw_params *hw_params)
820 {
821 /* area and addr are already set and unchanged */
822 substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
823 return 0;
824 }
825
826 /*
827 * open
828 */
829 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
830 struct snd_pcm_substream *substream,
831 struct snd_pcm_hardware *hw_ptr)
832 {
833 struct snd_pcm_runtime *runtime = substream->runtime;
834
835 s->running = 0;
836 runtime->hw = *hw_ptr;
837 runtime->hw.buffer_bytes_max = s->bufsize;
838 runtime->hw.period_bytes_max = s->bufsize / 2;
839 runtime->dma_area = (void __force *) s->bufptr;
840 runtime->dma_addr = s->bufptr_addr;
841 runtime->dma_bytes = s->bufsize;
842 runtime->private_data = s;
843 s->substream = substream;
844
845 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
846 &constraints_rates);
847 }
848
849 static int
850 snd_nm256_playback_open(struct snd_pcm_substream *substream)
851 {
852 struct nm256 *chip = snd_pcm_substream_chip(substream);
853
854 if (snd_nm256_acquire_irq(chip) < 0)
855 return -EBUSY;
856 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
857 substream, &snd_nm256_playback);
858 return 0;
859 }
860
861 static int
862 snd_nm256_capture_open(struct snd_pcm_substream *substream)
863 {
864 struct nm256 *chip = snd_pcm_substream_chip(substream);
865
866 if (snd_nm256_acquire_irq(chip) < 0)
867 return -EBUSY;
868 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
869 substream, &snd_nm256_capture);
870 return 0;
871 }
872
873 /*
874 * close - we don't have to do special..
875 */
876 static int
877 snd_nm256_playback_close(struct snd_pcm_substream *substream)
878 {
879 struct nm256 *chip = snd_pcm_substream_chip(substream);
880
881 snd_nm256_release_irq(chip);
882 return 0;
883 }
884
885
886 static int
887 snd_nm256_capture_close(struct snd_pcm_substream *substream)
888 {
889 struct nm256 *chip = snd_pcm_substream_chip(substream);
890
891 snd_nm256_release_irq(chip);
892 return 0;
893 }
894
895 /*
896 * create a pcm instance
897 */
898 static struct snd_pcm_ops snd_nm256_playback_ops = {
899 .open = snd_nm256_playback_open,
900 .close = snd_nm256_playback_close,
901 .ioctl = snd_pcm_lib_ioctl,
902 .hw_params = snd_nm256_pcm_hw_params,
903 .prepare = snd_nm256_pcm_prepare,
904 .trigger = snd_nm256_playback_trigger,
905 .pointer = snd_nm256_playback_pointer,
906 #ifndef __i386__
907 .copy = snd_nm256_playback_copy,
908 .silence = snd_nm256_playback_silence,
909 #endif
910 .mmap = snd_pcm_lib_mmap_iomem,
911 };
912
913 static struct snd_pcm_ops snd_nm256_capture_ops = {
914 .open = snd_nm256_capture_open,
915 .close = snd_nm256_capture_close,
916 .ioctl = snd_pcm_lib_ioctl,
917 .hw_params = snd_nm256_pcm_hw_params,
918 .prepare = snd_nm256_pcm_prepare,
919 .trigger = snd_nm256_capture_trigger,
920 .pointer = snd_nm256_capture_pointer,
921 #ifndef __i386__
922 .copy = snd_nm256_capture_copy,
923 #endif
924 .mmap = snd_pcm_lib_mmap_iomem,
925 };
926
927 static int __devinit
928 snd_nm256_pcm(struct nm256 *chip, int device)
929 {
930 struct snd_pcm *pcm;
931 int i, err;
932
933 for (i = 0; i < 2; i++) {
934 struct nm256_stream *s = &chip->streams[i];
935 s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
936 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
937 }
938
939 err = snd_pcm_new(chip->card, chip->card->driver, device,
940 1, 1, &pcm);
941 if (err < 0)
942 return err;
943
944 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
945 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
946
947 pcm->private_data = chip;
948 pcm->info_flags = 0;
949 chip->pcm = pcm;
950
951 return 0;
952 }
953
954
955 /*
956 * Initialize the hardware.
957 */
958 static void
959 snd_nm256_init_chip(struct nm256 *chip)
960 {
961 /* Reset everything. */
962 snd_nm256_writeb(chip, 0x0, 0x11);
963 snd_nm256_writew(chip, 0x214, 0);
964 /* stop sounds.. */
965 //snd_nm256_playback_stop(chip);
966 //snd_nm256_capture_stop(chip);
967 }
968
969
970 static irqreturn_t
971 snd_nm256_intr_check(struct nm256 *chip)
972 {
973 if (chip->badintrcount++ > 1000) {
974 /*
975 * I'm not sure if the best thing is to stop the card from
976 * playing or just release the interrupt (after all, we're in
977 * a bad situation, so doing fancy stuff may not be such a good
978 * idea).
979 *
980 * I worry about the card engine continuing to play noise
981 * over and over, however--that could become a very
982 * obnoxious problem. And we know that when this usually
983 * happens things are fairly safe, it just means the user's
984 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
985 */
986 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
987 snd_nm256_playback_stop(chip);
988 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
989 snd_nm256_capture_stop(chip);
990 chip->badintrcount = 0;
991 return IRQ_HANDLED;
992 }
993 return IRQ_NONE;
994 }
995
996 /*
997 * Handle a potential interrupt for the device referred to by DEV_ID.
998 *
999 * I don't like the cut-n-paste job here either between the two routines,
1000 * but there are sufficient differences between the two interrupt handlers
1001 * that parameterizing it isn't all that great either. (Could use a macro,
1002 * I suppose...yucky bleah.)
1003 */
1004
1005 static irqreturn_t
1006 snd_nm256_interrupt(int irq, void *dev_id)
1007 {
1008 struct nm256 *chip = dev_id;
1009 u16 status;
1010 u8 cbyte;
1011
1012 status = snd_nm256_readw(chip, NM_INT_REG);
1013
1014 /* Not ours. */
1015 if (status == 0)
1016 return snd_nm256_intr_check(chip);
1017
1018 chip->badintrcount = 0;
1019
1020 /* Rather boring; check for individual interrupts and process them. */
1021
1022 spin_lock(&chip->reg_lock);
1023 if (status & NM_PLAYBACK_INT) {
1024 status &= ~NM_PLAYBACK_INT;
1025 NM_ACK_INT(chip, NM_PLAYBACK_INT);
1026 snd_nm256_playback_update(chip);
1027 }
1028
1029 if (status & NM_RECORD_INT) {
1030 status &= ~NM_RECORD_INT;
1031 NM_ACK_INT(chip, NM_RECORD_INT);
1032 snd_nm256_capture_update(chip);
1033 }
1034
1035 if (status & NM_MISC_INT_1) {
1036 status &= ~NM_MISC_INT_1;
1037 NM_ACK_INT(chip, NM_MISC_INT_1);
1038 snd_printd("NM256: Got misc interrupt #1\n");
1039 snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1040 cbyte = snd_nm256_readb(chip, 0x400);
1041 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1042 }
1043
1044 if (status & NM_MISC_INT_2) {
1045 status &= ~NM_MISC_INT_2;
1046 NM_ACK_INT(chip, NM_MISC_INT_2);
1047 snd_printd("NM256: Got misc interrupt #2\n");
1048 cbyte = snd_nm256_readb(chip, 0x400);
1049 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1050 }
1051
1052 /* Unknown interrupt. */
1053 if (status) {
1054 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1055 status);
1056 /* Pray. */
1057 NM_ACK_INT(chip, status);
1058 }
1059
1060 spin_unlock(&chip->reg_lock);
1061 return IRQ_HANDLED;
1062 }
1063
1064 /*
1065 * Handle a potential interrupt for the device referred to by DEV_ID.
1066 * This handler is for the 256ZX, and is very similar to the non-ZX
1067 * routine.
1068 */
1069
1070 static irqreturn_t
1071 snd_nm256_interrupt_zx(int irq, void *dev_id)
1072 {
1073 struct nm256 *chip = dev_id;
1074 u32 status;
1075 u8 cbyte;
1076
1077 status = snd_nm256_readl(chip, NM_INT_REG);
1078
1079 /* Not ours. */
1080 if (status == 0)
1081 return snd_nm256_intr_check(chip);
1082
1083 chip->badintrcount = 0;
1084
1085 /* Rather boring; check for individual interrupts and process them. */
1086
1087 spin_lock(&chip->reg_lock);
1088 if (status & NM2_PLAYBACK_INT) {
1089 status &= ~NM2_PLAYBACK_INT;
1090 NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1091 snd_nm256_playback_update(chip);
1092 }
1093
1094 if (status & NM2_RECORD_INT) {
1095 status &= ~NM2_RECORD_INT;
1096 NM2_ACK_INT(chip, NM2_RECORD_INT);
1097 snd_nm256_capture_update(chip);
1098 }
1099
1100 if (status & NM2_MISC_INT_1) {
1101 status &= ~NM2_MISC_INT_1;
1102 NM2_ACK_INT(chip, NM2_MISC_INT_1);
1103 snd_printd("NM256: Got misc interrupt #1\n");
1104 cbyte = snd_nm256_readb(chip, 0x400);
1105 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1106 }
1107
1108 if (status & NM2_MISC_INT_2) {
1109 status &= ~NM2_MISC_INT_2;
1110 NM2_ACK_INT(chip, NM2_MISC_INT_2);
1111 snd_printd("NM256: Got misc interrupt #2\n");
1112 cbyte = snd_nm256_readb(chip, 0x400);
1113 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1114 }
1115
1116 /* Unknown interrupt. */
1117 if (status) {
1118 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1119 status);
1120 /* Pray. */
1121 NM2_ACK_INT(chip, status);
1122 }
1123
1124 spin_unlock(&chip->reg_lock);
1125 return IRQ_HANDLED;
1126 }
1127
1128 /*
1129 * AC97 interface
1130 */
1131
1132 /*
1133 * Waits for the mixer to become ready to be written; returns a zero value
1134 * if it timed out.
1135 */
1136 static int
1137 snd_nm256_ac97_ready(struct nm256 *chip)
1138 {
1139 int timeout = 10;
1140 u32 testaddr;
1141 u16 testb;
1142
1143 testaddr = chip->mixer_status_offset;
1144 testb = chip->mixer_status_mask;
1145
1146 /*
1147 * Loop around waiting for the mixer to become ready.
1148 */
1149 while (timeout-- > 0) {
1150 if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1151 return 1;
1152 udelay(100);
1153 }
1154 return 0;
1155 }
1156
1157 /*
1158 * Initial register values to be written to the AC97 mixer.
1159 * While most of these are identical to the reset values, we do this
1160 * so that we have most of the register contents cached--this avoids
1161 * reading from the mixer directly (which seems to be problematic,
1162 * probably due to ignorance).
1163 */
1164
1165 struct initialValues {
1166 unsigned short reg;
1167 unsigned short value;
1168 };
1169
1170 static struct initialValues nm256_ac97_init_val[] =
1171 {
1172 { AC97_MASTER, 0x8000 },
1173 { AC97_HEADPHONE, 0x8000 },
1174 { AC97_MASTER_MONO, 0x8000 },
1175 { AC97_PC_BEEP, 0x8000 },
1176 { AC97_PHONE, 0x8008 },
1177 { AC97_MIC, 0x8000 },
1178 { AC97_LINE, 0x8808 },
1179 { AC97_CD, 0x8808 },
1180 { AC97_VIDEO, 0x8808 },
1181 { AC97_AUX, 0x8808 },
1182 { AC97_PCM, 0x8808 },
1183 { AC97_REC_SEL, 0x0000 },
1184 { AC97_REC_GAIN, 0x0B0B },
1185 { AC97_GENERAL_PURPOSE, 0x0000 },
1186 { AC97_3D_CONTROL, 0x8000 },
1187 { AC97_VENDOR_ID1, 0x8384 },
1188 { AC97_VENDOR_ID2, 0x7609 },
1189 };
1190
1191 static int nm256_ac97_idx(unsigned short reg)
1192 {
1193 int i;
1194 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1195 if (nm256_ac97_init_val[i].reg == reg)
1196 return i;
1197 return -1;
1198 }
1199
1200 /*
1201 * some nm256 easily crash when reading from mixer registers
1202 * thus we're treating it as a write-only mixer and cache the
1203 * written values
1204 */
1205 static unsigned short
1206 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1207 {
1208 struct nm256 *chip = ac97->private_data;
1209 int idx = nm256_ac97_idx(reg);
1210
1211 if (idx < 0)
1212 return 0;
1213 return chip->ac97_regs[idx];
1214 }
1215
1216 /*
1217 */
1218 static void
1219 snd_nm256_ac97_write(struct snd_ac97 *ac97,
1220 unsigned short reg, unsigned short val)
1221 {
1222 struct nm256 *chip = ac97->private_data;
1223 int tries = 2;
1224 int idx = nm256_ac97_idx(reg);
1225 u32 base;
1226
1227 if (idx < 0)
1228 return;
1229
1230 base = chip->mixer_base;
1231
1232 snd_nm256_ac97_ready(chip);
1233
1234 /* Wait for the write to take, too. */
1235 while (tries-- > 0) {
1236 snd_nm256_writew(chip, base + reg, val);
1237 msleep(1); /* a little delay here seems better.. */
1238 if (snd_nm256_ac97_ready(chip)) {
1239 /* successful write: set cache */
1240 chip->ac97_regs[idx] = val;
1241 return;
1242 }
1243 }
1244 snd_printd("nm256: ac97 codec not ready..\n");
1245 }
1246
1247 /* static resolution table */
1248 static struct snd_ac97_res_table nm256_res_table[] = {
1249 { AC97_MASTER, 0x1f1f },
1250 { AC97_HEADPHONE, 0x1f1f },
1251 { AC97_MASTER_MONO, 0x001f },
1252 { AC97_PC_BEEP, 0x001f },
1253 { AC97_PHONE, 0x001f },
1254 { AC97_MIC, 0x001f },
1255 { AC97_LINE, 0x1f1f },
1256 { AC97_CD, 0x1f1f },
1257 { AC97_VIDEO, 0x1f1f },
1258 { AC97_AUX, 0x1f1f },
1259 { AC97_PCM, 0x1f1f },
1260 { AC97_REC_GAIN, 0x0f0f },
1261 { } /* terminator */
1262 };
1263
1264 /* initialize the ac97 into a known state */
1265 static void
1266 snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1267 {
1268 struct nm256 *chip = ac97->private_data;
1269
1270 /* Reset the mixer. 'Tis magic! */
1271 snd_nm256_writeb(chip, 0x6c0, 1);
1272 if (! chip->reset_workaround) {
1273 /* Dell latitude LS will lock up by this */
1274 snd_nm256_writeb(chip, 0x6cc, 0x87);
1275 }
1276 if (! chip->reset_workaround_2) {
1277 /* Dell latitude CSx will lock up by this */
1278 snd_nm256_writeb(chip, 0x6cc, 0x80);
1279 snd_nm256_writeb(chip, 0x6cc, 0x0);
1280 }
1281 if (! chip->in_resume) {
1282 int i;
1283 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1284 /* preload the cache, so as to avoid even a single
1285 * read of the mixer regs
1286 */
1287 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1288 nm256_ac97_init_val[i].value);
1289 }
1290 }
1291 }
1292
1293 /* create an ac97 mixer interface */
1294 static int __devinit
1295 snd_nm256_mixer(struct nm256 *chip)
1296 {
1297 struct snd_ac97_bus *pbus;
1298 struct snd_ac97_template ac97;
1299 int err;
1300 static struct snd_ac97_bus_ops ops = {
1301 .reset = snd_nm256_ac97_reset,
1302 .write = snd_nm256_ac97_write,
1303 .read = snd_nm256_ac97_read,
1304 };
1305
1306 chip->ac97_regs = kcalloc(sizeof(short),
1307 ARRAY_SIZE(nm256_ac97_init_val), GFP_KERNEL);
1308 if (! chip->ac97_regs)
1309 return -ENOMEM;
1310
1311 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1312 return err;
1313
1314 memset(&ac97, 0, sizeof(ac97));
1315 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1316 ac97.private_data = chip;
1317 ac97.res_table = nm256_res_table;
1318 pbus->no_vra = 1;
1319 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1320 if (err < 0)
1321 return err;
1322 if (! (chip->ac97->id & (0xf0000000))) {
1323 /* looks like an invalid id */
1324 sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1325 }
1326 return 0;
1327 }
1328
1329 /*
1330 * See if the signature left by the NM256 BIOS is intact; if so, we use
1331 * the associated address as the end of our audio buffer in the video
1332 * RAM.
1333 */
1334
1335 static int __devinit
1336 snd_nm256_peek_for_sig(struct nm256 *chip)
1337 {
1338 /* The signature is located 1K below the end of video RAM. */
1339 void __iomem *temp;
1340 /* Default buffer end is 5120 bytes below the top of RAM. */
1341 unsigned long pointer_found = chip->buffer_end - 0x1400;
1342 u32 sig;
1343
1344 temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1345 if (temp == NULL) {
1346 snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
1347 return -EBUSY;
1348 }
1349
1350 sig = readl(temp);
1351 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1352 u32 pointer = readl(temp + 4);
1353
1354 /*
1355 * If it's obviously invalid, don't use it
1356 */
1357 if (pointer == 0xffffffff ||
1358 pointer < chip->buffer_size ||
1359 pointer > chip->buffer_end) {
1360 snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
1361 iounmap(temp);
1362 return -ENODEV;
1363 } else {
1364 pointer_found = pointer;
1365 printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
1366 pointer);
1367 }
1368 }
1369
1370 iounmap(temp);
1371 chip->buffer_end = pointer_found;
1372
1373 return 0;
1374 }
1375
1376 #ifdef CONFIG_PM
1377 /*
1378 * APM event handler, so the card is properly reinitialized after a power
1379 * event.
1380 */
1381 static int nm256_suspend(struct pci_dev *pci, pm_message_t state)
1382 {
1383 struct snd_card *card = pci_get_drvdata(pci);
1384 struct nm256 *chip = card->private_data;
1385
1386 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1387 snd_pcm_suspend_all(chip->pcm);
1388 snd_ac97_suspend(chip->ac97);
1389 chip->coeffs_current = 0;
1390 pci_disable_device(pci);
1391 pci_save_state(pci);
1392 pci_set_power_state(pci, pci_choose_state(pci, state));
1393 return 0;
1394 }
1395
1396 static int nm256_resume(struct pci_dev *pci)
1397 {
1398 struct snd_card *card = pci_get_drvdata(pci);
1399 struct nm256 *chip = card->private_data;
1400 int i;
1401
1402 /* Perform a full reset on the hardware */
1403 chip->in_resume = 1;
1404
1405 pci_set_power_state(pci, PCI_D0);
1406 pci_restore_state(pci);
1407 if (pci_enable_device(pci) < 0) {
1408 printk(KERN_ERR "nm256: pci_enable_device failed, "
1409 "disabling device\n");
1410 snd_card_disconnect(card);
1411 return -EIO;
1412 }
1413 pci_set_master(pci);
1414
1415 snd_nm256_init_chip(chip);
1416
1417 /* restore ac97 */
1418 snd_ac97_resume(chip->ac97);
1419
1420 for (i = 0; i < 2; i++) {
1421 struct nm256_stream *s = &chip->streams[i];
1422 if (s->substream && s->suspended) {
1423 spin_lock_irq(&chip->reg_lock);
1424 snd_nm256_set_format(chip, s, s->substream);
1425 spin_unlock_irq(&chip->reg_lock);
1426 }
1427 }
1428
1429 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1430 chip->in_resume = 0;
1431 return 0;
1432 }
1433 #endif /* CONFIG_PM */
1434
1435 static int snd_nm256_free(struct nm256 *chip)
1436 {
1437 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1438 snd_nm256_playback_stop(chip);
1439 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1440 snd_nm256_capture_stop(chip);
1441
1442 if (chip->irq >= 0)
1443 synchronize_irq(chip->irq);
1444
1445 if (chip->cport)
1446 iounmap(chip->cport);
1447 if (chip->buffer)
1448 iounmap(chip->buffer);
1449 release_and_free_resource(chip->res_cport);
1450 release_and_free_resource(chip->res_buffer);
1451 if (chip->irq >= 0)
1452 free_irq(chip->irq, chip);
1453
1454 pci_disable_device(chip->pci);
1455 kfree(chip->ac97_regs);
1456 kfree(chip);
1457 return 0;
1458 }
1459
1460 static int snd_nm256_dev_free(struct snd_device *device)
1461 {
1462 struct nm256 *chip = device->device_data;
1463 return snd_nm256_free(chip);
1464 }
1465
1466 static int __devinit
1467 snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
1468 struct nm256 **chip_ret)
1469 {
1470 struct nm256 *chip;
1471 int err, pval;
1472 static struct snd_device_ops ops = {
1473 .dev_free = snd_nm256_dev_free,
1474 };
1475 u32 addr;
1476
1477 *chip_ret = NULL;
1478
1479 if ((err = pci_enable_device(pci)) < 0)
1480 return err;
1481
1482 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1483 if (chip == NULL) {
1484 pci_disable_device(pci);
1485 return -ENOMEM;
1486 }
1487
1488 chip->card = card;
1489 chip->pci = pci;
1490 chip->use_cache = use_cache;
1491 spin_lock_init(&chip->reg_lock);
1492 chip->irq = -1;
1493 mutex_init(&chip->irq_mutex);
1494
1495 /* store buffer sizes in bytes */
1496 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1497 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1498
1499 /*
1500 * The NM256 has two memory ports. The first port is nothing
1501 * more than a chunk of video RAM, which is used as the I/O ring
1502 * buffer. The second port has the actual juicy stuff (like the
1503 * mixer and the playback engine control registers).
1504 */
1505
1506 chip->buffer_addr = pci_resource_start(pci, 0);
1507 chip->cport_addr = pci_resource_start(pci, 1);
1508
1509 /* Init the memory port info. */
1510 /* remap control port (#2) */
1511 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
1512 card->driver);
1513 if (chip->res_cport == NULL) {
1514 snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
1515 chip->cport_addr, NM_PORT2_SIZE);
1516 err = -EBUSY;
1517 goto __error;
1518 }
1519 chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
1520 if (chip->cport == NULL) {
1521 snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
1522 err = -ENOMEM;
1523 goto __error;
1524 }
1525
1526 if (!strcmp(card->driver, "NM256AV")) {
1527 /* Ok, try to see if this is a non-AC97 version of the hardware. */
1528 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1529 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1530 if (! force_ac97) {
1531 printk(KERN_ERR "nm256: no ac97 is found!\n");
1532 printk(KERN_ERR " force the driver to load by "
1533 "passing in the module parameter\n");
1534 printk(KERN_ERR " force_ac97=1\n");
1535 printk(KERN_ERR " or try sb16, opl3sa2, or "
1536 "cs423x drivers instead.\n");
1537 err = -ENXIO;
1538 goto __error;
1539 }
1540 }
1541 chip->buffer_end = 2560 * 1024;
1542 chip->interrupt = snd_nm256_interrupt;
1543 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1544 chip->mixer_status_mask = NM_MIXER_READY_MASK;
1545 } else {
1546 /* Not sure if there is any relevant detect for the ZX or not. */
1547 if (snd_nm256_readb(chip, 0xa0b) != 0)
1548 chip->buffer_end = 6144 * 1024;
1549 else
1550 chip->buffer_end = 4096 * 1024;
1551
1552 chip->interrupt = snd_nm256_interrupt_zx;
1553 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1554 chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1555 }
1556
1557 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1558 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1559 if (chip->use_cache)
1560 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1561 else
1562 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1563
1564 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1565 chip->buffer_end = buffer_top;
1566 else {
1567 /* get buffer end pointer from signature */
1568 if ((err = snd_nm256_peek_for_sig(chip)) < 0)
1569 goto __error;
1570 }
1571
1572 chip->buffer_start = chip->buffer_end - chip->buffer_size;
1573 chip->buffer_addr += chip->buffer_start;
1574
1575 printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
1576 chip->buffer_start, chip->buffer_end);
1577
1578 chip->res_buffer = request_mem_region(chip->buffer_addr,
1579 chip->buffer_size,
1580 card->driver);
1581 if (chip->res_buffer == NULL) {
1582 snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
1583 chip->buffer_addr, chip->buffer_size);
1584 err = -EBUSY;
1585 goto __error;
1586 }
1587 chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
1588 if (chip->buffer == NULL) {
1589 err = -ENOMEM;
1590 snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
1591 goto __error;
1592 }
1593
1594 /* set offsets */
1595 addr = chip->buffer_start;
1596 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1597 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1598 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1599 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1600 if (chip->use_cache) {
1601 chip->all_coeff_buf = addr;
1602 } else {
1603 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1604 addr += NM_MAX_PLAYBACK_COEF_SIZE;
1605 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1606 }
1607
1608 /* Fixed setting. */
1609 chip->mixer_base = NM_MIXER_OFFSET;
1610
1611 chip->coeffs_current = 0;
1612
1613 snd_nm256_init_chip(chip);
1614
1615 // pci_set_master(pci); /* needed? */
1616
1617 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
1618 goto __error;
1619
1620 snd_card_set_dev(card, &pci->dev);
1621
1622 *chip_ret = chip;
1623 return 0;
1624
1625 __error:
1626 snd_nm256_free(chip);
1627 return err;
1628 }
1629
1630
1631 enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1632
1633 static struct snd_pci_quirk nm256_quirks[] __devinitdata = {
1634 /* HP omnibook 4150 has cs4232 codec internally */
1635 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED),
1636 /* Reset workarounds to avoid lock-ups */
1637 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1638 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1639 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1640 { } /* terminator */
1641 };
1642
1643
1644 static int __devinit snd_nm256_probe(struct pci_dev *pci,
1645 const struct pci_device_id *pci_id)
1646 {
1647 struct snd_card *card;
1648 struct nm256 *chip;
1649 int err;
1650 const struct snd_pci_quirk *q;
1651
1652 q = snd_pci_quirk_lookup(pci, nm256_quirks);
1653 if (q) {
1654 snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name);
1655 switch (q->value) {
1656 case NM_BLACKLISTED:
1657 printk(KERN_INFO "nm256: The device is blacklisted. "
1658 "Loading stopped\n");
1659 return -ENODEV;
1660 case NM_RESET_WORKAROUND_2:
1661 reset_workaround_2 = 1;
1662 /* Fall-through */
1663 case NM_RESET_WORKAROUND:
1664 reset_workaround = 1;
1665 break;
1666 }
1667 }
1668
1669 card = snd_card_new(index, id, THIS_MODULE, 0);
1670 if (card == NULL)
1671 return -ENOMEM;
1672
1673 switch (pci->device) {
1674 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1675 strcpy(card->driver, "NM256AV");
1676 break;
1677 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1678 strcpy(card->driver, "NM256ZX");
1679 break;
1680 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1681 strcpy(card->driver, "NM256XL+");
1682 break;
1683 default:
1684 snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
1685 snd_card_free(card);
1686 return -EINVAL;
1687 }
1688
1689 if (vaio_hack)
1690 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
1691
1692 if (playback_bufsize < 4)
1693 playback_bufsize = 4;
1694 if (playback_bufsize > 128)
1695 playback_bufsize = 128;
1696 if (capture_bufsize < 4)
1697 capture_bufsize = 4;
1698 if (capture_bufsize > 128)
1699 capture_bufsize = 128;
1700 if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
1701 snd_card_free(card);
1702 return err;
1703 }
1704 card->private_data = chip;
1705
1706 if (reset_workaround) {
1707 snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
1708 chip->reset_workaround = 1;
1709 }
1710
1711 if (reset_workaround_2) {
1712 snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
1713 chip->reset_workaround_2 = 1;
1714 }
1715
1716 if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
1717 (err = snd_nm256_mixer(chip)) < 0) {
1718 snd_card_free(card);
1719 return err;
1720 }
1721
1722 sprintf(card->shortname, "NeoMagic %s", card->driver);
1723 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1724 card->shortname,
1725 chip->buffer_addr, chip->cport_addr, chip->irq);
1726
1727 if ((err = snd_card_register(card)) < 0) {
1728 snd_card_free(card);
1729 return err;
1730 }
1731
1732 pci_set_drvdata(pci, card);
1733 return 0;
1734 }
1735
1736 static void __devexit snd_nm256_remove(struct pci_dev *pci)
1737 {
1738 snd_card_free(pci_get_drvdata(pci));
1739 pci_set_drvdata(pci, NULL);
1740 }
1741
1742
1743 static struct pci_driver driver = {
1744 .name = "NeoMagic 256",
1745 .id_table = snd_nm256_ids,
1746 .probe = snd_nm256_probe,
1747 .remove = __devexit_p(snd_nm256_remove),
1748 #ifdef CONFIG_PM
1749 .suspend = nm256_suspend,
1750 .resume = nm256_resume,
1751 #endif
1752 };
1753
1754
1755 static int __init alsa_card_nm256_init(void)
1756 {
1757 return pci_register_driver(&driver);
1758 }
1759
1760 static void __exit alsa_card_nm256_exit(void)
1761 {
1762 pci_unregister_driver(&driver);
1763 }
1764
1765 module_init(alsa_card_nm256_init)
1766 module_exit(alsa_card_nm256_exit)
WRT350N Kernel Patches