drivers/net/sk98lin/h/skdrv2nd.h

   1 /******************************************************************************
   2  *
   3  * Name:        skdrv2nd.h
   4  * Project:     GEnesis, PCI Gigabit Ethernet Adapter
   5  * Version:     $Revision: 1.10 $
   6  * Date:        $Date: 2003/12/11 16:04:45 $
   7  * Purpose:     Second header file for driver and all other modules
   8  *
   9  ******************************************************************************/
  10
  11 /******************************************************************************
  12  *
  13  *      (C)Copyright 1998-2002 SysKonnect GmbH.
  14  *      (C)Copyright 2002-2003 Marvell.
  15  *
  16  *      This program is free software; you can redistribute it and/or modify
  17  *      it under the terms of the GNU General Public License as published by
  18  *      the Free Software Foundation; either version 2 of the License, or
  19  *      (at your option) any later version.
  20  *
  21  *      The information in this file is provided "AS IS" without warranty.
  22  *
  23  ******************************************************************************/
  24
  25 /******************************************************************************
  26  *
  27  * Description:
  28  *
  29  * This is the second include file of the driver, which includes all other
  30  * neccessary files and defines all structures and constants used by the
  31  * driver and the common modules.
  32  *
  33  * Include File Hierarchy:
  34  *
  35  *      see skge.c
  36  *
  37  ******************************************************************************/
  38
  39 #ifndef __INC_SKDRV2ND_H
  40 #define __INC_SKDRV2ND_H
  41
  42 #include "h/skqueue.h"
  43 #include "h/skgehwt.h"
  44 #include "h/sktimer.h"
  45 #include "h/ski2c.h"
  46 #include "h/skgepnmi.h"
  47 #include "h/skvpd.h"
  48 #include "h/skgehw.h"
  49 #include "h/skgeinit.h"
  50 #include "h/skaddr.h"
  51 #include "h/skgesirq.h"
  52 #include "h/skcsum.h"
  53 #include "h/skrlmt.h"
  54 #include "h/skgedrv.h"
  55
  56
  57 extern SK_MBUF          *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
  58 extern void             SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
  59 extern SK_U64           SkOsGetTime(SK_AC*);
  60 extern int              SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
  61 extern int              SkPciReadCfgWord(SK_AC*, int, SK_U16*);
  62 extern int              SkPciReadCfgByte(SK_AC*, int, SK_U8*);
  63 extern int              SkPciWriteCfgWord(SK_AC*, int, SK_U16);
  64 extern int              SkPciWriteCfgByte(SK_AC*, int, SK_U8);
  65 extern int              SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
  66
  67 #ifdef SK_DIAG_SUPPORT
  68 extern int              SkDrvEnterDiagMode(SK_AC *pAc);
  69 extern int              SkDrvLeaveDiagMode(SK_AC *pAc);
  70 #endif
  71
  72 struct s_DrvRlmtMbuf {
  73         SK_MBUF         *pNext;         /* Pointer to next RLMT Mbuf. */
  74         SK_U8           *pData;         /* Data buffer (virtually contig.). */
  75         unsigned        Size;           /* Data buffer size. */
  76         unsigned        Length;         /* Length of packet (<= Size). */
  77         SK_U32          PortIdx;        /* Receiving/transmitting port. */
  78 #ifdef SK_RLMT_MBUF_PRIVATE
  79         SK_RLMT_MBUF    Rlmt;           /* Private part for RLMT. */
  80 #endif  /* SK_RLMT_MBUF_PRIVATE */
  81         struct sk_buff  *pOs;           /* Pointer to message block */
  82 };
  83
  84
  85 /*
  86  * Time macros
  87  */
  88 #if SK_TICKS_PER_SEC == 100
  89 #define SK_PNMI_HUNDREDS_SEC(t) (t)
  90 #else
  91 #define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t) * 100) / \
  92                                                                                 (SK_TICKS_PER_SEC))
  93 #endif
  94
  95 /*
  96  * New SkOsGetTime
  97  */
  98 #define SkOsGetTimeCurrent(pAC, pUsec) {\
  99         struct timeval t;\
 100         do_gettimeofday(&t);\
 101         *pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\
 102 }
 103
 104
 105 /*
 106  * ioctl definitions
 107  */
 108 #define         SK_IOCTL_BASE           (SIOCDEVPRIVATE)
 109 #define         SK_IOCTL_GETMIB         (SK_IOCTL_BASE + 0)
 110 #define         SK_IOCTL_SETMIB         (SK_IOCTL_BASE + 1)
 111 #define         SK_IOCTL_PRESETMIB      (SK_IOCTL_BASE + 2)
 112 #define         SK_IOCTL_GEN            (SK_IOCTL_BASE + 3)
 113 #define         SK_IOCTL_DIAG           (SK_IOCTL_BASE + 4)
 114
 115 typedef struct s_IOCTL  SK_GE_IOCTL;
 116
 117 struct s_IOCTL {
 118         char __user *   pData;
 119         unsigned int    Len;
 120 };
 121
 122
 123 /*
 124  * define sizes of descriptor rings in bytes
 125  */
 126
 127 #define         TX_RING_SIZE    (8*1024)
 128 #define         RX_RING_SIZE    (24*1024)
 129
 130 /*
 131  * Buffer size for ethernet packets
 132  */
 133 #define ETH_BUF_SIZE    1540
 134 #define ETH_MAX_MTU     1514
 135 #define ETH_MIN_MTU     60
 136 #define ETH_MULTICAST_BIT       0x01
 137 #define SK_JUMBO_MTU    9000
 138
 139 /*
 140  * transmit priority selects the queue: LOW=asynchron, HIGH=synchron
 141  */
 142 #define TX_PRIO_LOW     0
 143 #define TX_PRIO_HIGH    1
 144
 145 /*
 146  * alignment of rx/tx descriptors
 147  */
 148 #define DESCR_ALIGN     64
 149
 150 /*
 151  * definitions for pnmi. TODO
 152  */
 153 #define SK_DRIVER_RESET(pAC, IoC)       0
 154 #define SK_DRIVER_SENDEVENT(pAC, IoC)   0
 155 #define SK_DRIVER_SELFTEST(pAC, IoC)    0
 156 /* For get mtu you must add an own function */
 157 #define SK_DRIVER_GET_MTU(pAc,IoC,i)    0
 158 #define SK_DRIVER_SET_MTU(pAc,IoC,i,v)  0
 159 #define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v)       0
 160
 161 /*
 162 ** Interim definition of SK_DRV_TIMER placed in this file until
 163 ** common modules have been finalized
 164 */
 165 #define SK_DRV_TIMER                    11
 166 #define SK_DRV_MODERATION_TIMER         1
 167 #define SK_DRV_MODERATION_TIMER_LENGTH  1000000  /* 1 second */
 168 #define SK_DRV_RX_CLEANUP_TIMER         2
 169 #define SK_DRV_RX_CLEANUP_TIMER_LENGTH  1000000  /* 100 millisecs */
 170
 171 /*
 172 ** Definitions regarding transmitting frames
 173 ** any calculating any checksum.
 174 */
 175 #define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6
 176 #define C_LEN_ETHERMAC_HEADER_SRC_ADDR  6
 177 #define C_LEN_ETHERMAC_HEADER_LENTYPE   2
 178 #define C_LEN_ETHERMAC_HEADER           ( (C_LEN_ETHERMAC_HEADER_DEST_ADDR) + \
 179                                           (C_LEN_ETHERMAC_HEADER_SRC_ADDR)  + \
 180                                           (C_LEN_ETHERMAC_HEADER_LENTYPE) )
 181
 182 #define C_LEN_ETHERMTU_MINSIZE          46
 183 #define C_LEN_ETHERMTU_MAXSIZE_STD      1500
 184 #define C_LEN_ETHERMTU_MAXSIZE_JUMBO    9000
 185
 186 #define C_LEN_ETHERNET_MINSIZE          ( (C_LEN_ETHERMAC_HEADER) + \
 187                                           (C_LEN_ETHERMTU_MINSIZE) )
 188
 189 #define C_OFFSET_IPHEADER               C_LEN_ETHERMAC_HEADER
 190 #define C_OFFSET_IPHEADER_IPPROTO       9
 191 #define C_OFFSET_TCPHEADER_TCPCS        16
 192 #define C_OFFSET_UDPHEADER_UDPCS        6
 193
 194 #define C_OFFSET_IPPROTO                ( (C_LEN_ETHERMAC_HEADER) + \
 195                                           (C_OFFSET_IPHEADER_IPPROTO) )
 196
 197 #define C_PROTO_ID_UDP                  17       /* refer to RFC 790 or Stevens'   */
 198 #define C_PROTO_ID_TCP                  6        /* TCP/IP illustrated for details */
 199
 200 /* TX and RX descriptors *****************************************************/
 201
 202 typedef struct s_RxD RXD; /* the receive descriptor */
 203
 204 struct s_RxD {
 205         volatile SK_U32 RBControl;      /* Receive Buffer Control */
 206         SK_U32          VNextRxd;       /* Next receive descriptor,low dword */
 207         SK_U32          VDataLow;       /* Receive buffer Addr, low dword */
 208         SK_U32          VDataHigh;      /* Receive buffer Addr, high dword */
 209         SK_U32          FrameStat;      /* Receive Frame Status word */
 210         SK_U32          TimeStamp;      /* Time stamp from XMAC */
 211         SK_U32          TcpSums;        /* TCP Sum 2 / TCP Sum 1 */
 212         SK_U32          TcpSumStarts;   /* TCP Sum Start 2 / TCP Sum Start 1 */
 213         RXD             *pNextRxd;      /* Pointer to next Rxd */
 214         struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer */
 215 };
 216
 217 typedef struct s_TxD TXD; /* the transmit descriptor */
 218
 219 struct s_TxD {
 220         volatile SK_U32 TBControl;      /* Transmit Buffer Control */
 221         SK_U32          VNextTxd;       /* Next transmit descriptor,low dword */
 222         SK_U32          VDataLow;       /* Transmit Buffer Addr, low dword */
 223         SK_U32          VDataHigh;      /* Transmit Buffer Addr, high dword */
 224         SK_U32          FrameStat;      /* Transmit Frame Status Word */
 225         SK_U32          TcpSumOfs;      /* Reserved / TCP Sum Offset */
 226         SK_U16          TcpSumSt;       /* TCP Sum Start */
 227         SK_U16          TcpSumWr;       /* TCP Sum Write */
 228         SK_U32          TcpReserved;    /* not used */
 229         TXD             *pNextTxd;      /* Pointer to next Txd */
 230         struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer */
 231 };
 232
 233 /* Used interrupt bits in the interrupts source register *********************/
 234
 235 #define DRIVER_IRQS     ((IS_IRQ_SW)   | \
 236                         (IS_R1_F)      |(IS_R2_F)  | \
 237                         (IS_XS1_F)     |(IS_XA1_F) | \
 238                         (IS_XS2_F)     |(IS_XA2_F))
 239
 240 #define SPECIAL_IRQS    ((IS_HW_ERR)   |(IS_I2C_READY)  | \
 241                         (IS_EXT_REG)   |(IS_TIMINT)     | \
 242                         (IS_PA_TO_RX1) |(IS_PA_TO_RX2)  | \
 243                         (IS_PA_TO_TX1) |(IS_PA_TO_TX2)  | \
 244                         (IS_MAC1)      |(IS_LNK_SYNC_M1)| \
 245                         (IS_MAC2)      |(IS_LNK_SYNC_M2)| \
 246                         (IS_R1_C)      |(IS_R2_C)       | \
 247                         (IS_XS1_C)     |(IS_XA1_C)      | \
 248                         (IS_XS2_C)     |(IS_XA2_C))
 249
 250 #define IRQ_MASK        ((IS_IRQ_SW)   | \
 251                         (IS_R1_B)      |(IS_R1_F)     |(IS_R2_B) |(IS_R2_F) | \
 252                         (IS_XS1_B)     |(IS_XS1_F)    |(IS_XA1_B)|(IS_XA1_F)| \
 253                         (IS_XS2_B)     |(IS_XS2_F)    |(IS_XA2_B)|(IS_XA2_F)| \
 254                         (IS_HW_ERR)    |(IS_I2C_READY)| \
 255                         (IS_EXT_REG)   |(IS_TIMINT)   | \
 256                         (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
 257                         (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
 258                         (IS_MAC1)      |(IS_MAC2)     | \
 259                         (IS_R1_C)      |(IS_R2_C)     | \
 260                         (IS_XS1_C)     |(IS_XA1_C)    | \
 261                         (IS_XS2_C)     |(IS_XA2_C))
 262
 263 #define IRQ_HWE_MASK    (IS_ERR_MSK) /* enable all HW irqs */
 264
 265 typedef struct s_DevNet DEV_NET;
 266
 267 struct s_DevNet {
 268         int             PortNr;
 269         int             NetNr;
 270         SK_AC   *pAC;
 271 };
 272
 273 typedef struct s_TxPort         TX_PORT;
 274
 275 struct s_TxPort {
 276         /* the transmit descriptor rings */
 277         caddr_t         pTxDescrRing;   /* descriptor area memory */
 278         SK_U64          VTxDescrRing;   /* descr. area bus virt. addr. */
 279         TXD             *pTxdRingHead;  /* Head of Tx rings */
 280         TXD             *pTxdRingTail;  /* Tail of Tx rings */
 281         TXD             *pTxdRingPrev;  /* descriptor sent previously */
 282         int             TxdRingFree;    /* # of free entrys */
 283         spinlock_t      TxDesRingLock;  /* serialize descriptor accesses */
 284         SK_IOC          HwAddr;         /* bmu registers address */
 285         int             PortIndex;      /* index number of port (0 or 1) */
 286 };
 287
 288 typedef struct s_RxPort         RX_PORT;
 289
 290 struct s_RxPort {
 291         /* the receive descriptor rings */
 292         caddr_t         pRxDescrRing;   /* descriptor area memory */
 293         SK_U64          VRxDescrRing;   /* descr. area bus virt. addr. */
 294         RXD             *pRxdRingHead;  /* Head of Rx rings */
 295         RXD             *pRxdRingTail;  /* Tail of Rx rings */
 296         RXD             *pRxdRingPrev;  /* descriptor given to BMU previously */
 297         int             RxdRingFree;    /* # of free entrys */
 298         int             RxCsum;         /* use receive checksum hardware */
 299         spinlock_t      RxDesRingLock;  /* serialize descriptor accesses */
 300         int             RxFillLimit;    /* limit for buffers in ring */
 301         SK_IOC          HwAddr;         /* bmu registers address */
 302         int             PortIndex;      /* index number of port (0 or 1) */
 303 };
 304
 305 /* Definitions needed for interrupt moderation *******************************/
 306
 307 #define IRQ_EOF_AS_TX     ((IS_XA1_F)     | (IS_XA2_F))
 308 #define IRQ_EOF_SY_TX     ((IS_XS1_F)     | (IS_XS2_F))
 309 #define IRQ_MASK_TX_ONLY  ((IRQ_EOF_AS_TX)| (IRQ_EOF_SY_TX))
 310 #define IRQ_MASK_RX_ONLY  ((IS_R1_F)      | (IS_R2_F))
 311 #define IRQ_MASK_SP_ONLY  (SPECIAL_IRQS)
 312 #define IRQ_MASK_TX_RX    ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY))
 313 #define IRQ_MASK_SP_RX    ((SPECIAL_IRQS)    | (IRQ_MASK_RX_ONLY))
 314 #define IRQ_MASK_SP_TX    ((SPECIAL_IRQS)    | (IRQ_MASK_TX_ONLY))
 315 #define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS)    | (IRQ_MASK_TX_RX))
 316
 317 #define C_INT_MOD_NONE                 1
 318 #define C_INT_MOD_STATIC               2
 319 #define C_INT_MOD_DYNAMIC              4
 320
 321 #define C_CLK_FREQ_GENESIS      53215000 /* shorter: 53.125 MHz  */
 322 #define C_CLK_FREQ_YUKON        78215000 /* shorter: 78.125 MHz  */
 323
 324 #define C_INTS_PER_SEC_DEFAULT      2000
 325 #define C_INT_MOD_ENABLE_PERCENTAGE   50 /* if higher 50% enable */
 326 #define C_INT_MOD_DISABLE_PERCENTAGE  50 /* if lower 50% disable */
 327 #define C_INT_MOD_IPS_LOWER_RANGE     30
 328 #define C_INT_MOD_IPS_UPPER_RANGE     40000
 329
 330
 331 typedef struct s_DynIrqModInfo  DIM_INFO;
 332 struct s_DynIrqModInfo {
 333         unsigned long   PrevTimeVal;
 334         unsigned int    PrevSysLoad;
 335         unsigned int    PrevUsedTime;
 336         unsigned int    PrevTotalTime;
 337         int             PrevUsedDescrRatio;
 338         int             NbrProcessedDescr;
 339         SK_U64          PrevPort0RxIntrCts;
 340         SK_U64          PrevPort1RxIntrCts;
 341         SK_U64          PrevPort0TxIntrCts;
 342         SK_U64          PrevPort1TxIntrCts;
 343         SK_BOOL         ModJustEnabled;     /* Moderation just enabled yes/no */
 344
 345         int             MaxModIntsPerSec;            /* Moderation Threshold */
 346         int             MaxModIntsPerSecUpperLimit;  /* Upper limit for DIM  */
 347         int             MaxModIntsPerSecLowerLimit;  /* Lower limit for DIM  */
 348
 349         long            MaskIrqModeration;   /* ModIrqType (eg. 'TxRx')      */
 350         SK_BOOL         DisplayStats;        /* Stats yes/no                 */
 351         SK_BOOL         AutoSizing;          /* Resize DIM-timer on/off      */
 352         int             IntModTypeSelect;    /* EnableIntMod (eg. 'dynamic') */
 353
 354         SK_TIMER        ModTimer; /* just some timer */
 355 };
 356
 357 typedef struct s_PerStrm        PER_STRM;
 358
 359 #define SK_ALLOC_IRQ    0x00000001
 360
 361 #ifdef SK_DIAG_SUPPORT
 362 #define DIAG_ACTIVE             1
 363 #define DIAG_NOTACTIVE          0
 364 #endif
 365
 366 /****************************************************************************
 367  * Per board structure / Adapter Context structure:
 368  *      Allocated within attach(9e) and freed within detach(9e).
 369  *      Contains all 'per device' necessary handles, flags, locks etc.:
 370  */
 371 struct s_AC  {
 372         SK_GEINIT       GIni;           /* GE init struct */
 373         SK_PNMI         Pnmi;           /* PNMI data struct */
 374         SK_VPD          vpd;            /* vpd data struct */
 375         SK_QUEUE        Event;          /* Event queue */
 376         SK_HWT          Hwt;            /* Hardware Timer control struct */
 377         SK_TIMCTRL      Tim;            /* Software Timer control struct */
 378         SK_I2C          I2c;            /* I2C relevant data structure */
 379         SK_ADDR         Addr;           /* for Address module */
 380         SK_CSUM         Csum;           /* for checksum module */
 381         SK_RLMT         Rlmt;           /* for rlmt module */
 382         spinlock_t      SlowPathLock;   /* Normal IRQ lock */
 383         struct timer_list BlinkTimer;   /* for LED blinking */
 384         int             LedsOn;
 385         SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
 386         int                     RlmtMode;       /* link check mode to set */
 387         int                     RlmtNets;       /* Number of nets */
 388
 389         SK_IOC          IoBase;         /* register set of adapter */
 390         int             BoardLevel;     /* level of active hw init (0-2) */
 391
 392         SK_U32          AllocFlag;      /* flag allocation of resources */
 393         struct pci_dev  *PciDev;        /* for access to pci config space */
 394         struct SK_NET_DEVICE    *dev[2];        /* pointer to device struct */
 395
 396         int             RxBufSize;      /* length of receive buffers */
 397         struct net_device_stats stats;  /* linux 'netstat -i' statistics */
 398         int             Index;          /* internal board index number */
 399
 400         /* adapter RAM sizes for queues of active port */
 401         int             RxQueueSize;    /* memory used for receive queue */
 402         int             TxSQueueSize;   /* memory used for sync. tx queue */
 403         int             TxAQueueSize;   /* memory used for async. tx queue */
 404
 405         int             PromiscCount;   /* promiscuous mode counter  */
 406         int             AllMultiCount;  /* allmulticast mode counter */
 407         int             MulticCount;    /* number of different MC    */
 408                                         /*  addresses for this board */
 409                                         /*  (may be more than HW can)*/
 410
 411         int             HWRevision;     /* Hardware revision */
 412         int             ActivePort;     /* the active XMAC port */
 413         int             MaxPorts;               /* number of activated ports */
 414         int             TxDescrPerRing; /* # of descriptors per tx ring */
 415         int             RxDescrPerRing; /* # of descriptors per rx ring */
 416
 417         caddr_t         pDescrMem;      /* Pointer to the descriptor area */
 418         dma_addr_t      pDescrMemDMA;   /* PCI DMA address of area */
 419
 420         /* the port structures with descriptor rings */
 421         TX_PORT         TxPort[SK_MAX_MACS][2];
 422         RX_PORT         RxPort[SK_MAX_MACS];
 423
 424         SK_BOOL         CheckQueue;     /* check event queue soon */
 425         SK_TIMER        DrvCleanupTimer;/* to check for pending descriptors */
 426         DIM_INFO        DynIrqModInfo;  /* all data related to DIM */
 427
 428         /* Only for tests */
 429         int             PortDown;
 430         int             ChipsetType;    /*  Chipset family type
 431                                          *  0 == Genesis family support
 432                                          *  1 == Yukon family support
 433                                          */
 434 #ifdef SK_DIAG_SUPPORT
 435         SK_U32          DiagModeActive;         /* is diag active?      */
 436         SK_BOOL         DiagFlowCtrl;           /* for control purposes */
 437         SK_PNMI_STRUCT_DATA PnmiBackup;         /* backup structure for all Pnmi-Data */
 438         SK_BOOL         WasIfUp[SK_MAX_MACS];   /* for OpenClose while
 439                                                  * DIAG is busy with NIC
 440                                                  */
 441 #endif
 442
 443 };
 444
 445
 446 #endif /* __INC_SKDRV2ND_H */
 447