2 * arch/arm/mach-orion/common.c
4 * Core functions for Marvell Orion System On Chip
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mv643xx_eth.h>
18 #include <linux/mv643xx_i2c.h>
20 #include <asm/setup.h>
21 #include <asm/timex.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/map.h>
24 #include <asm/arch/hardware.h>
27 /*****************************************************************************
29 ****************************************************************************/
30 static struct map_desc orion_io_desc
[] __initdata
= {
32 .virtual = ORION_REGS_VIRT_BASE
,
33 .pfn
= __phys_to_pfn(ORION_REGS_PHYS_BASE
),
34 .length
= ORION_REGS_SIZE
,
38 .virtual = ORION_PCIE_IO_VIRT_BASE
,
39 .pfn
= __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE
),
40 .length
= ORION_PCIE_IO_SIZE
,
44 .virtual = ORION_PCI_IO_VIRT_BASE
,
45 .pfn
= __phys_to_pfn(ORION_PCI_IO_PHYS_BASE
),
46 .length
= ORION_PCI_IO_SIZE
,
50 .virtual = ORION_PCIE_WA_VIRT_BASE
,
51 .pfn
= __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE
),
52 .length
= ORION_PCIE_WA_SIZE
,
57 void __init
orion_map_io(void)
59 iotable_init(orion_io_desc
, ARRAY_SIZE(orion_io_desc
));
62 /*****************************************************************************
64 ****************************************************************************/
66 static struct resource orion_uart_resources
[] = {
68 .start
= UART0_PHYS_BASE
,
69 .end
= UART0_PHYS_BASE
+ 0xff,
70 .flags
= IORESOURCE_MEM
,
73 .start
= IRQ_ORION_UART0
,
74 .end
= IRQ_ORION_UART0
,
75 .flags
= IORESOURCE_IRQ
,
78 .start
= UART1_PHYS_BASE
,
79 .end
= UART1_PHYS_BASE
+ 0xff,
80 .flags
= IORESOURCE_MEM
,
83 .start
= IRQ_ORION_UART1
,
84 .end
= IRQ_ORION_UART1
,
85 .flags
= IORESOURCE_IRQ
,
89 static struct plat_serial8250_port orion_uart_data
[] = {
91 .mapbase
= UART0_PHYS_BASE
,
92 .membase
= (char *)UART0_VIRT_BASE
,
93 .irq
= IRQ_ORION_UART0
,
94 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
97 .uartclk
= ORION_TCLK
,
100 .mapbase
= UART1_PHYS_BASE
,
101 .membase
= (char *)UART1_VIRT_BASE
,
102 .irq
= IRQ_ORION_UART1
,
103 .flags
= UPF_SKIP_TEST
| UPF_BOOT_AUTOCONF
,
106 .uartclk
= ORION_TCLK
,
111 static struct platform_device orion_uart
= {
112 .name
= "serial8250",
113 .id
= PLAT8250_DEV_PLATFORM
,
115 .platform_data
= orion_uart_data
,
117 .resource
= orion_uart_resources
,
118 .num_resources
= ARRAY_SIZE(orion_uart_resources
),
121 /*******************************************************************************
122 * USB Controller - 2 interfaces
123 ******************************************************************************/
125 static struct resource orion_ehci0_resources
[] = {
127 .start
= ORION_USB0_PHYS_BASE
,
128 .end
= ORION_USB0_PHYS_BASE
+ SZ_4K
,
129 .flags
= IORESOURCE_MEM
,
132 .start
= IRQ_ORION_USB0_CTRL
,
133 .end
= IRQ_ORION_USB0_CTRL
,
134 .flags
= IORESOURCE_IRQ
,
138 static struct resource orion_ehci1_resources
[] = {
140 .start
= ORION_USB1_PHYS_BASE
,
141 .end
= ORION_USB1_PHYS_BASE
+ SZ_4K
,
142 .flags
= IORESOURCE_MEM
,
145 .start
= IRQ_ORION_USB1_CTRL
,
146 .end
= IRQ_ORION_USB1_CTRL
,
147 .flags
= IORESOURCE_IRQ
,
151 static u64 ehci_dmamask
= 0xffffffffUL
;
153 static struct platform_device orion_ehci0
= {
154 .name
= "orion-ehci",
157 .dma_mask
= &ehci_dmamask
,
158 .coherent_dma_mask
= 0xffffffff,
160 .resource
= orion_ehci0_resources
,
161 .num_resources
= ARRAY_SIZE(orion_ehci0_resources
),
164 static struct platform_device orion_ehci1
= {
165 .name
= "orion-ehci",
168 .dma_mask
= &ehci_dmamask
,
169 .coherent_dma_mask
= 0xffffffff,
171 .resource
= orion_ehci1_resources
,
172 .num_resources
= ARRAY_SIZE(orion_ehci1_resources
),
175 /*****************************************************************************
176 * Gigabit Ethernet port
177 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
178 ****************************************************************************/
180 static struct resource orion_eth_shared_resources
[] = {
182 .start
= ORION_ETH_PHYS_BASE
+ 0x2000,
183 .end
= ORION_ETH_PHYS_BASE
+ 0x3fff,
184 .flags
= IORESOURCE_MEM
,
188 static struct platform_device orion_eth_shared
= {
189 .name
= MV643XX_ETH_SHARED_NAME
,
192 .resource
= orion_eth_shared_resources
,
195 static struct resource orion_eth_resources
[] = {
198 .start
= IRQ_ORION_ETH_SUM
,
199 .end
= IRQ_ORION_ETH_SUM
,
200 .flags
= IORESOURCE_IRQ
,
204 static struct platform_device orion_eth
= {
205 .name
= MV643XX_ETH_NAME
,
208 .resource
= orion_eth_resources
,
211 void __init
orion_eth_init(struct mv643xx_eth_platform_data
*eth_data
)
213 orion_eth
.dev
.platform_data
= eth_data
;
214 platform_device_register(&orion_eth_shared
);
215 platform_device_register(&orion_eth
);
218 /*****************************************************************************
220 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
221 ****************************************************************************/
223 static struct mv64xxx_i2c_pdata orion_i2c_pdata
= {
224 .freq_m
= 8, /* assumes 166 MHz TCLK */
226 .timeout
= 1000, /* Default timeout of 1 second */
229 static struct resource orion_i2c_resources
[] = {
232 .start
= I2C_PHYS_BASE
,
233 .end
= I2C_PHYS_BASE
+ 0x20 -1,
234 .flags
= IORESOURCE_MEM
,
238 .start
= IRQ_ORION_I2C
,
239 .end
= IRQ_ORION_I2C
,
240 .flags
= IORESOURCE_IRQ
,
244 static struct platform_device orion_i2c
= {
245 .name
= MV64XXX_I2C_CTLR_NAME
,
247 .num_resources
= ARRAY_SIZE(orion_i2c_resources
),
248 .resource
= orion_i2c_resources
,
250 .platform_data
= &orion_i2c_pdata
,
254 /*****************************************************************************
256 ****************************************************************************/
257 static struct resource orion_sata_resources
[] = {
260 .start
= ORION_SATA_PHYS_BASE
,
261 .end
= ORION_SATA_PHYS_BASE
+ 0x5000 - 1,
262 .flags
= IORESOURCE_MEM
,
266 .start
= IRQ_ORION_SATA
,
267 .end
= IRQ_ORION_SATA
,
268 .flags
= IORESOURCE_IRQ
,
272 static struct platform_device orion_sata
= {
276 .coherent_dma_mask
= 0xffffffff,
278 .num_resources
= ARRAY_SIZE(orion_sata_resources
),
279 .resource
= orion_sata_resources
,
282 void __init
orion_sata_init(struct mv_sata_platform_data
*sata_data
)
284 orion_sata
.dev
.platform_data
= sata_data
;
285 platform_device_register(&orion_sata
);
288 /*****************************************************************************
290 ****************************************************************************/
293 * Identify device ID and rev from PCIE configuration header space '0'.
295 static void orion_id(u32
*dev
, u32
*rev
, char **dev_name
)
297 orion_pcie_id(dev
, rev
);
299 if (*dev
== MV88F5281_DEV_ID
) {
300 if (*rev
== MV88F5281_REV_D2
) {
301 *dev_name
= "MV88F5281-D2";
302 } else if (*rev
== MV88F5281_REV_D1
) {
303 *dev_name
= "MV88F5281-D1";
305 *dev_name
= "MV88F5281-Rev-Unsupported";
307 } else if (*dev
== MV88F5182_DEV_ID
) {
308 if (*rev
== MV88F5182_REV_A2
) {
309 *dev_name
= "MV88F5182-A2";
311 *dev_name
= "MV88F5182-Rev-Unsupported";
313 } else if (*dev
== MV88F5181_DEV_ID
) {
314 if (*rev
== MV88F5181_REV_B1
) {
315 *dev_name
= "MV88F5181-Rev-B1";
317 *dev_name
= "MV88F5181-Rev-Unsupported";
320 *dev_name
= "Device-Unknown";
324 void __init
orion_init(void)
329 orion_id(&dev
, &rev
, &dev_name
);
330 printk(KERN_INFO
"Orion ID: %s. TCLK=%d.\n", dev_name
, ORION_TCLK
);
333 * Setup Orion address map
335 orion_setup_cpu_wins();
336 orion_setup_usb_wins();
337 orion_setup_eth_wins();
338 orion_setup_pci_wins();
339 orion_setup_pcie_wins();
340 if (dev
== MV88F5182_DEV_ID
)
341 orion_setup_sata_wins();
346 platform_device_register(&orion_uart
);
347 platform_device_register(&orion_ehci0
);
348 if (dev
== MV88F5182_DEV_ID
)
349 platform_device_register(&orion_ehci1
);
350 platform_device_register(&orion_i2c
);
354 * Many orion-based systems have buggy bootloader implementations.
355 * This is a common fixup for bogus memory tags.
357 void __init
tag_fixup_mem32(struct machine_desc
*mdesc
, struct tag
*t
,
358 char **from
, struct meminfo
*meminfo
)
360 for (; t
->hdr
.size
; t
= tag_next(t
))
361 if (t
->hdr
.tag
== ATAG_MEM
&&
362 (!t
->u
.mem
.size
|| t
->u
.mem
.size
& ~PAGE_MASK
||
363 t
->u
.mem
.start
& ~PAGE_MASK
)) {
365 "Clearing invalid memory bank %dKB@0x%08x\n",
366 t
->u
.mem
.size
/ 1024, t
->u
.mem
.start
);