x86: disable BTS ptrace extensions for now
[wrt350n-kernel.git] / drivers / usb / host / ehci-fsl.h
blobb5e59db53347fa37df58456252e50876608b6c35
1 /* Copyright (c) 2005 freescale semiconductor
2 * Copyright (c) 2005 MontaVista Software
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 675 Mass Ave, Cambridge, MA 02139, USA.
18 #ifndef _EHCI_FSL_H
19 #define _EHCI_FSL_H
21 /* offsets for the non-ehci registers in the FSL SOC USB controller */
22 #define FSL_SOC_USB_ULPIVP 0x170
23 #define FSL_SOC_USB_PORTSC1 0x184
24 #define PORT_PTS_MSK (3<<30)
25 #define PORT_PTS_UTMI (0<<30)
26 #define PORT_PTS_ULPI (2<<30)
27 #define PORT_PTS_SERIAL (3<<30)
28 #define PORT_PTS_PTW (1<<28)
29 #define FSL_SOC_USB_PORTSC2 0x188
30 #define FSL_SOC_USB_USBMODE 0x1a8
31 #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
32 #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
33 #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
34 #define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
35 #define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
36 #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
37 #define SNOOP_SIZE_2GB 0x1e
38 #endif /* _EHCI_FSL_H */