arch/mips/ite-boards/generic/it8172_setup.c

   1 /*
   2  * BRIEF MODULE DESCRIPTION
   3  *      IT8172/QED5231 board setup.
   4  *
   5  * Copyright 2000 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              ppopov@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/sched.h>
  32 #include <linux/ioport.h>
  33 #include <linux/serial_reg.h>
  34 #include <linux/major.h>
  35 #include <linux/kdev_t.h>
  36 #include <linux/root_dev.h>
  37
  38 #include <asm/cpu.h>
  39 #include <asm/time.h>
  40 #include <asm/io.h>
  41 #include <asm/bootinfo.h>
  42 #include <asm/irq.h>
  43 #include <asm/mipsregs.h>
  44 #include <asm/reboot.h>
  45 #include <asm/traps.h>
  46 #include <asm/it8172/it8172.h>
  47 #include <asm/it8712.h>
  48
  49 extern struct resource ioport_resource;
  50 #ifdef CONFIG_SERIO_I8042
  51 int init_8712_keyboard(void);
  52 #endif
  53
  54 extern int SearchIT8712(void);
  55 extern void InitLPCInterface(void);
  56 extern char * __init prom_getcmdline(void);
  57 extern void it8172_restart(char *command);
  58 extern void it8172_halt(void);
  59 extern void it8172_power_off(void);
  60
  61 extern void (*board_time_init)(void);
  62 extern void (*board_timer_setup)(struct irqaction *irq);
  63 extern void it8172_time_init(void);
  64 extern void it8172_timer_setup(struct irqaction *irq);
  65
  66 #ifdef CONFIG_IT8172_REVC
  67 struct {
  68     struct resource ram;
  69     struct resource pci_mem;
  70     struct resource pci_io;
  71     struct resource flash;
  72     struct resource boot;
  73 } it8172_resources = {
  74     { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
  75     { "PCI Mem",       0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
  76     { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
  77     { "Flash",         0x08000000, 0x0CFFFFFF                 },
  78     { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
  79 };
  80 #else
  81 struct {
  82     struct resource ram;
  83     struct resource pci_mem0;
  84     struct resource pci_mem1;
  85     struct resource pci_io;
  86     struct resource pci_mem2;
  87     struct resource pci_mem3;
  88     struct resource flash;
  89     struct resource boot;
  90 } it8172_resources = {
  91     { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
  92     { "PCI Mem0",      0x0C000000, 0x0FFFFFFF, IORESOURCE_MEM },
  93     { "PCI Mem1",      0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
  94     { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
  95     { "PCI Mem2",      0x1A000000, 0x1BFFFFFF, IORESOURCE_MEM },
  96     { "PCI Mem3",      0x1C000000, 0x1FBFFFFF, IORESOURCE_MEM },
  97     { "Flash",         0x08000000, 0x0CFFFFFF                 },
  98     { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
  99 };
 100 #endif
 101
 102
 103 void __init it8172_init_ram_resource(unsigned long memsize)
 104 {
 105         it8172_resources.ram.end = memsize;
 106 }
 107
 108 void __init plat_setup(void)
 109 {
 110         unsigned short dsr;
 111         char *argptr;
 112
 113         argptr = prom_getcmdline();
 114 #ifdef CONFIG_SERIAL_CONSOLE
 115         if ((argptr = strstr(argptr, "console=")) == NULL) {
 116                 argptr = prom_getcmdline();
 117                 strcat(argptr, " console=ttyS0,115200");
 118         }
 119 #endif
 120
 121         clear_c0_status(ST0_FR);
 122
 123         board_time_init = it8172_time_init;
 124         board_timer_setup = it8172_timer_setup;
 125
 126         _machine_restart = it8172_restart;
 127         _machine_halt = it8172_halt;
 128         _machine_power_off = it8172_power_off;
 129
 130         /*
 131          * IO/MEM resources.
 132          *
 133          * revisit this area.
 134          */
 135         set_io_port_base(KSEG1);
 136         ioport_resource.start = it8172_resources.pci_io.start;
 137         ioport_resource.end = it8172_resources.pci_io.end;
 138 #ifdef CONFIG_IT8172_REVC
 139         iomem_resource.start = it8172_resources.pci_mem.start;
 140         iomem_resource.end = it8172_resources.pci_mem.end;
 141 #else
 142         iomem_resource.start = it8172_resources.pci_mem0.start;
 143         iomem_resource.end = it8172_resources.pci_mem3.end;
 144 #endif
 145
 146 #ifdef CONFIG_BLK_DEV_INITRD
 147         ROOT_DEV = Root_RAM0;
 148 #endif
 149
 150         /*
 151          * Pull enabled devices out of standby
 152          */
 153         IT_IO_READ16(IT_PM_DSR, dsr);
 154
 155         /*
 156          * Fixme: This breaks when these drivers are modules!!!
 157          */
 158 #ifdef CONFIG_SOUND_IT8172
 159         dsr &= ~IT_PM_DSR_ACSB;
 160 #else
 161         dsr |= IT_PM_DSR_ACSB;
 162 #endif
 163 #ifdef CONFIG_BLK_DEV_IT8172
 164         dsr &= ~IT_PM_DSR_IDESB;
 165 #else
 166         dsr |= IT_PM_DSR_IDESB;
 167 #endif
 168         IT_IO_WRITE16(IT_PM_DSR, dsr);
 169
 170         InitLPCInterface();
 171
 172 #ifdef CONFIG_MIPS_ITE8172
 173         if (SearchIT8712()) {
 174                 printk("Found IT8712 Super IO\n");
 175                 /* enable IT8712 serial port */
 176                 LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
 177                 LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
 178 #ifdef CONFIG_SERIO_I8042
 179                 if (init_8712_keyboard()) {
 180                         printk("Unable to initialize keyboard\n");
 181                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
 182                 } else {
 183                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
 184                         LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
 185                         LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
 186
 187                         LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
 188
 189                         LPCSetConfig(0x4, 0x30, 0x1);
 190                         LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
 191
 192                         if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
 193                                         (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
 194                                 printk("Error: keyboard or mouse not enabled\n");
 195
 196                 }
 197 #endif
 198         }
 199         else {
 200                 printk("IT8712 Super IO not found\n");
 201         }
 202 #endif
 203
 204 #ifdef CONFIG_IT8172_CIR
 205         {
 206                 unsigned long data;
 207                 //printk("Enabling CIR0\n");
 208                 IT_IO_READ16(IT_PM_DSR, data);
 209                 data &= ~IT_PM_DSR_CIR0SB;
 210                 IT_IO_WRITE16(IT_PM_DSR, data);
 211                 //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
 212         }
 213 #endif
 214 #ifdef CONFIG_IT8172_SCR0
 215         {
 216                 unsigned i;
 217                 /* Enable Smart Card Reader 0 */
 218                 /* First power it up */
 219                 IT_IO_READ16(IT_PM_DSR, i);
 220                 i &= ~IT_PM_DSR_SCR0SB;
 221                 IT_IO_WRITE16(IT_PM_DSR, i);
 222                 /* Then initialize its registers */
 223                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
 224                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
 225                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
 226                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
 227                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
 228                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
 229                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
 230                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
 231         }
 232 #endif /* CONFIG_IT8172_SCR0 */
 233 #ifdef CONFIG_IT8172_SCR1
 234         {
 235                 unsigned i;
 236                 /* Enable Smart Card Reader 1 */
 237                 /* First power it up */
 238                 IT_IO_READ16(IT_PM_DSR, i);
 239                 i &= ~IT_PM_DSR_SCR1SB;
 240                 IT_IO_WRITE16(IT_PM_DSR, i);
 241                 /* Then initialize its registers */
 242                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
 243                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
 244                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
 245                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
 246                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
 247                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
 248                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
 249                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
 250         }
 251 #endif /* CONFIG_IT8172_SCR1 */
 252 }
 253
 254 #ifdef CONFIG_SERIO_I8042
 255 /*
 256  * According to the ITE Special BIOS Note for waking up the
 257  * keyboard controller...
 258  */
 259 static int init_8712_keyboard(void)
 260 {
 261         unsigned int cmd_port = 0x14000064;
 262         unsigned int data_port = 0x14000060;
 263                                  ^^^^^^^^^^^
 264         Somebody here doesn't grok the concept of io ports.
 265
 266         unsigned char data;
 267         int i;
 268
 269         outb(0xaa, cmd_port); /* send self-test cmd */
 270         i = 0;
 271         while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
 272                 i++;
 273                 if (i > 0xffffff)
 274                         return 1;
 275         }
 276
 277         data = inb(data_port);
 278         outb(0xcb, cmd_port); /* set ps2 mode */
 279         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 280                 i++;
 281                 if (i > 0xffffff)
 282                         return 1;
 283         }
 284         outb(0x01, data_port);
 285         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 286                 i++;
 287                 if (i > 0xffffff)
 288                         return 1;
 289         }
 290
 291         outb(0x60, cmd_port); /* write 8042 command byte */
 292         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 293                 i++;
 294                 if (i > 0xffffff)
 295                         return 1;
 296         }
 297         outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
 298         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 299                 i++;
 300                 if (i > 0xffffff)
 301                         return 1;
 302         }
 303
 304         outb(0xae, cmd_port); /* enable interface */
 305         return 0;
 306 }
 307 #endif