x86: introduce native_set_pte_atomic() on 64-bit too
[wrt350n-kernel.git] / include / asm-arm / arch-at91 / entry-macro.S
blob1005eee6219b410da4f384b5879c40e011abb50e
1 /*
2  * include/asm-arm/arch-at91/entry-macro.S
3  *
4  *  Copyright (C) 2003-2005 SAN People
5  *
6  * Low-level IRQ helper macros for AT91RM9200 platforms
7  *
8  * This file is licensed under the terms of the GNU General Public
9  * License version 2. This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  */
13 #include <asm/hardware.h>
14 #include <asm/arch/at91_aic.h>
16         .macro  disable_fiq
17         .endm
19         .macro  get_irqnr_preamble, base, tmp
20         ldr     \base, =(AT91_VA_BASE_SYS + AT91_AIC)           @ base virtual address of AIC peripheral
21         .endm
23         .macro  arch_ret_to_user, tmp1, tmp2
24         .endm
26         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
27         ldr     \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)]     @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
28         ldr     \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)]   @ read interrupt source number
29         teq     \irqstat, #0                                    @ ISR is 0 when no current interrupt, or spurious interrupt
30         streq   \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)]     @ not going to be handled further, then ACK it now.
31         .endm