x86: introduce native_set_pte_atomic() on 64-bit too
[wrt350n-kernel.git] / include / asm-blackfin / irq.h
blob65480dab244ef72dc9c338ff65c053e7a676a22d
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
6 * Changed by HuTao Apr18, 2003
8 * Copyright was missing when I got the code so took from MIPS arch ...MaTed---
9 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
10 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 2001 by Ralf Baechle
12 * Adapted for BlackFin (ADI) by Ted Ma <mated@sympatico.ca>
13 * Copyright (c) 2002 Arcturus Networks Inc. (www.arcturusnetworks.com)
14 * Copyright (c) 2002 Lineo, Inc. <mattw@lineo.com>
17 #ifndef _BFIN_IRQ_H_
18 #define _BFIN_IRQ_H_
20 #include <asm/mach/irq.h>
21 #include <asm/ptrace.h>
23 /*******************************************************************************
24 ***** INTRODUCTION ***********
25 * On the Blackfin, the interrupt structure allows remmapping of the hardware
26 * levels.
27 * - I'm going to assume that the H/W level is going to stay at the default
28 * settings. If someone wants to go through and abstart this out, feel free
29 * to mod the interrupt numbering scheme.
30 * - I'm abstracting the interrupts so that uClinux does not know anything
31 * about the H/W levels. If you want to change the H/W AND keep the abstracted
32 * levels that uClinux sees, you should be able to do most of it here.
33 * - I've left the "abstract" numbering sparce in case someone wants to pull the
34 * interrupts apart (just the TX/RX for the various devices)
35 *******************************************************************************/
37 /* SYS_IRQS and NR_IRQS are defined in <asm/mach-bf5xx/irq.h>*/
40 * Machine specific interrupt sources.
42 * Adding an interrupt service routine for a source with this bit
43 * set indicates a special machine specific interrupt source.
44 * The machine specific files define these sources.
46 * The IRQ_MACHSPEC bit is now gone - the only thing it did was to
47 * introduce unnecessary overhead.
49 * All interrupt handling is actually machine specific so it is better
50 * to use function pointers, as used by the Sparc port, and select the
51 * interrupt handling functions when initializing the kernel. This way
52 * we save some unnecessary overhead at run-time.
53 * 01/11/97 - Jes
56 extern void ack_bad_irq(unsigned int irq);
58 static __inline__ int irq_canonicalize(int irq)
60 return irq;
63 /* count of spurious interrupts */
64 /* extern volatile unsigned int num_spurious; */
66 #ifndef NO_IRQ
67 #define NO_IRQ ((unsigned int)(-1))
68 #endif
70 #endif /* _BFIN_IRQ_H_ */