x86: introduce native_set_pte_atomic() on 64-bit too
[wrt350n-kernel.git] / include / asm-blackfin / mach-bf527 / blackfin.h
blob1bd07e30781c5581d72a928b9605d065f4cdfc07
1 /*
2 * File: include/asm-blackfin/mach-bf527/blackfin.h
3 * Based on:
4 * Author:
6 * Created:
7 * Description:
9 * Rev:
11 * Modified:
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2, or (at your option)
19 * any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; see the file COPYING.
28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #ifndef _MACH_BLACKFIN_H_
33 #define _MACH_BLACKFIN_H_
35 #define BF527_FAMILY
37 #include "bf527.h"
38 #include "mem_map.h"
39 #include "defBF522.h"
40 #include "anomaly.h"
42 #if defined(CONFIG_BF527)
43 #include "defBF527.h"
44 #endif
46 #if defined(CONFIG_BF525)
47 #include "defBF525.h"
48 #endif
50 #if !defined(__ASSEMBLY__)
51 #include "cdefBF522.h"
53 #if defined(CONFIG_BF527)
54 #include "cdefBF527.h"
55 #endif
57 #if defined(CONFIG_BF525)
58 #include "cdefBF525.h"
59 #endif
60 #endif
62 /* UART_IIR Register */
63 #define STATUS(x) ((x << 1) & 0x06)
64 #define STATUS_P1 0x02
65 #define STATUS_P0 0x01
67 /* DPMC*/
68 #define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
69 #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
70 #define STOPCK_OFF STOPCK
72 /* PLL_DIV Masks */
73 #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
74 #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
75 #define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */
76 #define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */
78 #endif