x86: introduce native_set_pte_atomic() on 64-bit too
[wrt350n-kernel.git] / include / asm-sh / cpu-sh5 / cacheflush.h
blob98edb5b1da32f12bf732cdfee54bfa635803e21a
1 #ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H
2 #define __ASM_SH_CPU_SH5_CACHEFLUSH_H
4 #ifndef __ASSEMBLY__
6 #include <asm/page.h>
8 struct vm_area_struct;
9 struct page;
10 struct mm_struct;
12 extern void flush_cache_all(void);
13 extern void flush_cache_mm(struct mm_struct *mm);
14 extern void flush_cache_sigtramp(unsigned long start, unsigned long end);
15 extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
16 unsigned long end);
17 extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
18 extern void flush_dcache_page(struct page *pg);
19 extern void flush_icache_range(unsigned long start, unsigned long end);
20 extern void flush_icache_user_range(struct vm_area_struct *vma,
21 struct page *page, unsigned long addr,
22 int len);
24 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
26 #define flush_dcache_mmap_lock(mapping) do { } while (0)
27 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
29 #define flush_icache_page(vma, page) do { } while (0)
30 #define p3_cache_init() do { } while (0)
32 #endif /* __ASSEMBLY__ */
34 #endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */