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Blackfin serial driver: pending a unique anomaly id, tie the break flood issue to...
[wrt350n-kernel.git] / drivers / net / au1000_eth.c
blobe86b3691765b7721eff0947e91d92d5d396c1c57
1 /*
2 *
3 * Alchemy Au1x00 ethernet driver
4 *
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
14 *
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
17 *
18 * ########################################################################
19 *
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
23 *
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
32 *
33 * ########################################################################
34 *
35 *
36 */
37 #include <linux/dma-mapping.h>
38 #include <linux/module.h>
39 #include <linux/kernel.h>
40 #include <linux/string.h>
41 #include <linux/timer.h>
42 #include <linux/errno.h>
43 #include <linux/in.h>
44 #include <linux/ioport.h>
45 #include <linux/bitops.h>
46 #include <linux/slab.h>
47 #include <linux/interrupt.h>
48 #include <linux/init.h>
49 #include <linux/netdevice.h>
50 #include <linux/etherdevice.h>
51 #include <linux/ethtool.h>
52 #include <linux/mii.h>
53 #include <linux/skbuff.h>
54 #include <linux/delay.h>
55 #include <linux/crc32.h>
56 #include <linux/phy.h>
57 #include <asm/mipsregs.h>
58 #include <asm/irq.h>
59 #include <asm/io.h>
60 #include <asm/processor.h>
61
62 #include <asm/mach-au1x00/au1000.h>
63 #include <asm/cpu.h>
64 #include "au1000_eth.h"
65
66 #ifdef AU1000_ETH_DEBUG
67 static int au1000_debug = 5;
68 #else
69 static int au1000_debug = 3;
70 #endif
71
72 #define DRV_NAME "au1000_eth"
73 #define DRV_VERSION "1.6"
74 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
75 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
76
77 MODULE_AUTHOR(DRV_AUTHOR);
78 MODULE_DESCRIPTION(DRV_DESC);
79 MODULE_LICENSE("GPL");
80
81 // prototypes
82 static void hard_stop(struct net_device *);
83 static void enable_rx_tx(struct net_device *dev);
84 static struct net_device * au1000_probe(int port_num);
85 static int au1000_init(struct net_device *);
86 static int au1000_open(struct net_device *);
87 static int au1000_close(struct net_device *);
88 static int au1000_tx(struct sk_buff *, struct net_device *);
89 static int au1000_rx(struct net_device *);
90 static irqreturn_t au1000_interrupt(int, void *);
91 static void au1000_tx_timeout(struct net_device *);
92 static void set_rx_mode(struct net_device *);
93 static struct net_device_stats *au1000_get_stats(struct net_device *);
94 static int au1000_ioctl(struct net_device *, struct ifreq *, int);
95 static int mdio_read(struct net_device *, int, int);
96 static void mdio_write(struct net_device *, int, int, u16);
97 static void au1000_adjust_link(struct net_device *);
98 static void enable_mac(struct net_device *, int);
99
100 // externs
101 extern int get_ethernet_addr(char *ethernet_addr);
102 extern void str2eaddr(unsigned char *ea, unsigned char *str);
103 extern char * prom_getcmdline(void);
104
105 /*
106 * Theory of operation
107 *
108 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
109 * There are four receive and four transmit descriptors. These
110 * descriptors are not in memory; rather, they are just a set of
111 * hardware registers.
112 *
113 * Since the Au1000 has a coherent data cache, the receive and
114 * transmit buffers are allocated from the KSEG0 segment. The
115 * hardware registers, however, are still mapped at KSEG1 to
116 * make sure there's no out-of-order writes, and that all writes
117 * complete immediately.
118 */
119
120 /* These addresses are only used if yamon doesn't tell us what
121 * the mac address is, and the mac address is not passed on the
122 * command line.
123 */
124 static unsigned char au1000_mac_addr[6] __devinitdata = {
125 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
126 };
127
128 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
129
130 /*
131 * board-specific configurations
132 *
133 * PHY detection algorithm
134 *
135 * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
136 * autodetected:
137 *
138 * mii_probe() first searches the current MAC's MII bus for a PHY,
139 * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
140 * defined) PHY address not already claimed by another netdev.
141 *
142 * If nothing was found that way when searching for the 2nd ethernet
143 * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
144 * the first MII bus is searched as well for an unclaimed PHY; this is
145 * needed in case of a dual-PHY accessible only through the MAC0's MII
146 * bus.
147 *
148 * Finally, if no PHY is found, then the corresponding ethernet
149 * controller is not registered to the network subsystem.
150 */
151
152 /* autodetection defaults */
153 #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
154 #define AU1XXX_PHY1_SEARCH_ON_MAC0
155
156 /* static PHY setup
157 *
158 * most boards PHY setup should be detectable properly with the
159 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
160 * you have a switch attached, or want to use the PHY's interrupt
161 * notification capabilities) you can provide a static PHY
162 * configuration here
163 *
164 * IRQs may only be set, if a PHY address was configured
165 * If a PHY address is given, also a bus id is required to be set
166 *
167 * ps: make sure the used irqs are configured properly in the board
168 * specific irq-map
169 */
170
171 #if defined(CONFIG_MIPS_BOSPORUS)
172 /*
173 * Micrel/Kendin 5 port switch attached to MAC0,
174 * MAC0 is associated with PHY address 5 (== WAN port)
175 * MAC1 is not associated with any PHY, since it's connected directly
176 * to the switch.
177 * no interrupts are used
178 */
179 # define AU1XXX_PHY_STATIC_CONFIG
180
181 # define AU1XXX_PHY0_ADDR 5
182 # define AU1XXX_PHY0_BUSID 0
183 # undef AU1XXX_PHY0_IRQ
184
185 # undef AU1XXX_PHY1_ADDR
186 # undef AU1XXX_PHY1_BUSID
187 # undef AU1XXX_PHY1_IRQ
188 #endif
189
190 #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
191 # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
192 #endif
193
194 /*
195 * MII operations
196 */
197 static int mdio_read(struct net_device *dev, int phy_addr, int reg)
198 {
199 struct au1000_private *aup = (struct au1000_private *) dev->priv;
200 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
201 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
202 u32 timedout = 20;
203 u32 mii_control;
204
205 while (*mii_control_reg & MAC_MII_BUSY) {
206 mdelay(1);
207 if (--timedout == 0) {
208 printk(KERN_ERR "%s: read_MII busy timeout!!\n",
209 dev->name);
210 return -1;
211 }
212 }
213
214 mii_control = MAC_SET_MII_SELECT_REG(reg) |
215 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
216
217 *mii_control_reg = mii_control;
218
219 timedout = 20;
220 while (*mii_control_reg & MAC_MII_BUSY) {
221 mdelay(1);
222 if (--timedout == 0) {
223 printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
224 dev->name);
225 return -1;
226 }
227 }
228 return (int)*mii_data_reg;
229 }
230
231 static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
232 {
233 struct au1000_private *aup = (struct au1000_private *) dev->priv;
234 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
235 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
236 u32 timedout = 20;
237 u32 mii_control;
238
239 while (*mii_control_reg & MAC_MII_BUSY) {
240 mdelay(1);
241 if (--timedout == 0) {
242 printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
243 dev->name);
244 return;
245 }
246 }
247
248 mii_control = MAC_SET_MII_SELECT_REG(reg) |
249 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
250
251 *mii_data_reg = value;
252 *mii_control_reg = mii_control;
253 }
254
255 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
256 {
257 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
258 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
259 struct net_device *const dev = bus->priv;
260
261 enable_mac(dev, 0); /* make sure the MAC associated with this
262 * mii_bus is enabled */
263 return mdio_read(dev, phy_addr, regnum);
264 }
265
266 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
267 u16 value)
268 {
269 struct net_device *const dev = bus->priv;
270
271 enable_mac(dev, 0); /* make sure the MAC associated with this
272 * mii_bus is enabled */
273 mdio_write(dev, phy_addr, regnum, value);
274 return 0;
275 }
276
277 static int mdiobus_reset(struct mii_bus *bus)
278 {
279 struct net_device *const dev = bus->priv;
280
281 enable_mac(dev, 0); /* make sure the MAC associated with this
282 * mii_bus is enabled */
283 return 0;
284 }
285
286 static int mii_probe (struct net_device *dev)
287 {
288 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
289 struct phy_device *phydev = NULL;
290
291 #if defined(AU1XXX_PHY_STATIC_CONFIG)
292 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
293
294 if(aup->mac_id == 0) { /* get PHY0 */
295 # if defined(AU1XXX_PHY0_ADDR)
296 phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
297 # else
298 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
299 dev->name);
300 return 0;
301 # endif /* defined(AU1XXX_PHY0_ADDR) */
302 } else if (aup->mac_id == 1) { /* get PHY1 */
303 # if defined(AU1XXX_PHY1_ADDR)
304 phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
305 # else
306 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
307 dev->name);
308 return 0;
309 # endif /* defined(AU1XXX_PHY1_ADDR) */
310 }
311
312 #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
313 int phy_addr;
314
315 /* find the first (lowest address) PHY on the current MAC's MII bus */
316 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
317 if (aup->mii_bus.phy_map[phy_addr]) {
318 phydev = aup->mii_bus.phy_map[phy_addr];
319 # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
320 break; /* break out with first one found */
321 # endif
322 }
323
324 # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
325 /* try harder to find a PHY */
326 if (!phydev && (aup->mac_id == 1)) {
327 /* no PHY found, maybe we have a dual PHY? */
328 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
329 "let's see if it's attached to MAC0...\n");
330
331 BUG_ON(!au_macs[0]);
332
333 /* find the first (lowest address) non-attached PHY on
334 * the MAC0 MII bus */
335 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
336 struct phy_device *const tmp_phydev =
337 au_macs[0]->mii_bus.phy_map[phy_addr];
338
339 if (!tmp_phydev)
340 continue; /* no PHY here... */
341
342 if (tmp_phydev->attached_dev)
343 continue; /* already claimed by MAC0 */
344
345 phydev = tmp_phydev;
346 break; /* found it */
347 }
348 }
349 # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
350
351 #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
352 if (!phydev) {
353 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
354 return -1;
355 }
356
357 /* now we are supposed to have a proper phydev, to attach to... */
358 BUG_ON(!phydev);
359 BUG_ON(phydev->attached_dev);
360
361 phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0,
362 PHY_INTERFACE_MODE_MII);
363
364 if (IS_ERR(phydev)) {
365 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
366 return PTR_ERR(phydev);
367 }
368
369 /* mask with MAC supported features */
370 phydev->supported &= (SUPPORTED_10baseT_Half
371 | SUPPORTED_10baseT_Full
372 | SUPPORTED_100baseT_Half
373 | SUPPORTED_100baseT_Full
374 | SUPPORTED_Autoneg
375 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
376 | SUPPORTED_MII
377 | SUPPORTED_TP);
378
379 phydev->advertising = phydev->supported;
380
381 aup->old_link = 0;
382 aup->old_speed = 0;
383 aup->old_duplex = -1;
384 aup->phy_dev = phydev;
385
386 printk(KERN_INFO "%s: attached PHY driver [%s] "
387 "(mii_bus:phy_addr=%s, irq=%d)\n",
388 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
389
390 return 0;
391 }
392
393
394 /*
395 * Buffer allocation/deallocation routines. The buffer descriptor returned
396 * has the virtual and dma address of a buffer suitable for
397 * both, receive and transmit operations.
398 */
399 static db_dest_t *GetFreeDB(struct au1000_private *aup)
400 {
401 db_dest_t *pDB;
402 pDB = aup->pDBfree;
403
404 if (pDB) {
405 aup->pDBfree = pDB->pnext;
406 }
407 return pDB;
408 }
409
410 void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
411 {
412 db_dest_t *pDBfree = aup->pDBfree;
413 if (pDBfree)
414 pDBfree->pnext = pDB;
415 aup->pDBfree = pDB;
416 }
417
418 static void enable_rx_tx(struct net_device *dev)
419 {
420 struct au1000_private *aup = (struct au1000_private *) dev->priv;
421
422 if (au1000_debug > 4)
423 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
424
425 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
426 au_sync_delay(10);
427 }
428
429 static void hard_stop(struct net_device *dev)
430 {
431 struct au1000_private *aup = (struct au1000_private *) dev->priv;
432
433 if (au1000_debug > 4)
434 printk(KERN_INFO "%s: hard stop\n", dev->name);
435
436 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
437 au_sync_delay(10);
438 }
439
440 static void enable_mac(struct net_device *dev, int force_reset)
441 {
442 unsigned long flags;
443 struct au1000_private *aup = (struct au1000_private *) dev->priv;
444
445 spin_lock_irqsave(&aup->lock, flags);
446
447 if(force_reset || (!aup->mac_enabled)) {
448 *aup->enable = MAC_EN_CLOCK_ENABLE;
449 au_sync_delay(2);
450 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
451 | MAC_EN_CLOCK_ENABLE);
452 au_sync_delay(2);
453
454 aup->mac_enabled = 1;
455 }
456
457 spin_unlock_irqrestore(&aup->lock, flags);
458 }
459
460 static void reset_mac_unlocked(struct net_device *dev)
461 {
462 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
463 int i;
464
465 hard_stop(dev);
466
467 *aup->enable = MAC_EN_CLOCK_ENABLE;
468 au_sync_delay(2);
469 *aup->enable = 0;
470 au_sync_delay(2);
471
472 aup->tx_full = 0;
473 for (i = 0; i < NUM_RX_DMA; i++) {
474 /* reset control bits */
475 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
476 }
477 for (i = 0; i < NUM_TX_DMA; i++) {
478 /* reset control bits */
479 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
480 }
481
482 aup->mac_enabled = 0;
483
484 }
485
486 static void reset_mac(struct net_device *dev)
487 {
488 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
489 unsigned long flags;
490
491 if (au1000_debug > 4)
492 printk(KERN_INFO "%s: reset mac, aup %x\n",
493 dev->name, (unsigned)aup);
494
495 spin_lock_irqsave(&aup->lock, flags);
496
497 reset_mac_unlocked (dev);
498
499 spin_unlock_irqrestore(&aup->lock, flags);
500 }
501
502 /*
503 * Setup the receive and transmit "rings". These pointers are the addresses
504 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
505 * these are not descriptors sitting in memory.
506 */
507 static void
508 setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
509 {
510 int i;
511
512 for (i = 0; i < NUM_RX_DMA; i++) {
513 aup->rx_dma_ring[i] =
514 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
515 }
516 for (i = 0; i < NUM_TX_DMA; i++) {
517 aup->tx_dma_ring[i] =
518 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
519 }
520 }
521
522 static struct {
523 u32 base_addr;
524 u32 macen_addr;
525 int irq;
526 struct net_device *dev;
527 } iflist[2] = {
528 #ifdef CONFIG_SOC_AU1000
529 {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
530 {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
531 #endif
532 #ifdef CONFIG_SOC_AU1100
533 {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
534 #endif
535 #ifdef CONFIG_SOC_AU1500
536 {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
537 {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
538 #endif
539 #ifdef CONFIG_SOC_AU1550
540 {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
541 {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
542 #endif
543 };
544
545 static int num_ifs;
546
547 /*
548 * Setup the base address and interupt of the Au1xxx ethernet macs
549 * based on cpu type and whether the interface is enabled in sys_pinfunc
550 * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
551 */
552 static int __init au1000_init_module(void)
553 {
554 int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
555 struct net_device *dev;
556 int i, found_one = 0;
557
558 num_ifs = NUM_ETH_INTERFACES - ni;
559
560 for(i = 0; i < num_ifs; i++) {
561 dev = au1000_probe(i);
562 iflist[i].dev = dev;
563 if (dev)
564 found_one++;
565 }
566 if (!found_one)
567 return -ENODEV;
568 return 0;
569 }
570
571 /*
572 * ethtool operations
573 */
574
575 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
576 {
577 struct au1000_private *aup = (struct au1000_private *)dev->priv;
578
579 if (aup->phy_dev)
580 return phy_ethtool_gset(aup->phy_dev, cmd);
581
582 return -EINVAL;
583 }
584
585 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
586 {
587 struct au1000_private *aup = (struct au1000_private *)dev->priv;
588
589 if (!capable(CAP_NET_ADMIN))
590 return -EPERM;
591
592 if (aup->phy_dev)
593 return phy_ethtool_sset(aup->phy_dev, cmd);
594
595 return -EINVAL;
596 }
597
598 static void
599 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
600 {
601 struct au1000_private *aup = (struct au1000_private *)dev->priv;
602
603 strcpy(info->driver, DRV_NAME);
604 strcpy(info->version, DRV_VERSION);
605 info->fw_version[0] = '\0';
606 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
607 info->regdump_len = 0;
608 }
609
610 static const struct ethtool_ops au1000_ethtool_ops = {
611 .get_settings = au1000_get_settings,
612 .set_settings = au1000_set_settings,
613 .get_drvinfo = au1000_get_drvinfo,
614 .get_link = ethtool_op_get_link,
615 };
616
617 static struct net_device * au1000_probe(int port_num)
618 {
619 static unsigned version_printed = 0;
620 struct au1000_private *aup = NULL;
621 struct net_device *dev = NULL;
622 db_dest_t *pDB, *pDBfree;
623 char *pmac, *argptr;
624 char ethaddr[6];
625 int irq, i, err;
626 u32 base, macen;
627
628 if (port_num >= NUM_ETH_INTERFACES)
629 return NULL;
630
631 base = CPHYSADDR(iflist[port_num].base_addr );
632 macen = CPHYSADDR(iflist[port_num].macen_addr);
633 irq = iflist[port_num].irq;
634
635 if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
636 !request_mem_region(macen, 4, "Au1x00 ENET"))
637 return NULL;
638
639 if (version_printed++ == 0)
640 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
641
642 dev = alloc_etherdev(sizeof(struct au1000_private));
643 if (!dev) {
644 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
645 return NULL;
646 }
647
648 if ((err = register_netdev(dev)) != 0) {
649 printk(KERN_ERR "%s: Cannot register net device, error %d\n",
650 DRV_NAME, err);
651 free_netdev(dev);
652 return NULL;
653 }
654
655 printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
656 dev->name, base, irq);
657
658 aup = dev->priv;
659
660 /* Allocate the data buffers */
661 /* Snooping works fine with eth on all au1xxx */
662 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
663 (NUM_TX_BUFFS + NUM_RX_BUFFS),
664 &aup->dma_addr, 0);
665 if (!aup->vaddr) {
666 free_netdev(dev);
667 release_mem_region( base, MAC_IOSIZE);
668 release_mem_region(macen, 4);
669 return NULL;
670 }
671
672 /* aup->mac is the base address of the MAC's registers */
673 aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
674
675 /* Setup some variables for quick register address access */
676 aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
677 aup->mac_id = port_num;
678 au_macs[port_num] = aup;
679
680 if (port_num == 0) {
681 /* Check the environment variables first */
682 if (get_ethernet_addr(ethaddr) == 0)
683 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
684 else {
685 /* Check command line */
686 argptr = prom_getcmdline();
687 if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
688 printk(KERN_INFO "%s: No MAC address found\n",
689 dev->name);
690 /* Use the hard coded MAC addresses */
691 else {
692 str2eaddr(ethaddr, pmac + strlen("ethaddr="));
693 memcpy(au1000_mac_addr, ethaddr,
694 sizeof(au1000_mac_addr));
695 }
696 }
697
698 setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
699 } else if (port_num == 1)
700 setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
701
702 /*
703 * Assign to the Ethernet ports two consecutive MAC addresses
704 * to match those that are printed on their stickers
705 */
706 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
707 dev->dev_addr[5] += port_num;
708
709 *aup->enable = 0;
710 aup->mac_enabled = 0;
711
712 aup->mii_bus.priv = dev;
713 aup->mii_bus.read = mdiobus_read;
714 aup->mii_bus.write = mdiobus_write;
715 aup->mii_bus.reset = mdiobus_reset;
716 aup->mii_bus.name = "au1000_eth_mii";
717 aup->mii_bus.id = aup->mac_id;
718 aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
719 for(i = 0; i < PHY_MAX_ADDR; ++i)
720 aup->mii_bus.irq[i] = PHY_POLL;
721
722 /* if known, set corresponding PHY IRQs */
723 #if defined(AU1XXX_PHY_STATIC_CONFIG)
724 # if defined(AU1XXX_PHY0_IRQ)
725 if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
726 aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
727 # endif
728 # if defined(AU1XXX_PHY1_IRQ)
729 if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
730 aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
731 # endif
732 #endif
733 mdiobus_register(&aup->mii_bus);
734
735 if (mii_probe(dev) != 0) {
736 goto err_out;
737 }
738
739 pDBfree = NULL;
740 /* setup the data buffer descriptors and attach a buffer to each one */
741 pDB = aup->db;
742 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
743 pDB->pnext = pDBfree;
744 pDBfree = pDB;
745 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
746 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
747 pDB++;
748 }
749 aup->pDBfree = pDBfree;
750
751 for (i = 0; i < NUM_RX_DMA; i++) {
752 pDB = GetFreeDB(aup);
753 if (!pDB) {
754 goto err_out;
755 }
756 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
757 aup->rx_db_inuse[i] = pDB;
758 }
759 for (i = 0; i < NUM_TX_DMA; i++) {
760 pDB = GetFreeDB(aup);
761 if (!pDB) {
762 goto err_out;
763 }
764 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
765 aup->tx_dma_ring[i]->len = 0;
766 aup->tx_db_inuse[i] = pDB;
767 }
768
769 spin_lock_init(&aup->lock);
770 dev->base_addr = base;
771 dev->irq = irq;
772 dev->open = au1000_open;
773 dev->hard_start_xmit = au1000_tx;
774 dev->stop = au1000_close;
775 dev->get_stats = au1000_get_stats;
776 dev->set_multicast_list = &set_rx_mode;
777 dev->do_ioctl = &au1000_ioctl;
778 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
779 dev->tx_timeout = au1000_tx_timeout;
780 dev->watchdog_timeo = ETH_TX_TIMEOUT;
781
782 /*
783 * The boot code uses the ethernet controller, so reset it to start
784 * fresh. au1000_init() expects that the device is in reset state.
785 */
786 reset_mac(dev);
787
788 return dev;
789
790 err_out:
791 /* here we should have a valid dev plus aup-> register addresses
792 * so we can reset the mac properly.*/
793 reset_mac(dev);
794
795 for (i = 0; i < NUM_RX_DMA; i++) {
796 if (aup->rx_db_inuse[i])
797 ReleaseDB(aup, aup->rx_db_inuse[i]);
798 }
799 for (i = 0; i < NUM_TX_DMA; i++) {
800 if (aup->tx_db_inuse[i])
801 ReleaseDB(aup, aup->tx_db_inuse[i]);
802 }
803 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
804 (void *)aup->vaddr, aup->dma_addr);
805 unregister_netdev(dev);
806 free_netdev(dev);
807 release_mem_region( base, MAC_IOSIZE);
808 release_mem_region(macen, 4);
809 return NULL;
810 }
811
812 /*
813 * Initialize the interface.
814 *
815 * When the device powers up, the clocks are disabled and the
816 * mac is in reset state. When the interface is closed, we
817 * do the same -- reset the device and disable the clocks to
818 * conserve power. Thus, whenever au1000_init() is called,
819 * the device should already be in reset state.
820 */
821 static int au1000_init(struct net_device *dev)
822 {
823 struct au1000_private *aup = (struct au1000_private *) dev->priv;
824 u32 flags;
825 int i;
826 u32 control;
827
828 if (au1000_debug > 4)
829 printk("%s: au1000_init\n", dev->name);
830
831 /* bring the device out of reset */
832 enable_mac(dev, 1);
833
834 spin_lock_irqsave(&aup->lock, flags);
835
836 aup->mac->control = 0;
837 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
838 aup->tx_tail = aup->tx_head;
839 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
840
841 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
842 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
843 dev->dev_addr[1]<<8 | dev->dev_addr[0];
844
845 for (i = 0; i < NUM_RX_DMA; i++) {
846 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
847 }
848 au_sync();
849
850 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
851 #ifndef CONFIG_CPU_LITTLE_ENDIAN
852 control |= MAC_BIG_ENDIAN;
853 #endif
854 if (aup->phy_dev) {
855 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
856 control |= MAC_FULL_DUPLEX;
857 else
858 control |= MAC_DISABLE_RX_OWN;
859 } else { /* PHY-less op, assume full-duplex */
860 control |= MAC_FULL_DUPLEX;
861 }
862
863 aup->mac->control = control;
864 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
865 au_sync();
866
867 spin_unlock_irqrestore(&aup->lock, flags);
868 return 0;
869 }
870
871 static void
872 au1000_adjust_link(struct net_device *dev)
873 {
874 struct au1000_private *aup = (struct au1000_private *) dev->priv;
875 struct phy_device *phydev = aup->phy_dev;
876 unsigned long flags;
877
878 int status_change = 0;
879
880 BUG_ON(!aup->phy_dev);
881
882 spin_lock_irqsave(&aup->lock, flags);
883
884 if (phydev->link && (aup->old_speed != phydev->speed)) {
885 // speed changed
886
887 switch(phydev->speed) {
888 case SPEED_10:
889 case SPEED_100:
890 break;
891 default:
892 printk(KERN_WARNING
893 "%s: Speed (%d) is not 10/100 ???\n",
894 dev->name, phydev->speed);
895 break;
896 }
897
898 aup->old_speed = phydev->speed;
899
900 status_change = 1;
901 }
902
903 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
904 // duplex mode changed
905
906 /* switching duplex mode requires to disable rx and tx! */
907 hard_stop(dev);
908
909 if (DUPLEX_FULL == phydev->duplex)
910 aup->mac->control = ((aup->mac->control
911 | MAC_FULL_DUPLEX)
912 & ~MAC_DISABLE_RX_OWN);
913 else
914 aup->mac->control = ((aup->mac->control
915 & ~MAC_FULL_DUPLEX)
916 | MAC_DISABLE_RX_OWN);
917 au_sync_delay(1);
918
919 enable_rx_tx(dev);
920 aup->old_duplex = phydev->duplex;
921
922 status_change = 1;
923 }
924
925 if(phydev->link != aup->old_link) {
926 // link state changed
927
928 if (phydev->link) // link went up
929 netif_schedule(dev);
930 else { // link went down
931 aup->old_speed = 0;
932 aup->old_duplex = -1;
933 }
934
935 aup->old_link = phydev->link;
936 status_change = 1;
937 }
938
939 spin_unlock_irqrestore(&aup->lock, flags);
940
941 if (status_change) {
942 if (phydev->link)
943 printk(KERN_INFO "%s: link up (%d/%s)\n",
944 dev->name, phydev->speed,
945 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
946 else
947 printk(KERN_INFO "%s: link down\n", dev->name);
948 }
949 }
950
951 static int au1000_open(struct net_device *dev)
952 {
953 int retval;
954 struct au1000_private *aup = (struct au1000_private *) dev->priv;
955
956 if (au1000_debug > 4)
957 printk("%s: open: dev=%p\n", dev->name, dev);
958
959 if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
960 dev->name, dev))) {
961 printk(KERN_ERR "%s: unable to get IRQ %d\n",
962 dev->name, dev->irq);
963 return retval;
964 }
965
966 if ((retval = au1000_init(dev))) {
967 printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
968 free_irq(dev->irq, dev);
969 return retval;
970 }
971
972 if (aup->phy_dev) {
973 /* cause the PHY state machine to schedule a link state check */
974 aup->phy_dev->state = PHY_CHANGELINK;
975 phy_start(aup->phy_dev);
976 }
977
978 netif_start_queue(dev);
979
980 if (au1000_debug > 4)
981 printk("%s: open: Initialization done.\n", dev->name);
982
983 return 0;
984 }
985
986 static int au1000_close(struct net_device *dev)
987 {
988 unsigned long flags;
989 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
990
991 if (au1000_debug > 4)
992 printk("%s: close: dev=%p\n", dev->name, dev);
993
994 if (aup->phy_dev)
995 phy_stop(aup->phy_dev);
996
997 spin_lock_irqsave(&aup->lock, flags);
998
999 reset_mac_unlocked (dev);
1000
1001 /* stop the device */
1002 netif_stop_queue(dev);
1003
1004 /* disable the interrupt */
1005 free_irq(dev->irq, dev);
1006 spin_unlock_irqrestore(&aup->lock, flags);
1007
1008 return 0;
1009 }
1010
1011 static void __exit au1000_cleanup_module(void)
1012 {
1013 int i, j;
1014 struct net_device *dev;
1015 struct au1000_private *aup;
1016
1017 for (i = 0; i < num_ifs; i++) {
1018 dev = iflist[i].dev;
1019 if (dev) {
1020 aup = (struct au1000_private *) dev->priv;
1021 unregister_netdev(dev);
1022 for (j = 0; j < NUM_RX_DMA; j++)
1023 if (aup->rx_db_inuse[j])
1024 ReleaseDB(aup, aup->rx_db_inuse[j]);
1025 for (j = 0; j < NUM_TX_DMA; j++)
1026 if (aup->tx_db_inuse[j])
1027 ReleaseDB(aup, aup->tx_db_inuse[j]);
1028 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1029 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1030 (void *)aup->vaddr, aup->dma_addr);
1031 release_mem_region(dev->base_addr, MAC_IOSIZE);
1032 release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
1033 free_netdev(dev);
1034 }
1035 }
1036 }
1037
1038 static void update_tx_stats(struct net_device *dev, u32 status)
1039 {
1040 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1041 struct net_device_stats *ps = &aup->stats;
1042
1043 if (status & TX_FRAME_ABORTED) {
1044 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
1045 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
1046 /* any other tx errors are only valid
1047 * in half duplex mode */
1048 ps->tx_errors++;
1049 ps->tx_aborted_errors++;
1050 }
1051 }
1052 else {
1053 ps->tx_errors++;
1054 ps->tx_aborted_errors++;
1055 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
1056 ps->tx_carrier_errors++;
1057 }
1058 }
1059 }
1060
1061
1062 /*
1063 * Called from the interrupt service routine to acknowledge
1064 * the TX DONE bits. This is a must if the irq is setup as
1065 * edge triggered.
1066 */
1067 static void au1000_tx_ack(struct net_device *dev)
1068 {
1069 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1070 volatile tx_dma_t *ptxd;
1071
1072 ptxd = aup->tx_dma_ring[aup->tx_tail];
1073
1074 while (ptxd->buff_stat & TX_T_DONE) {
1075 update_tx_stats(dev, ptxd->status);
1076 ptxd->buff_stat &= ~TX_T_DONE;
1077 ptxd->len = 0;
1078 au_sync();
1079
1080 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
1081 ptxd = aup->tx_dma_ring[aup->tx_tail];
1082
1083 if (aup->tx_full) {
1084 aup->tx_full = 0;
1085 netif_wake_queue(dev);
1086 }
1087 }
1088 }
1089
1090
1091 /*
1092 * Au1000 transmit routine.
1093 */
1094 static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
1095 {
1096 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1097 struct net_device_stats *ps = &aup->stats;
1098 volatile tx_dma_t *ptxd;
1099 u32 buff_stat;
1100 db_dest_t *pDB;
1101 int i;
1102
1103 if (au1000_debug > 5)
1104 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
1105 dev->name, (unsigned)aup, skb->len,
1106 skb->data, aup->tx_head);
1107
1108 ptxd = aup->tx_dma_ring[aup->tx_head];
1109 buff_stat = ptxd->buff_stat;
1110 if (buff_stat & TX_DMA_ENABLE) {
1111 /* We've wrapped around and the transmitter is still busy */
1112 netif_stop_queue(dev);
1113 aup->tx_full = 1;
1114 return 1;
1115 }
1116 else if (buff_stat & TX_T_DONE) {
1117 update_tx_stats(dev, ptxd->status);
1118 ptxd->len = 0;
1119 }
1120
1121 if (aup->tx_full) {
1122 aup->tx_full = 0;
1123 netif_wake_queue(dev);
1124 }
1125
1126 pDB = aup->tx_db_inuse[aup->tx_head];
1127 skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
1128 if (skb->len < ETH_ZLEN) {
1129 for (i=skb->len; i<ETH_ZLEN; i++) {
1130 ((char *)pDB->vaddr)[i] = 0;
1131 }
1132 ptxd->len = ETH_ZLEN;
1133 }
1134 else
1135 ptxd->len = skb->len;
1136
1137 ps->tx_packets++;
1138 ps->tx_bytes += ptxd->len;
1139
1140 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
1141 au_sync();
1142 dev_kfree_skb(skb);
1143 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
1144 dev->trans_start = jiffies;
1145 return 0;
1146 }
1147
1148 static inline void update_rx_stats(struct net_device *dev, u32 status)
1149 {
1150 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1151 struct net_device_stats *ps = &aup->stats;
1152
1153 ps->rx_packets++;
1154 if (status & RX_MCAST_FRAME)
1155 ps->multicast++;
1156
1157 if (status & RX_ERROR) {
1158 ps->rx_errors++;
1159 if (status & RX_MISSED_FRAME)
1160 ps->rx_missed_errors++;
1161 if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
1162 ps->rx_length_errors++;
1163 if (status & RX_CRC_ERROR)
1164 ps->rx_crc_errors++;
1165 if (status & RX_COLL)
1166 ps->collisions++;
1167 }
1168 else
1169 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
1170
1171 }
1172
1173 /*
1174 * Au1000 receive routine.
1175 */
1176 static int au1000_rx(struct net_device *dev)
1177 {
1178 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1179 struct sk_buff *skb;
1180 volatile rx_dma_t *prxd;
1181 u32 buff_stat, status;
1182 db_dest_t *pDB;
1183 u32 frmlen;
1184
1185 if (au1000_debug > 5)
1186 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
1187
1188 prxd = aup->rx_dma_ring[aup->rx_head];
1189 buff_stat = prxd->buff_stat;
1190 while (buff_stat & RX_T_DONE) {
1191 status = prxd->status;
1192 pDB = aup->rx_db_inuse[aup->rx_head];
1193 update_rx_stats(dev, status);
1194 if (!(status & RX_ERROR)) {
1195
1196 /* good frame */
1197 frmlen = (status & RX_FRAME_LEN_MASK);
1198 frmlen -= 4; /* Remove FCS */
1199 skb = dev_alloc_skb(frmlen + 2);
1200 if (skb == NULL) {
1201 printk(KERN_ERR
1202 "%s: Memory squeeze, dropping packet.\n",
1203 dev->name);
1204 aup->stats.rx_dropped++;
1205 continue;
1206 }
1207 skb_reserve(skb, 2); /* 16 byte IP header align */
1208 skb_copy_to_linear_data(skb,
1209 (unsigned char *)pDB->vaddr, frmlen);
1210 skb_put(skb, frmlen);
1211 skb->protocol = eth_type_trans(skb, dev);
1212 netif_rx(skb); /* pass the packet to upper layers */
1213 }
1214 else {
1215 if (au1000_debug > 4) {
1216 if (status & RX_MISSED_FRAME)
1217 printk("rx miss\n");
1218 if (status & RX_WDOG_TIMER)
1219 printk("rx wdog\n");
1220 if (status & RX_RUNT)
1221 printk("rx runt\n");
1222 if (status & RX_OVERLEN)
1223 printk("rx overlen\n");
1224 if (status & RX_COLL)
1225 printk("rx coll\n");
1226 if (status & RX_MII_ERROR)
1227 printk("rx mii error\n");
1228 if (status & RX_CRC_ERROR)
1229 printk("rx crc error\n");
1230 if (status & RX_LEN_ERROR)
1231 printk("rx len error\n");
1232 if (status & RX_U_CNTRL_FRAME)
1233 printk("rx u control frame\n");
1234 if (status & RX_MISSED_FRAME)
1235 printk("rx miss\n");
1236 }
1237 }
1238 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
1239 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
1240 au_sync();
1241
1242 /* next descriptor */
1243 prxd = aup->rx_dma_ring[aup->rx_head];
1244 buff_stat = prxd->buff_stat;
1245 dev->last_rx = jiffies;
1246 }
1247 return 0;
1248 }
1249
1250
1251 /*
1252 * Au1000 interrupt service routine.
1253 */
1254 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
1255 {
1256 struct net_device *dev = (struct net_device *) dev_id;
1257
1258 if (dev == NULL) {
1259 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
1260 return IRQ_RETVAL(1);
1261 }
1262
1263 /* Handle RX interrupts first to minimize chance of overrun */
1264
1265 au1000_rx(dev);
1266 au1000_tx_ack(dev);
1267 return IRQ_RETVAL(1);
1268 }
1269
1270
1271 /*
1272 * The Tx ring has been full longer than the watchdog timeout
1273 * value. The transmitter must be hung?
1274 */
1275 static void au1000_tx_timeout(struct net_device *dev)
1276 {
1277 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
1278 reset_mac(dev);
1279 au1000_init(dev);
1280 dev->trans_start = jiffies;
1281 netif_wake_queue(dev);
1282 }
1283
1284 static void set_rx_mode(struct net_device *dev)
1285 {
1286 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1287
1288 if (au1000_debug > 4)
1289 printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
1290
1291 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1292 aup->mac->control |= MAC_PROMISCUOUS;
1293 } else if ((dev->flags & IFF_ALLMULTI) ||
1294 dev->mc_count > MULTICAST_FILTER_LIMIT) {
1295 aup->mac->control |= MAC_PASS_ALL_MULTI;
1296 aup->mac->control &= ~MAC_PROMISCUOUS;
1297 printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
1298 } else {
1299 int i;
1300 struct dev_mc_list *mclist;
1301 u32 mc_filter[2]; /* Multicast hash filter */
1302
1303 mc_filter[1] = mc_filter[0] = 0;
1304 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1305 i++, mclist = mclist->next) {
1306 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
1307 (long *)mc_filter);
1308 }
1309 aup->mac->multi_hash_high = mc_filter[1];
1310 aup->mac->multi_hash_low = mc_filter[0];
1311 aup->mac->control &= ~MAC_PROMISCUOUS;
1312 aup->mac->control |= MAC_HASH_MODE;
1313 }
1314 }
1315
1316 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1317 {
1318 struct au1000_private *aup = (struct au1000_private *)dev->priv;
1319
1320 if (!netif_running(dev)) return -EINVAL;
1321
1322 if (!aup->phy_dev) return -EINVAL; // PHY not controllable
1323
1324 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
1325 }
1326
1327 static struct net_device_stats *au1000_get_stats(struct net_device *dev)
1328 {
1329 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1330
1331 if (au1000_debug > 4)
1332 printk("%s: au1000_get_stats: dev=%p\n", dev->name, dev);
1333
1334 if (netif_device_present(dev)) {
1335 return &aup->stats;
1336 }
1337 return 0;
1338 }
1339
1340 module_init(au1000_init_module);
1341 module_exit(au1000_cleanup_module);
WRT350N Kernel Patches