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Blackfin serial driver: pending a unique anomaly id, tie the break flood issue to...
[wrt350n-kernel.git] / drivers / net / tc35815.c
blobec41469eee82d569391780c5263d1e4e9584369b
1 /*
2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
3 *
4 * Based on skelton.c by Donald Becker.
5 *
6 * This driver is a replacement of older and less maintained version.
7 * This is a header of the older version:
8 * -----<snip>-----
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: MontaVista Software, Inc.
11 * ahennessy@mvista.com
12 * Copyright (C) 2000-2001 Toshiba Corporation
13 * static const char *version =
14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
15 * -----<snip>-----
16 *
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
19 * for more details.
20 *
21 * (C) Copyright TOSHIBA CORPORATION 2004-2005
22 * All Rights Reserved.
23 */
24
25 #ifdef TC35815_NAPI
26 #define DRV_VERSION "1.36-NAPI"
27 #else
28 #define DRV_VERSION "1.36"
29 #endif
30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31 #define MODNAME "tc35815"
32
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/fcntl.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/in.h>
40 #include <linux/slab.h>
41 #include <linux/string.h>
42 #include <linux/spinlock.h>
43 #include <linux/errno.h>
44 #include <linux/init.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/delay.h>
49 #include <linux/pci.h>
50 #include <linux/mii.h>
51 #include <linux/ethtool.h>
52 #include <linux/platform_device.h>
53 #include <asm/io.h>
54 #include <asm/byteorder.h>
55
56 /* First, a few definitions that the brave might change. */
57
58 #define GATHER_TXINT /* On-Demand Tx Interrupt */
59 #define WORKAROUND_LOSTCAR
60 #define WORKAROUND_100HALF_PROMISC
61 /* #define TC35815_USE_PACKEDBUFFER */
62
63 typedef enum {
64 TC35815CF = 0,
65 TC35815_NWU,
66 TC35815_TX4939,
67 } board_t;
68
69 /* indexed by board_t, above */
70 static const struct {
71 const char *name;
72 } board_info[] __devinitdata = {
73 { "TOSHIBA TC35815CF 10/100BaseTX" },
74 { "TOSHIBA TC35815 with Wake on LAN" },
75 { "TOSHIBA TC35815/TX4939" },
76 };
77
78 static const struct pci_device_id tc35815_pci_tbl[] = {
79 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
80 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
81 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
82 {0,}
83 };
84 MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
85
86 /* see MODULE_PARM_DESC */
87 static struct tc35815_options {
88 int speed;
89 int duplex;
90 int doforce;
91 } options;
92
93 /*
94 * Registers
95 */
96 struct tc35815_regs {
97 volatile __u32 DMA_Ctl; /* 0x00 */
98 volatile __u32 TxFrmPtr;
99 volatile __u32 TxThrsh;
100 volatile __u32 TxPollCtr;
101 volatile __u32 BLFrmPtr;
102 volatile __u32 RxFragSize;
103 volatile __u32 Int_En;
104 volatile __u32 FDA_Bas;
105 volatile __u32 FDA_Lim; /* 0x20 */
106 volatile __u32 Int_Src;
107 volatile __u32 unused0[2];
108 volatile __u32 PauseCnt;
109 volatile __u32 RemPauCnt;
110 volatile __u32 TxCtlFrmStat;
111 volatile __u32 unused1;
112 volatile __u32 MAC_Ctl; /* 0x40 */
113 volatile __u32 CAM_Ctl;
114 volatile __u32 Tx_Ctl;
115 volatile __u32 Tx_Stat;
116 volatile __u32 Rx_Ctl;
117 volatile __u32 Rx_Stat;
118 volatile __u32 MD_Data;
119 volatile __u32 MD_CA;
120 volatile __u32 CAM_Adr; /* 0x60 */
121 volatile __u32 CAM_Data;
122 volatile __u32 CAM_Ena;
123 volatile __u32 PROM_Ctl;
124 volatile __u32 PROM_Data;
125 volatile __u32 Algn_Cnt;
126 volatile __u32 CRC_Cnt;
127 volatile __u32 Miss_Cnt;
128 };
129
130 /*
131 * Bit assignments
132 */
133 /* DMA_Ctl bit asign ------------------------------------------------------- */
134 #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
135 #define DMA_RxAlign_1 0x00400000
136 #define DMA_RxAlign_2 0x00800000
137 #define DMA_RxAlign_3 0x00c00000
138 #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
139 #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
140 #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
141 #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
142 #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
143 #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
144 #define DMA_TestMode 0x00002000 /* 1:Test Mode */
145 #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
146 #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
147
148 /* RxFragSize bit asign ---------------------------------------------------- */
149 #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
150 #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
151
152 /* MAC_Ctl bit asign ------------------------------------------------------- */
153 #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
154 #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
155 #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
156 #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
157 #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
158 #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
159 #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
160 #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
161 #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
162 #define MAC_Reset 0x00000004 /* 1:Software Reset */
163 #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
164 #define MAC_HaltReq 0x00000001 /* 1:Halt request */
165
166 /* PROM_Ctl bit asign ------------------------------------------------------ */
167 #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
168 #define PROM_Read 0x00004000 /*10:Read operation */
169 #define PROM_Write 0x00002000 /*01:Write operation */
170 #define PROM_Erase 0x00006000 /*11:Erase operation */
171 /*00:Enable or Disable Writting, */
172 /* as specified in PROM_Addr. */
173 #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
174 /*00xxxx: disable */
175
176 /* CAM_Ctl bit asign ------------------------------------------------------- */
177 #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
178 #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
179 /* accept other */
180 #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
181 #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
182 #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
183
184 /* CAM_Ena bit asign ------------------------------------------------------- */
185 #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
186 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
187 #define CAM_Ena_Bit(index) (1<<(index))
188 #define CAM_ENTRY_DESTINATION 0
189 #define CAM_ENTRY_SOURCE 1
190 #define CAM_ENTRY_MACCTL 20
191
192 /* Tx_Ctl bit asign -------------------------------------------------------- */
193 #define Tx_En 0x00000001 /* 1:Transmit enable */
194 #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
195 #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
196 #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
197 #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
198 #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
199 #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
200 #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
201 #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
202 #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
203 #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
204 #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
205
206 /* Tx_Stat bit asign ------------------------------------------------------- */
207 #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
208 #define Tx_ExColl 0x00000010 /* Excessive Collision */
209 #define Tx_TXDefer 0x00000020 /* Transmit Defered */
210 #define Tx_Paused 0x00000040 /* Transmit Paused */
211 #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
212 #define Tx_Under 0x00000100 /* Underrun */
213 #define Tx_Defer 0x00000200 /* Deferral */
214 #define Tx_NCarr 0x00000400 /* No Carrier */
215 #define Tx_10Stat 0x00000800 /* 10Mbps Status */
216 #define Tx_LateColl 0x00001000 /* Late Collision */
217 #define Tx_TxPar 0x00002000 /* Tx Parity Error */
218 #define Tx_Comp 0x00004000 /* Completion */
219 #define Tx_Halted 0x00008000 /* Tx Halted */
220 #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
221
222 /* Rx_Ctl bit asign -------------------------------------------------------- */
223 #define Rx_EnGood 0x00004000 /* 1:Enable Good */
224 #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
225 #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
226 #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
227 #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
228 #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
229 #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
230 #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
231 #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
232 #define Rx_LongEn 0x00000004 /* 1:Long Enable */
233 #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
234 #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
235
236 /* Rx_Stat bit asign ------------------------------------------------------- */
237 #define Rx_Halted 0x00008000 /* Rx Halted */
238 #define Rx_Good 0x00004000 /* Rx Good */
239 #define Rx_RxPar 0x00002000 /* Rx Parity Error */
240 /* 0x00001000 not use */
241 #define Rx_LongErr 0x00000800 /* Rx Long Error */
242 #define Rx_Over 0x00000400 /* Rx Overflow */
243 #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
244 #define Rx_Align 0x00000100 /* Rx Alignment Error */
245 #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
246 #define Rx_IntRx 0x00000040 /* Rx Interrupt */
247 #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
248
249 #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
250
251 /* Int_En bit asign -------------------------------------------------------- */
252 #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
253 #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
254 #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
255 #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
256 #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
257 #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
258 #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
259 #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
260 #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
261 #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
262 #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
263 #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
264 /* Exhausted Enable */
265
266 /* Int_Src bit asign ------------------------------------------------------- */
267 #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
268 #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
269 #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
270 #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
271 #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
272 #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
273 #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
274 #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
275 #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
276 #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
277 #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
278 #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
279 #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
280 #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
281 #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
282
283 /* MD_CA bit asign --------------------------------------------------------- */
284 #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
285 #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
286 #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
287
288
289 /*
290 * Descriptors
291 */
292
293 /* Frame descripter */
294 struct FDesc {
295 volatile __u32 FDNext;
296 volatile __u32 FDSystem;
297 volatile __u32 FDStat;
298 volatile __u32 FDCtl;
299 };
300
301 /* Buffer descripter */
302 struct BDesc {
303 volatile __u32 BuffData;
304 volatile __u32 BDCtl;
305 };
306
307 #define FD_ALIGN 16
308
309 /* Frame Descripter bit asign ---------------------------------------------- */
310 #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
311 #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
312 #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
313 #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
314 #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
315 #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
316 #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
317 #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
318 #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
319 #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
320 #define FD_BDCnt_SHIFT 16
321
322 /* Buffer Descripter bit asign --------------------------------------------- */
323 #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
324 #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
325 #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
326 #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
327 #define BD_RxBDID_SHIFT 16
328 #define BD_RxBDSeqN_SHIFT 24
329
330
331 /* Some useful constants. */
332 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
333
334 #ifdef NO_CHECK_CARRIER
335 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
336 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
337 Tx_En) /* maybe 0x7b01 */
338 #else
339 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
340 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
341 Tx_En) /* maybe 0x7b01 */
342 #endif
343 #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
344 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
345 #define INT_EN_CMD (Int_NRAbtEn | \
346 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
347 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
348 Int_STargAbtEn | \
349 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
350 #define DMA_CTL_CMD DMA_BURST_SIZE
351 #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
352
353 /* Tuning parameters */
354 #define DMA_BURST_SIZE 32
355 #define TX_THRESHOLD 1024
356 #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
357 #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
358
359 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
360 #ifdef TC35815_USE_PACKEDBUFFER
361 #define FD_PAGE_NUM 2
362 #define RX_BUF_NUM 8 /* >= 2 */
363 #define RX_FD_NUM 250 /* >= 32 */
364 #define TX_FD_NUM 128
365 #define RX_BUF_SIZE PAGE_SIZE
366 #else /* TC35815_USE_PACKEDBUFFER */
367 #define FD_PAGE_NUM 4
368 #define RX_BUF_NUM 128 /* < 256 */
369 #define RX_FD_NUM 256 /* >= 32 */
370 #define TX_FD_NUM 128
371 #if RX_CTL_CMD & Rx_LongEn
372 #define RX_BUF_SIZE PAGE_SIZE
373 #elif RX_CTL_CMD & Rx_StripCRC
374 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
375 #else
376 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
377 #endif
378 #endif /* TC35815_USE_PACKEDBUFFER */
379 #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
380 #define NAPI_WEIGHT 16
381
382 struct TxFD {
383 struct FDesc fd;
384 struct BDesc bd;
385 struct BDesc unused;
386 };
387
388 struct RxFD {
389 struct FDesc fd;
390 struct BDesc bd[0]; /* variable length */
391 };
392
393 struct FrFD {
394 struct FDesc fd;
395 struct BDesc bd[RX_BUF_NUM];
396 };
397
398
399 #define tc_readl(addr) readl(addr)
400 #define tc_writel(d, addr) writel(d, addr)
401
402 #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
403
404 /* Timer state engine. */
405 enum tc35815_timer_state {
406 arbwait = 0, /* Waiting for auto negotiation to complete. */
407 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
408 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
409 asleep = 3, /* Time inactive. */
410 lcheck = 4, /* Check link status. */
411 };
412
413 /* Information that need to be kept for each board. */
414 struct tc35815_local {
415 struct pci_dev *pci_dev;
416
417 /* statistics */
418 struct net_device_stats stats;
419 struct {
420 int max_tx_qlen;
421 int tx_ints;
422 int rx_ints;
423 int tx_underrun;
424 } lstats;
425
426 /* Tx control lock. This protects the transmit buffer ring
427 * state along with the "tx full" state of the driver. This
428 * means all netif_queue flow control actions are protected
429 * by this lock as well.
430 */
431 spinlock_t lock;
432
433 int phy_addr;
434 int fullduplex;
435 unsigned short saved_lpa;
436 struct timer_list timer;
437 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
438 unsigned int timer_ticks; /* Number of clicks at each state */
439
440 /*
441 * Transmitting: Batch Mode.
442 * 1 BD in 1 TxFD.
443 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
444 * 1 circular FD for Free Buffer List.
445 * RX_BUF_NUM BD in Free Buffer FD.
446 * One Free Buffer BD has PAGE_SIZE data buffer.
447 * Or Non-Packing Mode.
448 * 1 circular FD for Free Buffer List.
449 * RX_BUF_NUM BD in Free Buffer FD.
450 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
451 */
452 void * fd_buf; /* for TxFD, RxFD, FrFD */
453 dma_addr_t fd_buf_dma;
454 struct TxFD *tfd_base;
455 unsigned int tfd_start;
456 unsigned int tfd_end;
457 struct RxFD *rfd_base;
458 struct RxFD *rfd_limit;
459 struct RxFD *rfd_cur;
460 struct FrFD *fbl_ptr;
461 #ifdef TC35815_USE_PACKEDBUFFER
462 unsigned char fbl_curid;
463 void * data_buf[RX_BUF_NUM]; /* packing */
464 dma_addr_t data_buf_dma[RX_BUF_NUM];
465 struct {
466 struct sk_buff *skb;
467 dma_addr_t skb_dma;
468 } tx_skbs[TX_FD_NUM];
469 #else
470 unsigned int fbl_count;
471 struct {
472 struct sk_buff *skb;
473 dma_addr_t skb_dma;
474 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
475 #endif
476 struct mii_if_info mii;
477 unsigned short mii_id[2];
478 u32 msg_enable;
479 board_t boardtype;
480 };
481
482 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
483 {
484 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
485 }
486 #ifdef DEBUG
487 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
488 {
489 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
490 }
491 #endif
492 #ifdef TC35815_USE_PACKEDBUFFER
493 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
494 {
495 int i;
496 for (i = 0; i < RX_BUF_NUM; i++) {
497 if (bus >= lp->data_buf_dma[i] &&
498 bus < lp->data_buf_dma[i] + PAGE_SIZE)
499 return (void *)((u8 *)lp->data_buf[i] +
500 (bus - lp->data_buf_dma[i]));
501 }
502 return NULL;
503 }
504
505 #define TC35815_DMA_SYNC_ONDEMAND
506 static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
507 {
508 #ifdef TC35815_DMA_SYNC_ONDEMAND
509 void *buf;
510 /* pci_map + pci_dma_sync will be more effective than
511 * pci_alloc_consistent on some archs. */
512 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
513 return NULL;
514 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
515 PCI_DMA_FROMDEVICE);
516 if (pci_dma_mapping_error(*dma_handle)) {
517 free_page((unsigned long)buf);
518 return NULL;
519 }
520 return buf;
521 #else
522 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
523 #endif
524 }
525
526 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
527 {
528 #ifdef TC35815_DMA_SYNC_ONDEMAND
529 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
530 free_page((unsigned long)buf);
531 #else
532 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
533 #endif
534 }
535 #else /* TC35815_USE_PACKEDBUFFER */
536 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
537 struct pci_dev *hwdev,
538 dma_addr_t *dma_handle)
539 {
540 struct sk_buff *skb;
541 skb = dev_alloc_skb(RX_BUF_SIZE);
542 if (!skb)
543 return NULL;
544 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
545 PCI_DMA_FROMDEVICE);
546 if (pci_dma_mapping_error(*dma_handle)) {
547 dev_kfree_skb_any(skb);
548 return NULL;
549 }
550 skb_reserve(skb, 2); /* make IP header 4byte aligned */
551 return skb;
552 }
553
554 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
555 {
556 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
557 PCI_DMA_FROMDEVICE);
558 dev_kfree_skb_any(skb);
559 }
560 #endif /* TC35815_USE_PACKEDBUFFER */
561
562 /* Index to functions, as function prototypes. */
563
564 static int tc35815_open(struct net_device *dev);
565 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
566 static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
567 #ifdef TC35815_NAPI
568 static int tc35815_rx(struct net_device *dev, int limit);
569 static int tc35815_poll(struct net_device *dev, int *budget);
570 #else
571 static void tc35815_rx(struct net_device *dev);
572 #endif
573 static void tc35815_txdone(struct net_device *dev);
574 static int tc35815_close(struct net_device *dev);
575 static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
576 static void tc35815_set_multicast_list(struct net_device *dev);
577 static void tc35815_tx_timeout(struct net_device *dev);
578 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
579 #ifdef CONFIG_NET_POLL_CONTROLLER
580 static void tc35815_poll_controller(struct net_device *dev);
581 #endif
582 static const struct ethtool_ops tc35815_ethtool_ops;
583
584 /* Example routines you must write ;->. */
585 static void tc35815_chip_reset(struct net_device *dev);
586 static void tc35815_chip_init(struct net_device *dev);
587 static void tc35815_find_phy(struct net_device *dev);
588 static void tc35815_phy_chip_init(struct net_device *dev);
589
590 #ifdef DEBUG
591 static void panic_queues(struct net_device *dev);
592 #endif
593
594 static void tc35815_timer(unsigned long data);
595 static void tc35815_start_auto_negotiation(struct net_device *dev,
596 struct ethtool_cmd *ep);
597 static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
598 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
599 int val);
600
601 #ifdef CONFIG_CPU_TX49XX
602 /*
603 * Find a platform_device providing a MAC address. The platform code
604 * should provide a "tc35815-mac" device with a MAC address in its
605 * platform_data.
606 */
607 static int __devinit tc35815_mac_match(struct device *dev, void *data)
608 {
609 struct platform_device *plat_dev = to_platform_device(dev);
610 struct pci_dev *pci_dev = data;
611 unsigned int id = (pci_dev->bus->number << 8) | pci_dev->devfn;
612 return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
613 }
614
615 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
616 {
617 struct tc35815_local *lp = dev->priv;
618 struct device *pd = bus_find_device(&platform_bus_type, NULL,
619 lp->pci_dev, tc35815_mac_match);
620 if (pd) {
621 if (pd->platform_data)
622 memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
623 put_device(pd);
624 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
625 }
626 return -ENODEV;
627 }
628 #else
629 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
630 {
631 return -ENODEV;
632 }
633 #endif
634
635 static int __devinit tc35815_init_dev_addr (struct net_device *dev)
636 {
637 struct tc35815_regs __iomem *tr =
638 (struct tc35815_regs __iomem *)dev->base_addr;
639 int i;
640
641 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
642 ;
643 for (i = 0; i < 6; i += 2) {
644 unsigned short data;
645 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
646 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
647 ;
648 data = tc_readl(&tr->PROM_Data);
649 dev->dev_addr[i] = data & 0xff;
650 dev->dev_addr[i+1] = data >> 8;
651 }
652 if (!is_valid_ether_addr(dev->dev_addr))
653 return tc35815_read_plat_dev_addr(dev);
654 return 0;
655 }
656
657 static int __devinit tc35815_init_one (struct pci_dev *pdev,
658 const struct pci_device_id *ent)
659 {
660 void __iomem *ioaddr = NULL;
661 struct net_device *dev;
662 struct tc35815_local *lp;
663 int rc;
664 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
665
666 static int printed_version;
667 if (!printed_version++) {
668 printk(version);
669 dev_printk(KERN_DEBUG, &pdev->dev,
670 "speed:%d duplex:%d doforce:%d\n",
671 options.speed, options.duplex, options.doforce);
672 }
673
674 if (!pdev->irq) {
675 dev_warn(&pdev->dev, "no IRQ assigned.\n");
676 return -ENODEV;
677 }
678
679 /* dev zeroed in alloc_etherdev */
680 dev = alloc_etherdev (sizeof (*lp));
681 if (dev == NULL) {
682 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
683 return -ENOMEM;
684 }
685 SET_MODULE_OWNER(dev);
686 SET_NETDEV_DEV(dev, &pdev->dev);
687 lp = dev->priv;
688
689 /* enable device (incl. PCI PM wakeup), and bus-mastering */
690 rc = pci_enable_device (pdev);
691 if (rc)
692 goto err_out;
693
694 mmio_start = pci_resource_start (pdev, 1);
695 mmio_end = pci_resource_end (pdev, 1);
696 mmio_flags = pci_resource_flags (pdev, 1);
697 mmio_len = pci_resource_len (pdev, 1);
698
699 /* set this immediately, we need to know before
700 * we talk to the chip directly */
701
702 /* make sure PCI base addr 1 is MMIO */
703 if (!(mmio_flags & IORESOURCE_MEM)) {
704 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
705 rc = -ENODEV;
706 goto err_out;
707 }
708
709 /* check for weird/broken PCI region reporting */
710 if ((mmio_len < sizeof(struct tc35815_regs))) {
711 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
712 rc = -ENODEV;
713 goto err_out;
714 }
715
716 rc = pci_request_regions (pdev, MODNAME);
717 if (rc)
718 goto err_out;
719
720 pci_set_master (pdev);
721
722 /* ioremap MMIO region */
723 ioaddr = ioremap (mmio_start, mmio_len);
724 if (ioaddr == NULL) {
725 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
726 rc = -EIO;
727 goto err_out_free_res;
728 }
729
730 /* Initialize the device structure. */
731 dev->open = tc35815_open;
732 dev->hard_start_xmit = tc35815_send_packet;
733 dev->stop = tc35815_close;
734 dev->get_stats = tc35815_get_stats;
735 dev->set_multicast_list = tc35815_set_multicast_list;
736 dev->do_ioctl = tc35815_ioctl;
737 dev->ethtool_ops = &tc35815_ethtool_ops;
738 dev->tx_timeout = tc35815_tx_timeout;
739 dev->watchdog_timeo = TC35815_TX_TIMEOUT;
740 #ifdef TC35815_NAPI
741 dev->poll = tc35815_poll;
742 dev->weight = NAPI_WEIGHT;
743 #endif
744 #ifdef CONFIG_NET_POLL_CONTROLLER
745 dev->poll_controller = tc35815_poll_controller;
746 #endif
747
748 dev->irq = pdev->irq;
749 dev->base_addr = (unsigned long) ioaddr;
750
751 /* dev->priv/lp zeroed and aligned in alloc_etherdev */
752 lp = dev->priv;
753 spin_lock_init(&lp->lock);
754 lp->pci_dev = pdev;
755 lp->boardtype = ent->driver_data;
756
757 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
758 pci_set_drvdata(pdev, dev);
759
760 /* Soft reset the chip. */
761 tc35815_chip_reset(dev);
762
763 /* Retrieve the ethernet address. */
764 if (tc35815_init_dev_addr(dev)) {
765 dev_warn(&pdev->dev, "not valid ether addr\n");
766 random_ether_addr(dev->dev_addr);
767 }
768
769 rc = register_netdev (dev);
770 if (rc)
771 goto err_out_unmap;
772
773 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
774 printk(KERN_INFO "%s: %s at 0x%lx, "
775 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
776 "IRQ %d\n",
777 dev->name,
778 board_info[ent->driver_data].name,
779 dev->base_addr,
780 dev->dev_addr[0], dev->dev_addr[1],
781 dev->dev_addr[2], dev->dev_addr[3],
782 dev->dev_addr[4], dev->dev_addr[5],
783 dev->irq);
784
785 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
786 lp->mii.dev = dev;
787 lp->mii.mdio_read = tc_mdio_read;
788 lp->mii.mdio_write = tc_mdio_write;
789 lp->mii.phy_id_mask = 0x1f;
790 lp->mii.reg_num_mask = 0x1f;
791 tc35815_find_phy(dev);
792 lp->mii.phy_id = lp->phy_addr;
793 lp->mii.full_duplex = 0;
794 lp->mii.force_media = 0;
795
796 return 0;
797
798 err_out_unmap:
799 iounmap(ioaddr);
800 err_out_free_res:
801 pci_release_regions (pdev);
802 err_out:
803 free_netdev (dev);
804 return rc;
805 }
806
807
808 static void __devexit tc35815_remove_one (struct pci_dev *pdev)
809 {
810 struct net_device *dev = pci_get_drvdata (pdev);
811 unsigned long mmio_addr;
812
813 mmio_addr = dev->base_addr;
814
815 unregister_netdev (dev);
816
817 if (mmio_addr) {
818 iounmap ((void __iomem *)mmio_addr);
819 pci_release_regions (pdev);
820 }
821
822 free_netdev (dev);
823
824 pci_set_drvdata (pdev, NULL);
825 }
826
827 static int
828 tc35815_init_queues(struct net_device *dev)
829 {
830 struct tc35815_local *lp = dev->priv;
831 int i;
832 unsigned long fd_addr;
833
834 if (!lp->fd_buf) {
835 BUG_ON(sizeof(struct FDesc) +
836 sizeof(struct BDesc) * RX_BUF_NUM +
837 sizeof(struct FDesc) * RX_FD_NUM +
838 sizeof(struct TxFD) * TX_FD_NUM >
839 PAGE_SIZE * FD_PAGE_NUM);
840
841 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
842 return -ENOMEM;
843 for (i = 0; i < RX_BUF_NUM; i++) {
844 #ifdef TC35815_USE_PACKEDBUFFER
845 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
846 while (--i >= 0) {
847 free_rxbuf_page(lp->pci_dev,
848 lp->data_buf[i],
849 lp->data_buf_dma[i]);
850 lp->data_buf[i] = NULL;
851 }
852 pci_free_consistent(lp->pci_dev,
853 PAGE_SIZE * FD_PAGE_NUM,
854 lp->fd_buf,
855 lp->fd_buf_dma);
856 lp->fd_buf = NULL;
857 return -ENOMEM;
858 }
859 #else
860 lp->rx_skbs[i].skb =
861 alloc_rxbuf_skb(dev, lp->pci_dev,
862 &lp->rx_skbs[i].skb_dma);
863 if (!lp->rx_skbs[i].skb) {
864 while (--i >= 0) {
865 free_rxbuf_skb(lp->pci_dev,
866 lp->rx_skbs[i].skb,
867 lp->rx_skbs[i].skb_dma);
868 lp->rx_skbs[i].skb = NULL;
869 }
870 pci_free_consistent(lp->pci_dev,
871 PAGE_SIZE * FD_PAGE_NUM,
872 lp->fd_buf,
873 lp->fd_buf_dma);
874 lp->fd_buf = NULL;
875 return -ENOMEM;
876 }
877 #endif
878 }
879 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
880 dev->name, lp->fd_buf);
881 #ifdef TC35815_USE_PACKEDBUFFER
882 printk(" DataBuf");
883 for (i = 0; i < RX_BUF_NUM; i++)
884 printk(" %p", lp->data_buf[i]);
885 #endif
886 printk("\n");
887 } else {
888 for (i = 0; i < FD_PAGE_NUM; i++) {
889 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
890 }
891 }
892 fd_addr = (unsigned long)lp->fd_buf;
893
894 /* Free Descriptors (for Receive) */
895 lp->rfd_base = (struct RxFD *)fd_addr;
896 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
897 for (i = 0; i < RX_FD_NUM; i++) {
898 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
899 }
900 lp->rfd_cur = lp->rfd_base;
901 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
902
903 /* Transmit Descriptors */
904 lp->tfd_base = (struct TxFD *)fd_addr;
905 fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
906 for (i = 0; i < TX_FD_NUM; i++) {
907 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
908 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
909 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
910 }
911 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
912 lp->tfd_start = 0;
913 lp->tfd_end = 0;
914
915 /* Buffer List (for Receive) */
916 lp->fbl_ptr = (struct FrFD *)fd_addr;
917 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
918 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
919 #ifndef TC35815_USE_PACKEDBUFFER
920 /*
921 * move all allocated skbs to head of rx_skbs[] array.
922 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
923 * tc35815_rx() had failed.
924 */
925 lp->fbl_count = 0;
926 for (i = 0; i < RX_BUF_NUM; i++) {
927 if (lp->rx_skbs[i].skb) {
928 if (i != lp->fbl_count) {
929 lp->rx_skbs[lp->fbl_count].skb =
930 lp->rx_skbs[i].skb;
931 lp->rx_skbs[lp->fbl_count].skb_dma =
932 lp->rx_skbs[i].skb_dma;
933 }
934 lp->fbl_count++;
935 }
936 }
937 #endif
938 for (i = 0; i < RX_BUF_NUM; i++) {
939 #ifdef TC35815_USE_PACKEDBUFFER
940 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
941 #else
942 if (i >= lp->fbl_count) {
943 lp->fbl_ptr->bd[i].BuffData = 0;
944 lp->fbl_ptr->bd[i].BDCtl = 0;
945 continue;
946 }
947 lp->fbl_ptr->bd[i].BuffData =
948 cpu_to_le32(lp->rx_skbs[i].skb_dma);
949 #endif
950 /* BDID is index of FrFD.bd[] */
951 lp->fbl_ptr->bd[i].BDCtl =
952 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
953 RX_BUF_SIZE);
954 }
955 #ifdef TC35815_USE_PACKEDBUFFER
956 lp->fbl_curid = 0;
957 #endif
958
959 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
960 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
961 return 0;
962 }
963
964 static void
965 tc35815_clear_queues(struct net_device *dev)
966 {
967 struct tc35815_local *lp = dev->priv;
968 int i;
969
970 for (i = 0; i < TX_FD_NUM; i++) {
971 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
972 struct sk_buff *skb =
973 fdsystem != 0xffffffff ?
974 lp->tx_skbs[fdsystem].skb : NULL;
975 #ifdef DEBUG
976 if (lp->tx_skbs[i].skb != skb) {
977 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
978 panic_queues(dev);
979 }
980 #else
981 BUG_ON(lp->tx_skbs[i].skb != skb);
982 #endif
983 if (skb) {
984 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
985 lp->tx_skbs[i].skb = NULL;
986 lp->tx_skbs[i].skb_dma = 0;
987 dev_kfree_skb_any(skb);
988 }
989 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
990 }
991
992 tc35815_init_queues(dev);
993 }
994
995 static void
996 tc35815_free_queues(struct net_device *dev)
997 {
998 struct tc35815_local *lp = dev->priv;
999 int i;
1000
1001 if (lp->tfd_base) {
1002 for (i = 0; i < TX_FD_NUM; i++) {
1003 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1004 struct sk_buff *skb =
1005 fdsystem != 0xffffffff ?
1006 lp->tx_skbs[fdsystem].skb : NULL;
1007 #ifdef DEBUG
1008 if (lp->tx_skbs[i].skb != skb) {
1009 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1010 panic_queues(dev);
1011 }
1012 #else
1013 BUG_ON(lp->tx_skbs[i].skb != skb);
1014 #endif
1015 if (skb) {
1016 dev_kfree_skb(skb);
1017 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1018 lp->tx_skbs[i].skb = NULL;
1019 lp->tx_skbs[i].skb_dma = 0;
1020 }
1021 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1022 }
1023 }
1024
1025 lp->rfd_base = NULL;
1026 lp->rfd_limit = NULL;
1027 lp->rfd_cur = NULL;
1028 lp->fbl_ptr = NULL;
1029
1030 for (i = 0; i < RX_BUF_NUM; i++) {
1031 #ifdef TC35815_USE_PACKEDBUFFER
1032 if (lp->data_buf[i]) {
1033 free_rxbuf_page(lp->pci_dev,
1034 lp->data_buf[i], lp->data_buf_dma[i]);
1035 lp->data_buf[i] = NULL;
1036 }
1037 #else
1038 if (lp->rx_skbs[i].skb) {
1039 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1040 lp->rx_skbs[i].skb_dma);
1041 lp->rx_skbs[i].skb = NULL;
1042 }
1043 #endif
1044 }
1045 if (lp->fd_buf) {
1046 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1047 lp->fd_buf, lp->fd_buf_dma);
1048 lp->fd_buf = NULL;
1049 }
1050 }
1051
1052 static void
1053 dump_txfd(struct TxFD *fd)
1054 {
1055 printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1056 le32_to_cpu(fd->fd.FDNext),
1057 le32_to_cpu(fd->fd.FDSystem),
1058 le32_to_cpu(fd->fd.FDStat),
1059 le32_to_cpu(fd->fd.FDCtl));
1060 printk("BD: ");
1061 printk(" %08x %08x",
1062 le32_to_cpu(fd->bd.BuffData),
1063 le32_to_cpu(fd->bd.BDCtl));
1064 printk("\n");
1065 }
1066
1067 static int
1068 dump_rxfd(struct RxFD *fd)
1069 {
1070 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1071 if (bd_count > 8)
1072 bd_count = 8;
1073 printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1074 le32_to_cpu(fd->fd.FDNext),
1075 le32_to_cpu(fd->fd.FDSystem),
1076 le32_to_cpu(fd->fd.FDStat),
1077 le32_to_cpu(fd->fd.FDCtl));
1078 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1079 return 0;
1080 printk("BD: ");
1081 for (i = 0; i < bd_count; i++)
1082 printk(" %08x %08x",
1083 le32_to_cpu(fd->bd[i].BuffData),
1084 le32_to_cpu(fd->bd[i].BDCtl));
1085 printk("\n");
1086 return bd_count;
1087 }
1088
1089 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1090 static void
1091 dump_frfd(struct FrFD *fd)
1092 {
1093 int i;
1094 printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1095 le32_to_cpu(fd->fd.FDNext),
1096 le32_to_cpu(fd->fd.FDSystem),
1097 le32_to_cpu(fd->fd.FDStat),
1098 le32_to_cpu(fd->fd.FDCtl));
1099 printk("BD: ");
1100 for (i = 0; i < RX_BUF_NUM; i++)
1101 printk(" %08x %08x",
1102 le32_to_cpu(fd->bd[i].BuffData),
1103 le32_to_cpu(fd->bd[i].BDCtl));
1104 printk("\n");
1105 }
1106 #endif
1107
1108 #ifdef DEBUG
1109 static void
1110 panic_queues(struct net_device *dev)
1111 {
1112 struct tc35815_local *lp = dev->priv;
1113 int i;
1114
1115 printk("TxFD base %p, start %u, end %u\n",
1116 lp->tfd_base, lp->tfd_start, lp->tfd_end);
1117 printk("RxFD base %p limit %p cur %p\n",
1118 lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1119 printk("FrFD %p\n", lp->fbl_ptr);
1120 for (i = 0; i < TX_FD_NUM; i++)
1121 dump_txfd(&lp->tfd_base[i]);
1122 for (i = 0; i < RX_FD_NUM; i++) {
1123 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1124 i += (bd_count + 1) / 2; /* skip BDs */
1125 }
1126 dump_frfd(lp->fbl_ptr);
1127 panic("%s: Illegal queue state.", dev->name);
1128 }
1129 #endif
1130
1131 static void print_eth(char *add)
1132 {
1133 int i;
1134
1135 printk("print_eth(%p)\n", add);
1136 for (i = 0; i < 6; i++)
1137 printk(" %2.2X", (unsigned char) add[i + 6]);
1138 printk(" =>");
1139 for (i = 0; i < 6; i++)
1140 printk(" %2.2X", (unsigned char) add[i]);
1141 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
1142 }
1143
1144 static int tc35815_tx_full(struct net_device *dev)
1145 {
1146 struct tc35815_local *lp = dev->priv;
1147 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1148 }
1149
1150 static void tc35815_restart(struct net_device *dev)
1151 {
1152 struct tc35815_local *lp = dev->priv;
1153 int pid = lp->phy_addr;
1154 int do_phy_reset = 1;
1155 del_timer(&lp->timer); /* Kill if running */
1156
1157 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1158 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1159 do_phy_reset = 0;
1160 }
1161 if (do_phy_reset) {
1162 int timeout;
1163 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
1164 timeout = 100;
1165 while (--timeout) {
1166 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
1167 break;
1168 udelay(1);
1169 }
1170 if (!timeout)
1171 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1172 }
1173
1174 tc35815_chip_reset(dev);
1175 tc35815_clear_queues(dev);
1176 tc35815_chip_init(dev);
1177 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1178 tc35815_set_multicast_list(dev);
1179 }
1180
1181 static void tc35815_tx_timeout(struct net_device *dev)
1182 {
1183 struct tc35815_local *lp = dev->priv;
1184 struct tc35815_regs __iomem *tr =
1185 (struct tc35815_regs __iomem *)dev->base_addr;
1186
1187 printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1188 dev->name, tc_readl(&tr->Tx_Stat));
1189
1190 /* Try to restart the adaptor. */
1191 spin_lock_irq(&lp->lock);
1192 tc35815_restart(dev);
1193 spin_unlock_irq(&lp->lock);
1194
1195 lp->stats.tx_errors++;
1196
1197 /* If we have space available to accept new transmit
1198 * requests, wake up the queueing layer. This would
1199 * be the case if the chipset_init() call above just
1200 * flushes out the tx queue and empties it.
1201 *
1202 * If instead, the tx queue is retained then the
1203 * netif_wake_queue() call should be placed in the
1204 * TX completion interrupt handler of the driver instead
1205 * of here.
1206 */
1207 if (!tc35815_tx_full(dev))
1208 netif_wake_queue(dev);
1209 }
1210
1211 /*
1212 * Open/initialize the board. This is called (in the current kernel)
1213 * sometime after booting when the 'ifconfig' program is run.
1214 *
1215 * This routine should set everything up anew at each open, even
1216 * registers that "should" only need to be set once at boot, so that
1217 * there is non-reboot way to recover if something goes wrong.
1218 */
1219 static int
1220 tc35815_open(struct net_device *dev)
1221 {
1222 struct tc35815_local *lp = dev->priv;
1223
1224 /*
1225 * This is used if the interrupt line can turned off (shared).
1226 * See 3c503.c for an example of selecting the IRQ at config-time.
1227 */
1228 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1229 return -EAGAIN;
1230 }
1231
1232 del_timer(&lp->timer); /* Kill if running */
1233 tc35815_chip_reset(dev);
1234
1235 if (tc35815_init_queues(dev) != 0) {
1236 free_irq(dev->irq, dev);
1237 return -EAGAIN;
1238 }
1239
1240 /* Reset the hardware here. Don't forget to set the station address. */
1241 spin_lock_irq(&lp->lock);
1242 tc35815_chip_init(dev);
1243 spin_unlock_irq(&lp->lock);
1244
1245 /* We are now ready to accept transmit requeusts from
1246 * the queueing layer of the networking.
1247 */
1248 netif_start_queue(dev);
1249
1250 return 0;
1251 }
1252
1253 /* This will only be invoked if your driver is _not_ in XOFF state.
1254 * What this means is that you need not check it, and that this
1255 * invariant will hold if you make sure that the netif_*_queue()
1256 * calls are done at the proper times.
1257 */
1258 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1259 {
1260 struct tc35815_local *lp = dev->priv;
1261 struct TxFD *txfd;
1262 unsigned long flags;
1263
1264 /* If some error occurs while trying to transmit this
1265 * packet, you should return '1' from this function.
1266 * In such a case you _may not_ do anything to the
1267 * SKB, it is still owned by the network queueing
1268 * layer when an error is returned. This means you
1269 * may not modify any SKB fields, you may not free
1270 * the SKB, etc.
1271 */
1272
1273 /* This is the most common case for modern hardware.
1274 * The spinlock protects this code from the TX complete
1275 * hardware interrupt handler. Queue flow control is
1276 * thus managed under this lock as well.
1277 */
1278 spin_lock_irqsave(&lp->lock, flags);
1279
1280 /* failsafe... (handle txdone now if half of FDs are used) */
1281 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1282 TX_FD_NUM / 2)
1283 tc35815_txdone(dev);
1284
1285 if (netif_msg_pktdata(lp))
1286 print_eth(skb->data);
1287 #ifdef DEBUG
1288 if (lp->tx_skbs[lp->tfd_start].skb) {
1289 printk("%s: tx_skbs conflict.\n", dev->name);
1290 panic_queues(dev);
1291 }
1292 #else
1293 BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1294 #endif
1295 lp->tx_skbs[lp->tfd_start].skb = skb;
1296 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1297
1298 /*add to ring */
1299 txfd = &lp->tfd_base[lp->tfd_start];
1300 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1301 txfd->bd.BDCtl = cpu_to_le32(skb->len);
1302 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1303 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1304
1305 if (lp->tfd_start == lp->tfd_end) {
1306 struct tc35815_regs __iomem *tr =
1307 (struct tc35815_regs __iomem *)dev->base_addr;
1308 /* Start DMA Transmitter. */
1309 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1310 #ifdef GATHER_TXINT
1311 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1312 #endif
1313 if (netif_msg_tx_queued(lp)) {
1314 printk("%s: starting TxFD.\n", dev->name);
1315 dump_txfd(txfd);
1316 }
1317 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1318 } else {
1319 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1320 if (netif_msg_tx_queued(lp)) {
1321 printk("%s: queueing TxFD.\n", dev->name);
1322 dump_txfd(txfd);
1323 }
1324 }
1325 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1326
1327 dev->trans_start = jiffies;
1328
1329 /* If we just used up the very last entry in the
1330 * TX ring on this device, tell the queueing
1331 * layer to send no more.
1332 */
1333 if (tc35815_tx_full(dev)) {
1334 if (netif_msg_tx_queued(lp))
1335 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1336 netif_stop_queue(dev);
1337 }
1338
1339 /* When the TX completion hw interrupt arrives, this
1340 * is when the transmit statistics are updated.
1341 */
1342
1343 spin_unlock_irqrestore(&lp->lock, flags);
1344 return 0;
1345 }
1346
1347 #define FATAL_ERROR_INT \
1348 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1349 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1350 {
1351 static int count;
1352 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1353 dev->name, status);
1354 if (status & Int_IntPCI)
1355 printk(" IntPCI");
1356 if (status & Int_DmParErr)
1357 printk(" DmParErr");
1358 if (status & Int_IntNRAbt)
1359 printk(" IntNRAbt");
1360 printk("\n");
1361 if (count++ > 100)
1362 panic("%s: Too many fatal errors.", dev->name);
1363 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1364 /* Try to restart the adaptor. */
1365 tc35815_restart(dev);
1366 }
1367
1368 #ifdef TC35815_NAPI
1369 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1370 #else
1371 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1372 #endif
1373 {
1374 struct tc35815_local *lp = dev->priv;
1375 struct tc35815_regs __iomem *tr =
1376 (struct tc35815_regs __iomem *)dev->base_addr;
1377 int ret = -1;
1378
1379 /* Fatal errors... */
1380 if (status & FATAL_ERROR_INT) {
1381 tc35815_fatal_error_interrupt(dev, status);
1382 return 0;
1383 }
1384 /* recoverable errors */
1385 if (status & Int_IntFDAEx) {
1386 /* disable FDAEx int. (until we make rooms...) */
1387 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1388 printk(KERN_WARNING
1389 "%s: Free Descriptor Area Exhausted (%#x).\n",
1390 dev->name, status);
1391 lp->stats.rx_dropped++;
1392 ret = 0;
1393 }
1394 if (status & Int_IntBLEx) {
1395 /* disable BLEx int. (until we make rooms...) */
1396 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1397 printk(KERN_WARNING
1398 "%s: Buffer List Exhausted (%#x).\n",
1399 dev->name, status);
1400 lp->stats.rx_dropped++;
1401 ret = 0;
1402 }
1403 if (status & Int_IntExBD) {
1404 printk(KERN_WARNING
1405 "%s: Excessive Buffer Descriptiors (%#x).\n",
1406 dev->name, status);
1407 lp->stats.rx_length_errors++;
1408 ret = 0;
1409 }
1410
1411 /* normal notification */
1412 if (status & Int_IntMacRx) {
1413 /* Got a packet(s). */
1414 #ifdef TC35815_NAPI
1415 ret = tc35815_rx(dev, limit);
1416 #else
1417 tc35815_rx(dev);
1418 ret = 0;
1419 #endif
1420 lp->lstats.rx_ints++;
1421 }
1422 if (status & Int_IntMacTx) {
1423 /* Transmit complete. */
1424 lp->lstats.tx_ints++;
1425 tc35815_txdone(dev);
1426 netif_wake_queue(dev);
1427 ret = 0;
1428 }
1429 return ret;
1430 }
1431
1432 /*
1433 * The typical workload of the driver:
1434 * Handle the network interface interrupts.
1435 */
1436 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1437 {
1438 struct net_device *dev = dev_id;
1439 struct tc35815_regs __iomem *tr =
1440 (struct tc35815_regs __iomem *)dev->base_addr;
1441 #ifdef TC35815_NAPI
1442 u32 dmactl = tc_readl(&tr->DMA_Ctl);
1443
1444 if (!(dmactl & DMA_IntMask)) {
1445 /* disable interrupts */
1446 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1447 if (netif_rx_schedule_prep(dev))
1448 __netif_rx_schedule(dev);
1449 else {
1450 printk(KERN_ERR "%s: interrupt taken in poll\n",
1451 dev->name);
1452 BUG();
1453 }
1454 (void)tc_readl(&tr->Int_Src); /* flush */
1455 return IRQ_HANDLED;
1456 }
1457 return IRQ_NONE;
1458 #else
1459 struct tc35815_local *lp = dev->priv;
1460 int handled;
1461 u32 status;
1462
1463 spin_lock(&lp->lock);
1464 status = tc_readl(&tr->Int_Src);
1465 tc_writel(status, &tr->Int_Src); /* write to clear */
1466 handled = tc35815_do_interrupt(dev, status);
1467 (void)tc_readl(&tr->Int_Src); /* flush */
1468 spin_unlock(&lp->lock);
1469 return IRQ_RETVAL(handled >= 0);
1470 #endif /* TC35815_NAPI */
1471 }
1472
1473 #ifdef CONFIG_NET_POLL_CONTROLLER
1474 static void tc35815_poll_controller(struct net_device *dev)
1475 {
1476 disable_irq(dev->irq);
1477 tc35815_interrupt(dev->irq, dev);
1478 enable_irq(dev->irq);
1479 }
1480 #endif
1481
1482 /* We have a good packet(s), get it/them out of the buffers. */
1483 #ifdef TC35815_NAPI
1484 static int
1485 tc35815_rx(struct net_device *dev, int limit)
1486 #else
1487 static void
1488 tc35815_rx(struct net_device *dev)
1489 #endif
1490 {
1491 struct tc35815_local *lp = dev->priv;
1492 unsigned int fdctl;
1493 int i;
1494 int buf_free_count = 0;
1495 int fd_free_count = 0;
1496 #ifdef TC35815_NAPI
1497 int received = 0;
1498 #endif
1499
1500 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1501 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1502 int pkt_len = fdctl & FD_FDLength_MASK;
1503 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1504 #ifdef DEBUG
1505 struct RxFD *next_rfd;
1506 #endif
1507 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1508 pkt_len -= 4;
1509 #endif
1510
1511 if (netif_msg_rx_status(lp))
1512 dump_rxfd(lp->rfd_cur);
1513 if (status & Rx_Good) {
1514 struct sk_buff *skb;
1515 unsigned char *data;
1516 int cur_bd;
1517 #ifdef TC35815_USE_PACKEDBUFFER
1518 int offset;
1519 #endif
1520
1521 #ifdef TC35815_NAPI
1522 if (--limit < 0)
1523 break;
1524 #endif
1525 #ifdef TC35815_USE_PACKEDBUFFER
1526 BUG_ON(bd_count > 2);
1527 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1528 if (skb == NULL) {
1529 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1530 dev->name);
1531 lp->stats.rx_dropped++;
1532 break;
1533 }
1534 skb_reserve(skb, 2); /* 16 bit alignment */
1535
1536 data = skb_put(skb, pkt_len);
1537
1538 /* copy from receive buffer */
1539 cur_bd = 0;
1540 offset = 0;
1541 while (offset < pkt_len && cur_bd < bd_count) {
1542 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1543 BD_BuffLength_MASK;
1544 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1545 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1546 if (offset + len > pkt_len)
1547 len = pkt_len - offset;
1548 #ifdef TC35815_DMA_SYNC_ONDEMAND
1549 pci_dma_sync_single_for_cpu(lp->pci_dev,
1550 dma, len,
1551 PCI_DMA_FROMDEVICE);
1552 #endif
1553 memcpy(data + offset, rxbuf, len);
1554 #ifdef TC35815_DMA_SYNC_ONDEMAND
1555 pci_dma_sync_single_for_device(lp->pci_dev,
1556 dma, len,
1557 PCI_DMA_FROMDEVICE);
1558 #endif
1559 offset += len;
1560 cur_bd++;
1561 }
1562 #else /* TC35815_USE_PACKEDBUFFER */
1563 BUG_ON(bd_count > 1);
1564 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1565 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1566 #ifdef DEBUG
1567 if (cur_bd >= RX_BUF_NUM) {
1568 printk("%s: invalid BDID.\n", dev->name);
1569 panic_queues(dev);
1570 }
1571 BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1572 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1573 if (!lp->rx_skbs[cur_bd].skb) {
1574 printk("%s: NULL skb.\n", dev->name);
1575 panic_queues(dev);
1576 }
1577 #else
1578 BUG_ON(cur_bd >= RX_BUF_NUM);
1579 #endif
1580 skb = lp->rx_skbs[cur_bd].skb;
1581 prefetch(skb->data);
1582 lp->rx_skbs[cur_bd].skb = NULL;
1583 lp->fbl_count--;
1584 pci_unmap_single(lp->pci_dev,
1585 lp->rx_skbs[cur_bd].skb_dma,
1586 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1587 if (!HAVE_DMA_RXALIGN(lp))
1588 memmove(skb->data, skb->data - 2, pkt_len);
1589 data = skb_put(skb, pkt_len);
1590 #endif /* TC35815_USE_PACKEDBUFFER */
1591 if (netif_msg_pktdata(lp))
1592 print_eth(data);
1593 skb->protocol = eth_type_trans(skb, dev);
1594 #ifdef TC35815_NAPI
1595 netif_receive_skb(skb);
1596 received++;
1597 #else
1598 netif_rx(skb);
1599 #endif
1600 dev->last_rx = jiffies;
1601 lp->stats.rx_packets++;
1602 lp->stats.rx_bytes += pkt_len;
1603 } else {
1604 lp->stats.rx_errors++;
1605 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1606 dev->name, status & Rx_Stat_Mask);
1607 /* WORKAROUND: LongErr and CRCErr means Overflow. */
1608 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1609 status &= ~(Rx_LongErr|Rx_CRCErr);
1610 status |= Rx_Over;
1611 }
1612 if (status & Rx_LongErr) lp->stats.rx_length_errors++;
1613 if (status & Rx_Over) lp->stats.rx_fifo_errors++;
1614 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
1615 if (status & Rx_Align) lp->stats.rx_frame_errors++;
1616 }
1617
1618 if (bd_count > 0) {
1619 /* put Free Buffer back to controller */
1620 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1621 unsigned char id =
1622 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1623 #ifdef DEBUG
1624 if (id >= RX_BUF_NUM) {
1625 printk("%s: invalid BDID.\n", dev->name);
1626 panic_queues(dev);
1627 }
1628 #else
1629 BUG_ON(id >= RX_BUF_NUM);
1630 #endif
1631 /* free old buffers */
1632 #ifdef TC35815_USE_PACKEDBUFFER
1633 while (lp->fbl_curid != id)
1634 #else
1635 while (lp->fbl_count < RX_BUF_NUM)
1636 #endif
1637 {
1638 #ifdef TC35815_USE_PACKEDBUFFER
1639 unsigned char curid = lp->fbl_curid;
1640 #else
1641 unsigned char curid =
1642 (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1643 #endif
1644 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1645 #ifdef DEBUG
1646 bdctl = le32_to_cpu(bd->BDCtl);
1647 if (bdctl & BD_CownsBD) {
1648 printk("%s: Freeing invalid BD.\n",
1649 dev->name);
1650 panic_queues(dev);
1651 }
1652 #endif
1653 /* pass BD to controler */
1654 #ifndef TC35815_USE_PACKEDBUFFER
1655 if (!lp->rx_skbs[curid].skb) {
1656 lp->rx_skbs[curid].skb =
1657 alloc_rxbuf_skb(dev,
1658 lp->pci_dev,
1659 &lp->rx_skbs[curid].skb_dma);
1660 if (!lp->rx_skbs[curid].skb)
1661 break; /* try on next reception */
1662 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1663 }
1664 #endif /* TC35815_USE_PACKEDBUFFER */
1665 /* Note: BDLength was modified by chip. */
1666 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1667 (curid << BD_RxBDID_SHIFT) |
1668 RX_BUF_SIZE);
1669 #ifdef TC35815_USE_PACKEDBUFFER
1670 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1671 if (netif_msg_rx_status(lp)) {
1672 printk("%s: Entering new FBD %d\n",
1673 dev->name, lp->fbl_curid);
1674 dump_frfd(lp->fbl_ptr);
1675 }
1676 #else
1677 lp->fbl_count++;
1678 #endif
1679 buf_free_count++;
1680 }
1681 }
1682
1683 /* put RxFD back to controller */
1684 #ifdef DEBUG
1685 next_rfd = fd_bus_to_virt(lp,
1686 le32_to_cpu(lp->rfd_cur->fd.FDNext));
1687 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1688 printk("%s: RxFD FDNext invalid.\n", dev->name);
1689 panic_queues(dev);
1690 }
1691 #endif
1692 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1693 /* pass FD to controler */
1694 #ifdef DEBUG
1695 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1696 #else
1697 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1698 #endif
1699 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1700 lp->rfd_cur++;
1701 fd_free_count++;
1702 }
1703 if (lp->rfd_cur > lp->rfd_limit)
1704 lp->rfd_cur = lp->rfd_base;
1705 #ifdef DEBUG
1706 if (lp->rfd_cur != next_rfd)
1707 printk("rfd_cur = %p, next_rfd %p\n",
1708 lp->rfd_cur, next_rfd);
1709 #endif
1710 }
1711
1712 /* re-enable BL/FDA Exhaust interrupts. */
1713 if (fd_free_count) {
1714 struct tc35815_regs __iomem *tr =
1715 (struct tc35815_regs __iomem *)dev->base_addr;
1716 u32 en, en_old = tc_readl(&tr->Int_En);
1717 en = en_old | Int_FDAExEn;
1718 if (buf_free_count)
1719 en |= Int_BLExEn;
1720 if (en != en_old)
1721 tc_writel(en, &tr->Int_En);
1722 }
1723 #ifdef TC35815_NAPI
1724 return received;
1725 #endif
1726 }
1727
1728 #ifdef TC35815_NAPI
1729 static int
1730 tc35815_poll(struct net_device *dev, int *budget)
1731 {
1732 struct tc35815_local *lp = dev->priv;
1733 struct tc35815_regs __iomem *tr =
1734 (struct tc35815_regs __iomem *)dev->base_addr;
1735 int limit = min(*budget, dev->quota);
1736 int received = 0, handled;
1737 u32 status;
1738
1739 spin_lock(&lp->lock);
1740 status = tc_readl(&tr->Int_Src);
1741 do {
1742 tc_writel(status, &tr->Int_Src); /* write to clear */
1743
1744 handled = tc35815_do_interrupt(dev, status, limit);
1745 if (handled >= 0) {
1746 received += handled;
1747 limit -= handled;
1748 if (limit <= 0)
1749 break;
1750 }
1751 status = tc_readl(&tr->Int_Src);
1752 } while (status);
1753 spin_unlock(&lp->lock);
1754
1755 dev->quota -= received;
1756 *budget -= received;
1757 if (limit <= 0)
1758 return 1;
1759
1760 netif_rx_complete(dev);
1761 /* enable interrupts */
1762 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1763 return 0;
1764 }
1765 #endif
1766
1767 #ifdef NO_CHECK_CARRIER
1768 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1769 #else
1770 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1771 #endif
1772
1773 static void
1774 tc35815_check_tx_stat(struct net_device *dev, int status)
1775 {
1776 struct tc35815_local *lp = dev->priv;
1777 const char *msg = NULL;
1778
1779 /* count collisions */
1780 if (status & Tx_ExColl)
1781 lp->stats.collisions += 16;
1782 if (status & Tx_TxColl_MASK)
1783 lp->stats.collisions += status & Tx_TxColl_MASK;
1784
1785 #ifndef NO_CHECK_CARRIER
1786 /* TX4939 does not have NCarr */
1787 if (lp->boardtype == TC35815_TX4939)
1788 status &= ~Tx_NCarr;
1789 #ifdef WORKAROUND_LOSTCAR
1790 /* WORKAROUND: ignore LostCrS in full duplex operation */
1791 if ((lp->timer_state != asleep && lp->timer_state != lcheck)
1792 || lp->fullduplex)
1793 status &= ~Tx_NCarr;
1794 #endif
1795 #endif
1796
1797 if (!(status & TX_STA_ERR)) {
1798 /* no error. */
1799 lp->stats.tx_packets++;
1800 return;
1801 }
1802
1803 lp->stats.tx_errors++;
1804 if (status & Tx_ExColl) {
1805 lp->stats.tx_aborted_errors++;
1806 msg = "Excessive Collision.";
1807 }
1808 if (status & Tx_Under) {
1809 lp->stats.tx_fifo_errors++;
1810 msg = "Tx FIFO Underrun.";
1811 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1812 lp->lstats.tx_underrun++;
1813 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1814 struct tc35815_regs __iomem *tr =
1815 (struct tc35815_regs __iomem *)dev->base_addr;
1816 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1817 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1818 }
1819 }
1820 }
1821 if (status & Tx_Defer) {
1822 lp->stats.tx_fifo_errors++;
1823 msg = "Excessive Deferral.";
1824 }
1825 #ifndef NO_CHECK_CARRIER
1826 if (status & Tx_NCarr) {
1827 lp->stats.tx_carrier_errors++;
1828 msg = "Lost Carrier Sense.";
1829 }
1830 #endif
1831 if (status & Tx_LateColl) {
1832 lp->stats.tx_aborted_errors++;
1833 msg = "Late Collision.";
1834 }
1835 if (status & Tx_TxPar) {
1836 lp->stats.tx_fifo_errors++;
1837 msg = "Transmit Parity Error.";
1838 }
1839 if (status & Tx_SQErr) {
1840 lp->stats.tx_heartbeat_errors++;
1841 msg = "Signal Quality Error.";
1842 }
1843 if (msg && netif_msg_tx_err(lp))
1844 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1845 }
1846
1847 /* This handles TX complete events posted by the device
1848 * via interrupts.
1849 */
1850 static void
1851 tc35815_txdone(struct net_device *dev)
1852 {
1853 struct tc35815_local *lp = dev->priv;
1854 struct TxFD *txfd;
1855 unsigned int fdctl;
1856
1857 txfd = &lp->tfd_base[lp->tfd_end];
1858 while (lp->tfd_start != lp->tfd_end &&
1859 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1860 int status = le32_to_cpu(txfd->fd.FDStat);
1861 struct sk_buff *skb;
1862 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
1863 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
1864
1865 if (netif_msg_tx_done(lp)) {
1866 printk("%s: complete TxFD.\n", dev->name);
1867 dump_txfd(txfd);
1868 }
1869 tc35815_check_tx_stat(dev, status);
1870
1871 skb = fdsystem != 0xffffffff ?
1872 lp->tx_skbs[fdsystem].skb : NULL;
1873 #ifdef DEBUG
1874 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
1875 printk("%s: tx_skbs mismatch.\n", dev->name);
1876 panic_queues(dev);
1877 }
1878 #else
1879 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1880 #endif
1881 if (skb) {
1882 lp->stats.tx_bytes += skb->len;
1883 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1884 lp->tx_skbs[lp->tfd_end].skb = NULL;
1885 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
1886 #ifdef TC35815_NAPI
1887 dev_kfree_skb_any(skb);
1888 #else
1889 dev_kfree_skb_irq(skb);
1890 #endif
1891 }
1892 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
1893
1894 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1895 txfd = &lp->tfd_base[lp->tfd_end];
1896 #ifdef DEBUG
1897 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
1898 printk("%s: TxFD FDNext invalid.\n", dev->name);
1899 panic_queues(dev);
1900 }
1901 #endif
1902 if (fdnext & FD_Next_EOL) {
1903 /* DMA Transmitter has been stopping... */
1904 if (lp->tfd_end != lp->tfd_start) {
1905 struct tc35815_regs __iomem *tr =
1906 (struct tc35815_regs __iomem *)dev->base_addr;
1907 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1908 struct TxFD* txhead = &lp->tfd_base[head];
1909 int qlen = (lp->tfd_start + TX_FD_NUM
1910 - lp->tfd_end) % TX_FD_NUM;
1911
1912 #ifdef DEBUG
1913 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1914 printk("%s: TxFD FDCtl invalid.\n", dev->name);
1915 panic_queues(dev);
1916 }
1917 #endif
1918 /* log max queue length */
1919 if (lp->lstats.max_tx_qlen < qlen)
1920 lp->lstats.max_tx_qlen = qlen;
1921
1922
1923 /* start DMA Transmitter again */
1924 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1925 #ifdef GATHER_TXINT
1926 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1927 #endif
1928 if (netif_msg_tx_queued(lp)) {
1929 printk("%s: start TxFD on queue.\n",
1930 dev->name);
1931 dump_txfd(txfd);
1932 }
1933 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1934 }
1935 break;
1936 }
1937 }
1938
1939 /* If we had stopped the queue due to a "tx full"
1940 * condition, and space has now been made available,
1941 * wake up the queue.
1942 */
1943 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
1944 netif_wake_queue(dev);
1945 }
1946
1947 /* The inverse routine to tc35815_open(). */
1948 static int
1949 tc35815_close(struct net_device *dev)
1950 {
1951 struct tc35815_local *lp = dev->priv;
1952 netif_stop_queue(dev);
1953
1954 /* Flush the Tx and disable Rx here. */
1955
1956 del_timer(&lp->timer); /* Kill if running */
1957 tc35815_chip_reset(dev);
1958 free_irq(dev->irq, dev);
1959
1960 tc35815_free_queues(dev);
1961
1962 return 0;
1963
1964 }
1965
1966 /*
1967 * Get the current statistics.
1968 * This may be called with the card open or closed.
1969 */
1970 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1971 {
1972 struct tc35815_local *lp = dev->priv;
1973 struct tc35815_regs __iomem *tr =
1974 (struct tc35815_regs __iomem *)dev->base_addr;
1975 if (netif_running(dev)) {
1976 /* Update the statistics from the device registers. */
1977 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1978 }
1979
1980 return &lp->stats;
1981 }
1982
1983 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1984 {
1985 struct tc35815_local *lp = dev->priv;
1986 struct tc35815_regs __iomem *tr =
1987 (struct tc35815_regs __iomem *)dev->base_addr;
1988 int cam_index = index * 6;
1989 u32 cam_data;
1990 u32 saved_addr;
1991 saved_addr = tc_readl(&tr->CAM_Adr);
1992
1993 if (netif_msg_hw(lp)) {
1994 int i;
1995 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
1996 for (i = 0; i < 6; i++)
1997 printk(" %02x", addr[i]);
1998 printk("\n");
1999 }
2000 if (index & 1) {
2001 /* read modify write */
2002 tc_writel(cam_index - 2, &tr->CAM_Adr);
2003 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2004 cam_data |= addr[0] << 8 | addr[1];
2005 tc_writel(cam_data, &tr->CAM_Data);
2006 /* write whole word */
2007 tc_writel(cam_index + 2, &tr->CAM_Adr);
2008 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2009 tc_writel(cam_data, &tr->CAM_Data);
2010 } else {
2011 /* write whole word */
2012 tc_writel(cam_index, &tr->CAM_Adr);
2013 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2014 tc_writel(cam_data, &tr->CAM_Data);
2015 /* read modify write */
2016 tc_writel(cam_index + 4, &tr->CAM_Adr);
2017 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2018 cam_data |= addr[4] << 24 | (addr[5] << 16);
2019 tc_writel(cam_data, &tr->CAM_Data);
2020 }
2021
2022 tc_writel(saved_addr, &tr->CAM_Adr);
2023 }
2024
2025
2026 /*
2027 * Set or clear the multicast filter for this adaptor.
2028 * num_addrs == -1 Promiscuous mode, receive all packets
2029 * num_addrs == 0 Normal mode, clear multicast list
2030 * num_addrs > 0 Multicast mode, receive normal and MC packets,
2031 * and do best-effort filtering.
2032 */
2033 static void
2034 tc35815_set_multicast_list(struct net_device *dev)
2035 {
2036 struct tc35815_regs __iomem *tr =
2037 (struct tc35815_regs __iomem *)dev->base_addr;
2038
2039 if (dev->flags&IFF_PROMISC)
2040 {
2041 #ifdef WORKAROUND_100HALF_PROMISC
2042 /* With some (all?) 100MHalf HUB, controller will hang
2043 * if we enabled promiscuous mode before linkup... */
2044 struct tc35815_local *lp = dev->priv;
2045 int pid = lp->phy_addr;
2046 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
2047 return;
2048 #endif
2049 /* Enable promiscuous mode */
2050 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2051 }
2052 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2053 {
2054 /* CAM 0, 1, 20 are reserved. */
2055 /* Disable promiscuous mode, use normal mode. */
2056 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2057 }
2058 else if(dev->mc_count)
2059 {
2060 struct dev_mc_list* cur_addr = dev->mc_list;
2061 int i;
2062 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2063
2064 tc_writel(0, &tr->CAM_Ctl);
2065 /* Walk the address list, and load the filter */
2066 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2067 if (!cur_addr)
2068 break;
2069 /* entry 0,1 is reserved. */
2070 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2071 ena_bits |= CAM_Ena_Bit(i + 2);
2072 }
2073 tc_writel(ena_bits, &tr->CAM_Ena);
2074 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2075 }
2076 else {
2077 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2078 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2079 }
2080 }
2081
2082 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2083 {
2084 struct tc35815_local *lp = dev->priv;
2085 strcpy(info->driver, MODNAME);
2086 strcpy(info->version, DRV_VERSION);
2087 strcpy(info->bus_info, pci_name(lp->pci_dev));
2088 }
2089
2090 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2091 {
2092 struct tc35815_local *lp = dev->priv;
2093 spin_lock_irq(&lp->lock);
2094 mii_ethtool_gset(&lp->mii, cmd);
2095 spin_unlock_irq(&lp->lock);
2096 return 0;
2097 }
2098
2099 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2100 {
2101 struct tc35815_local *lp = dev->priv;
2102 int rc;
2103 #if 1 /* use our negotiation method... */
2104 /* Verify the settings we care about. */
2105 if (cmd->autoneg != AUTONEG_ENABLE &&
2106 cmd->autoneg != AUTONEG_DISABLE)
2107 return -EINVAL;
2108 if (cmd->autoneg == AUTONEG_DISABLE &&
2109 ((cmd->speed != SPEED_100 &&
2110 cmd->speed != SPEED_10) ||
2111 (cmd->duplex != DUPLEX_HALF &&
2112 cmd->duplex != DUPLEX_FULL)))
2113 return -EINVAL;
2114
2115 /* Ok, do it to it. */
2116 spin_lock_irq(&lp->lock);
2117 del_timer(&lp->timer);
2118 tc35815_start_auto_negotiation(dev, cmd);
2119 spin_unlock_irq(&lp->lock);
2120 rc = 0;
2121 #else
2122 spin_lock_irq(&lp->lock);
2123 rc = mii_ethtool_sset(&lp->mii, cmd);
2124 spin_unlock_irq(&lp->lock);
2125 #endif
2126 return rc;
2127 }
2128
2129 static int tc35815_nway_reset(struct net_device *dev)
2130 {
2131 struct tc35815_local *lp = dev->priv;
2132 int rc;
2133 spin_lock_irq(&lp->lock);
2134 rc = mii_nway_restart(&lp->mii);
2135 spin_unlock_irq(&lp->lock);
2136 return rc;
2137 }
2138
2139 static u32 tc35815_get_link(struct net_device *dev)
2140 {
2141 struct tc35815_local *lp = dev->priv;
2142 int rc;
2143 spin_lock_irq(&lp->lock);
2144 rc = mii_link_ok(&lp->mii);
2145 spin_unlock_irq(&lp->lock);
2146 return rc;
2147 }
2148
2149 static u32 tc35815_get_msglevel(struct net_device *dev)
2150 {
2151 struct tc35815_local *lp = dev->priv;
2152 return lp->msg_enable;
2153 }
2154
2155 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2156 {
2157 struct tc35815_local *lp = dev->priv;
2158 lp->msg_enable = datum;
2159 }
2160
2161 static int tc35815_get_stats_count(struct net_device *dev)
2162 {
2163 struct tc35815_local *lp = dev->priv;
2164 return sizeof(lp->lstats) / sizeof(int);
2165 }
2166
2167 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2168 {
2169 struct tc35815_local *lp = dev->priv;
2170 data[0] = lp->lstats.max_tx_qlen;
2171 data[1] = lp->lstats.tx_ints;
2172 data[2] = lp->lstats.rx_ints;
2173 data[3] = lp->lstats.tx_underrun;
2174 }
2175
2176 static struct {
2177 const char str[ETH_GSTRING_LEN];
2178 } ethtool_stats_keys[] = {
2179 { "max_tx_qlen" },
2180 { "tx_ints" },
2181 { "rx_ints" },
2182 { "tx_underrun" },
2183 };
2184
2185 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2186 {
2187 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2188 }
2189
2190 static const struct ethtool_ops tc35815_ethtool_ops = {
2191 .get_drvinfo = tc35815_get_drvinfo,
2192 .get_settings = tc35815_get_settings,
2193 .set_settings = tc35815_set_settings,
2194 .nway_reset = tc35815_nway_reset,
2195 .get_link = tc35815_get_link,
2196 .get_msglevel = tc35815_get_msglevel,
2197 .set_msglevel = tc35815_set_msglevel,
2198 .get_strings = tc35815_get_strings,
2199 .get_stats_count = tc35815_get_stats_count,
2200 .get_ethtool_stats = tc35815_get_ethtool_stats,
2201 };
2202
2203 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2204 {
2205 struct tc35815_local *lp = dev->priv;
2206 int rc;
2207
2208 if (!netif_running(dev))
2209 return -EINVAL;
2210
2211 spin_lock_irq(&lp->lock);
2212 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
2213 spin_unlock_irq(&lp->lock);
2214
2215 return rc;
2216 }
2217
2218 static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2219 {
2220 struct tc35815_regs __iomem *tr =
2221 (struct tc35815_regs __iomem *)dev->base_addr;
2222 u32 data;
2223 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
2224 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2225 ;
2226 data = tc_readl(&tr->MD_Data);
2227 return data & 0xffff;
2228 }
2229
2230 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2231 int val)
2232 {
2233 struct tc35815_regs __iomem *tr =
2234 (struct tc35815_regs __iomem *)dev->base_addr;
2235 tc_writel(val, &tr->MD_Data);
2236 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2237 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2238 ;
2239 }
2240
2241 /* Auto negotiation. The scheme is very simple. We have a timer routine
2242 * that keeps watching the auto negotiation process as it progresses.
2243 * The DP83840 is first told to start doing it's thing, we set up the time
2244 * and place the timer state machine in it's initial state.
2245 *
2246 * Here the timer peeks at the DP83840 status registers at each click to see
2247 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2248 * will time out at some point and just tell us what (didn't) happen. For
2249 * complete coverage we only allow so many of the ticks at this level to run,
2250 * when this has expired we print a warning message and try another strategy.
2251 * This "other" strategy is to force the interface into various speed/duplex
2252 * configurations and we stop when we see a link-up condition before the
2253 * maximum number of "peek" ticks have occurred.
2254 *
2255 * Once a valid link status has been detected we configure the BigMAC and
2256 * the rest of the Happy Meal to speak the most efficient protocol we could
2257 * get a clean link for. The priority for link configurations, highest first
2258 * is:
2259 * 100 Base-T Full Duplex
2260 * 100 Base-T Half Duplex
2261 * 10 Base-T Full Duplex
2262 * 10 Base-T Half Duplex
2263 *
2264 * We start a new timer now, after a successful auto negotiation status has
2265 * been detected. This timer just waits for the link-up bit to get set in
2266 * the BMCR of the DP83840. When this occurs we print a kernel log message
2267 * describing the link type in use and the fact that it is up.
2268 *
2269 * If a fatal error of some sort is signalled and detected in the interrupt
2270 * service routine, and the chip is reset, or the link is ifconfig'd down
2271 * and then back up, this entire process repeats itself all over again.
2272 */
2273 /* Note: Above comments are come from sunhme driver. */
2274
2275 static int tc35815_try_next_permutation(struct net_device *dev)
2276 {
2277 struct tc35815_local *lp = dev->priv;
2278 int pid = lp->phy_addr;
2279 unsigned short bmcr;
2280
2281 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2282
2283 /* Downgrade from full to half duplex. Only possible via ethtool. */
2284 if (bmcr & BMCR_FULLDPLX) {
2285 bmcr &= ~BMCR_FULLDPLX;
2286 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2287 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2288 return 0;
2289 }
2290
2291 /* Downgrade from 100 to 10. */
2292 if (bmcr & BMCR_SPEED100) {
2293 bmcr &= ~BMCR_SPEED100;
2294 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2295 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2296 return 0;
2297 }
2298
2299 /* We've tried everything. */
2300 return -1;
2301 }
2302
2303 static void
2304 tc35815_display_link_mode(struct net_device *dev)
2305 {
2306 struct tc35815_local *lp = dev->priv;
2307 int pid = lp->phy_addr;
2308 unsigned short lpa, bmcr;
2309 char *speed = "", *duplex = "";
2310
2311 lpa = tc_mdio_read(dev, pid, MII_LPA);
2312 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2313 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2314 speed = "100Mb/s";
2315 else
2316 speed = "10Mb/s";
2317 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2318 duplex = "Full Duplex";
2319 else
2320 duplex = "Half Duplex";
2321
2322 if (netif_msg_link(lp))
2323 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2324 dev->name, speed, duplex);
2325 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2326 dev->name,
2327 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2328 }
2329
2330 static void tc35815_display_forced_link_mode(struct net_device *dev)
2331 {
2332 struct tc35815_local *lp = dev->priv;
2333 int pid = lp->phy_addr;
2334 unsigned short bmcr;
2335 char *speed = "", *duplex = "";
2336
2337 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2338 if (bmcr & BMCR_SPEED100)
2339 speed = "100Mb/s";
2340 else
2341 speed = "10Mb/s";
2342 if (bmcr & BMCR_FULLDPLX)
2343 duplex = "Full Duplex.\n";
2344 else
2345 duplex = "Half Duplex.\n";
2346
2347 if (netif_msg_link(lp))
2348 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2349 dev->name, speed, duplex);
2350 }
2351
2352 static void tc35815_set_link_modes(struct net_device *dev)
2353 {
2354 struct tc35815_local *lp = dev->priv;
2355 struct tc35815_regs __iomem *tr =
2356 (struct tc35815_regs __iomem *)dev->base_addr;
2357 int pid = lp->phy_addr;
2358 unsigned short bmcr, lpa;
2359 int speed;
2360
2361 if (lp->timer_state == arbwait) {
2362 lpa = tc_mdio_read(dev, pid, MII_LPA);
2363 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2364 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2365 dev->name,
2366 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2367 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2368 LPA_100HALF | LPA_100FULL))) {
2369 /* fall back to 10HALF */
2370 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2371 dev->name, lpa);
2372 lpa = LPA_10HALF;
2373 }
2374 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2375 lp->fullduplex = 1;
2376 else
2377 lp->fullduplex = 0;
2378 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2379 speed = 100;
2380 else
2381 speed = 10;
2382 } else {
2383 /* Forcing a link mode. */
2384 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2385 if (bmcr & BMCR_FULLDPLX)
2386 lp->fullduplex = 1;
2387 else
2388 lp->fullduplex = 0;
2389 if (bmcr & BMCR_SPEED100)
2390 speed = 100;
2391 else
2392 speed = 10;
2393 }
2394
2395 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2396 if (lp->fullduplex) {
2397 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2398 } else {
2399 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2400 }
2401 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2402
2403 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2404
2405 #ifndef NO_CHECK_CARRIER
2406 /* TX4939 does not have EnLCarr */
2407 if (lp->boardtype != TC35815_TX4939) {
2408 #ifdef WORKAROUND_LOSTCAR
2409 /* WORKAROUND: enable LostCrS only if half duplex operation */
2410 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2411 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2412 #endif
2413 }
2414 #endif
2415 lp->mii.full_duplex = lp->fullduplex;
2416 }
2417
2418 static void tc35815_timer(unsigned long data)
2419 {
2420 struct net_device *dev = (struct net_device *)data;
2421 struct tc35815_local *lp = dev->priv;
2422 int pid = lp->phy_addr;
2423 unsigned short bmsr, bmcr, lpa;
2424 int restart_timer = 0;
2425
2426 spin_lock_irq(&lp->lock);
2427
2428 lp->timer_ticks++;
2429 switch (lp->timer_state) {
2430 case arbwait:
2431 /*
2432 * Only allow for 5 ticks, thats 10 seconds and much too
2433 * long to wait for arbitration to complete.
2434 */
2435 /* TC35815 need more times... */
2436 if (lp->timer_ticks >= 10) {
2437 /* Enter force mode. */
2438 if (!options.doforce) {
2439 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2440 " cable probblem?\n", dev->name);
2441 /* Try to restart the adaptor. */
2442 tc35815_restart(dev);
2443 goto out;
2444 }
2445 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2446 " trying force link mode\n", dev->name);
2447 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2448 tc_mdio_read(dev, pid, MII_BMCR),
2449 tc_mdio_read(dev, pid, MII_BMSR));
2450 bmcr = BMCR_SPEED100;
2451 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2452
2453 /*
2454 * OK, seems we need do disable the transceiver
2455 * for the first tick to make sure we get an
2456 * accurate link state at the second tick.
2457 */
2458
2459 lp->timer_state = ltrywait;
2460 lp->timer_ticks = 0;
2461 restart_timer = 1;
2462 } else {
2463 /* Anything interesting happen? */
2464 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2465 if (bmsr & BMSR_ANEGCOMPLETE) {
2466 /* Just what we've been waiting for... */
2467 tc35815_set_link_modes(dev);
2468
2469 /*
2470 * Success, at least so far, advance our state
2471 * engine.
2472 */
2473 lp->timer_state = lupwait;
2474 restart_timer = 1;
2475 } else {
2476 restart_timer = 1;
2477 }
2478 }
2479 break;
2480
2481 case lupwait:
2482 /*
2483 * Auto negotiation was successful and we are awaiting a
2484 * link up status. I have decided to let this timer run
2485 * forever until some sort of error is signalled, reporting
2486 * a message to the user at 10 second intervals.
2487 */
2488 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2489 if (bmsr & BMSR_LSTATUS) {
2490 /*
2491 * Wheee, it's up, display the link mode in use and put
2492 * the timer to sleep.
2493 */
2494 tc35815_display_link_mode(dev);
2495 netif_carrier_on(dev);
2496 #ifdef WORKAROUND_100HALF_PROMISC
2497 /* delayed promiscuous enabling */
2498 if (dev->flags & IFF_PROMISC)
2499 tc35815_set_multicast_list(dev);
2500 #endif
2501 #if 1
2502 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2503 lp->timer_state = lcheck;
2504 restart_timer = 1;
2505 #else
2506 lp->timer_state = asleep;
2507 restart_timer = 0;
2508 #endif
2509 } else {
2510 if (lp->timer_ticks >= 10) {
2511 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2512 "not completely up.\n", dev->name);
2513 lp->timer_ticks = 0;
2514 restart_timer = 1;
2515 } else {
2516 restart_timer = 1;
2517 }
2518 }
2519 break;
2520
2521 case ltrywait:
2522 /*
2523 * Making the timeout here too long can make it take
2524 * annoyingly long to attempt all of the link mode
2525 * permutations, but then again this is essentially
2526 * error recovery code for the most part.
2527 */
2528 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2529 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2530 if (lp->timer_ticks == 1) {
2531 /*
2532 * Re-enable transceiver, we'll re-enable the
2533 * transceiver next tick, then check link state
2534 * on the following tick.
2535 */
2536 restart_timer = 1;
2537 break;
2538 }
2539 if (lp->timer_ticks == 2) {
2540 restart_timer = 1;
2541 break;
2542 }
2543 if (bmsr & BMSR_LSTATUS) {
2544 /* Force mode selection success. */
2545 tc35815_display_forced_link_mode(dev);
2546 netif_carrier_on(dev);
2547 tc35815_set_link_modes(dev);
2548 #ifdef WORKAROUND_100HALF_PROMISC
2549 /* delayed promiscuous enabling */
2550 if (dev->flags & IFF_PROMISC)
2551 tc35815_set_multicast_list(dev);
2552 #endif
2553 #if 1
2554 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2555 lp->timer_state = lcheck;
2556 restart_timer = 1;
2557 #else
2558 lp->timer_state = asleep;
2559 restart_timer = 0;
2560 #endif
2561 } else {
2562 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2563 int ret;
2564
2565 ret = tc35815_try_next_permutation(dev);
2566 if (ret == -1) {
2567 /*
2568 * Aieee, tried them all, reset the
2569 * chip and try all over again.
2570 */
2571 printk(KERN_NOTICE "%s: Link down, "
2572 "cable problem?\n",
2573 dev->name);
2574
2575 /* Try to restart the adaptor. */
2576 tc35815_restart(dev);
2577 goto out;
2578 }
2579 lp->timer_ticks = 0;
2580 restart_timer = 1;
2581 } else {
2582 restart_timer = 1;
2583 }
2584 }
2585 break;
2586
2587 case lcheck:
2588 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2589 lpa = tc_mdio_read(dev, pid, MII_LPA);
2590 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2591 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2592 bmcr);
2593 } else if ((lp->saved_lpa ^ lpa) &
2594 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2595 printk(KERN_NOTICE "%s: link status changed"
2596 " (BMCR %x LPA %x->%x)\n", dev->name,
2597 bmcr, lp->saved_lpa, lpa);
2598 } else {
2599 /* go on */
2600 restart_timer = 1;
2601 break;
2602 }
2603 /* Try to restart the adaptor. */
2604 tc35815_restart(dev);
2605 goto out;
2606
2607 case asleep:
2608 default:
2609 /* Can't happens.... */
2610 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2611 "one anyways!\n", dev->name);
2612 restart_timer = 0;
2613 lp->timer_ticks = 0;
2614 lp->timer_state = asleep; /* foo on you */
2615 break;
2616 }
2617
2618 if (restart_timer) {
2619 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2620 add_timer(&lp->timer);
2621 }
2622 out:
2623 spin_unlock_irq(&lp->lock);
2624 }
2625
2626 static void tc35815_start_auto_negotiation(struct net_device *dev,
2627 struct ethtool_cmd *ep)
2628 {
2629 struct tc35815_local *lp = dev->priv;
2630 int pid = lp->phy_addr;
2631 unsigned short bmsr, bmcr, advertize;
2632 int timeout;
2633
2634 netif_carrier_off(dev);
2635 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2636 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2637 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2638
2639 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2640 if (options.speed || options.duplex) {
2641 /* Advertise only specified configuration. */
2642 advertize &= ~(ADVERTISE_10HALF |
2643 ADVERTISE_10FULL |
2644 ADVERTISE_100HALF |
2645 ADVERTISE_100FULL);
2646 if (options.speed != 10) {
2647 if (options.duplex != 1)
2648 advertize |= ADVERTISE_100FULL;
2649 if (options.duplex != 2)
2650 advertize |= ADVERTISE_100HALF;
2651 }
2652 if (options.speed != 100) {
2653 if (options.duplex != 1)
2654 advertize |= ADVERTISE_10FULL;
2655 if (options.duplex != 2)
2656 advertize |= ADVERTISE_10HALF;
2657 }
2658 if (options.speed == 100)
2659 bmcr |= BMCR_SPEED100;
2660 else if (options.speed == 10)
2661 bmcr &= ~BMCR_SPEED100;
2662 if (options.duplex == 2)
2663 bmcr |= BMCR_FULLDPLX;
2664 else if (options.duplex == 1)
2665 bmcr &= ~BMCR_FULLDPLX;
2666 } else {
2667 /* Advertise everything we can support. */
2668 if (bmsr & BMSR_10HALF)
2669 advertize |= ADVERTISE_10HALF;
2670 else
2671 advertize &= ~ADVERTISE_10HALF;
2672 if (bmsr & BMSR_10FULL)
2673 advertize |= ADVERTISE_10FULL;
2674 else
2675 advertize &= ~ADVERTISE_10FULL;
2676 if (bmsr & BMSR_100HALF)
2677 advertize |= ADVERTISE_100HALF;
2678 else
2679 advertize &= ~ADVERTISE_100HALF;
2680 if (bmsr & BMSR_100FULL)
2681 advertize |= ADVERTISE_100FULL;
2682 else
2683 advertize &= ~ADVERTISE_100FULL;
2684 }
2685
2686 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2687
2688 /* Enable Auto-Negotiation, this is usually on already... */
2689 bmcr |= BMCR_ANENABLE;
2690 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2691
2692 /* Restart it to make sure it is going. */
2693 bmcr |= BMCR_ANRESTART;
2694 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2695 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2696
2697 /* BMCR_ANRESTART self clears when the process has begun. */
2698 timeout = 64; /* More than enough. */
2699 while (--timeout) {
2700 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2701 if (!(bmcr & BMCR_ANRESTART))
2702 break; /* got it. */
2703 udelay(10);
2704 }
2705 if (!timeout) {
2706 printk(KERN_ERR "%s: TC35815 would not start auto "
2707 "negotiation BMCR=0x%04x\n",
2708 dev->name, bmcr);
2709 printk(KERN_NOTICE "%s: Performing force link "
2710 "detection.\n", dev->name);
2711 goto force_link;
2712 } else {
2713 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2714 lp->timer_state = arbwait;
2715 }
2716 } else {
2717 force_link:
2718 /* Force the link up, trying first a particular mode.
2719 * Either we are here at the request of ethtool or
2720 * because the Happy Meal would not start to autoneg.
2721 */
2722
2723 /* Disable auto-negotiation in BMCR, enable the duplex and
2724 * speed setting, init the timer state machine, and fire it off.
2725 */
2726 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2727 bmcr = BMCR_SPEED100;
2728 } else {
2729 if (ep->speed == SPEED_100)
2730 bmcr = BMCR_SPEED100;
2731 else
2732 bmcr = 0;
2733 if (ep->duplex == DUPLEX_FULL)
2734 bmcr |= BMCR_FULLDPLX;
2735 }
2736 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2737
2738 /* OK, seems we need do disable the transceiver for the first
2739 * tick to make sure we get an accurate link state at the
2740 * second tick.
2741 */
2742 lp->timer_state = ltrywait;
2743 }
2744
2745 del_timer(&lp->timer);
2746 lp->timer_ticks = 0;
2747 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2748 add_timer(&lp->timer);
2749 }
2750
2751 static void tc35815_find_phy(struct net_device *dev)
2752 {
2753 struct tc35815_local *lp = dev->priv;
2754 int pid = lp->phy_addr;
2755 unsigned short id0;
2756
2757 /* find MII phy */
2758 for (pid = 31; pid >= 0; pid--) {
2759 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2760 if (id0 != 0xffff && id0 != 0x0000 &&
2761 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2762 ) {
2763 lp->phy_addr = pid;
2764 break;
2765 }
2766 }
2767 if (pid < 0) {
2768 printk(KERN_ERR "%s: No MII Phy found.\n",
2769 dev->name);
2770 lp->phy_addr = pid = 0;
2771 }
2772
2773 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2774 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2775 if (netif_msg_hw(lp))
2776 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2777 pid, lp->mii_id[0], lp->mii_id[1]);
2778 }
2779
2780 static void tc35815_phy_chip_init(struct net_device *dev)
2781 {
2782 struct tc35815_local *lp = dev->priv;
2783 int pid = lp->phy_addr;
2784 unsigned short bmcr;
2785 struct ethtool_cmd ecmd, *ep;
2786
2787 /* dis-isolate if needed. */
2788 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2789 if (bmcr & BMCR_ISOLATE) {
2790 int count = 32;
2791 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2792 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2793 while (--count) {
2794 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2795 break;
2796 udelay(20);
2797 }
2798 printk(" %s.\n", count ? "done" : "failed");
2799 }
2800
2801 if (options.speed && options.duplex) {
2802 ecmd.autoneg = AUTONEG_DISABLE;
2803 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2804 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2805 ep = &ecmd;
2806 } else {
2807 ep = NULL;
2808 }
2809 tc35815_start_auto_negotiation(dev, ep);
2810 }
2811
2812 static void tc35815_chip_reset(struct net_device *dev)
2813 {
2814 struct tc35815_regs __iomem *tr =
2815 (struct tc35815_regs __iomem *)dev->base_addr;
2816 int i;
2817 /* reset the controller */
2818 tc_writel(MAC_Reset, &tr->MAC_Ctl);
2819 udelay(4); /* 3200ns */
2820 i = 0;
2821 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2822 if (i++ > 100) {
2823 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2824 break;
2825 }
2826 mdelay(1);
2827 }
2828 tc_writel(0, &tr->MAC_Ctl);
2829
2830 /* initialize registers to default value */
2831 tc_writel(0, &tr->DMA_Ctl);
2832 tc_writel(0, &tr->TxThrsh);
2833 tc_writel(0, &tr->TxPollCtr);
2834 tc_writel(0, &tr->RxFragSize);
2835 tc_writel(0, &tr->Int_En);
2836 tc_writel(0, &tr->FDA_Bas);
2837 tc_writel(0, &tr->FDA_Lim);
2838 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
2839 tc_writel(0, &tr->CAM_Ctl);
2840 tc_writel(0, &tr->Tx_Ctl);
2841 tc_writel(0, &tr->Rx_Ctl);
2842 tc_writel(0, &tr->CAM_Ena);
2843 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
2844
2845 /* initialize internal SRAM */
2846 tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2847 for (i = 0; i < 0x1000; i += 4) {
2848 tc_writel(i, &tr->CAM_Adr);
2849 tc_writel(0, &tr->CAM_Data);
2850 }
2851 tc_writel(0, &tr->DMA_Ctl);
2852 }
2853
2854 static void tc35815_chip_init(struct net_device *dev)
2855 {
2856 struct tc35815_local *lp = dev->priv;
2857 struct tc35815_regs __iomem *tr =
2858 (struct tc35815_regs __iomem *)dev->base_addr;
2859 unsigned long txctl = TX_CTL_CMD;
2860
2861 tc35815_phy_chip_init(dev);
2862
2863 /* load station address to CAM */
2864 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2865
2866 /* Enable CAM (broadcast and unicast) */
2867 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2868 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2869
2870 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2871 if (HAVE_DMA_RXALIGN(lp))
2872 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2873 else
2874 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2875 #ifdef TC35815_USE_PACKEDBUFFER
2876 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
2877 #else
2878 tc_writel(ETH_ZLEN, &tr->RxFragSize);
2879 #endif
2880 tc_writel(0, &tr->TxPollCtr); /* Batch mode */
2881 tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2882 tc_writel(INT_EN_CMD, &tr->Int_En);
2883
2884 /* set queues */
2885 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2886 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2887 &tr->FDA_Lim);
2888 /*
2889 * Activation method:
2890 * First, enable the MAC Transmitter and the DMA Receive circuits.
2891 * Then enable the DMA Transmitter and the MAC Receive circuits.
2892 */
2893 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
2894 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
2895
2896 /* start MAC transmitter */
2897 #ifndef NO_CHECK_CARRIER
2898 /* TX4939 does not have EnLCarr */
2899 if (lp->boardtype == TC35815_TX4939)
2900 txctl &= ~Tx_EnLCarr;
2901 #ifdef WORKAROUND_LOSTCAR
2902 /* WORKAROUND: ignore LostCrS in full duplex operation */
2903 if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
2904 lp->fullduplex)
2905 txctl &= ~Tx_EnLCarr;
2906 #endif
2907 #endif /* !NO_CHECK_CARRIER */
2908 #ifdef GATHER_TXINT
2909 txctl &= ~Tx_EnComp; /* disable global tx completion int. */
2910 #endif
2911 tc_writel(txctl, &tr->Tx_Ctl);
2912 }
2913
2914 #ifdef CONFIG_PM
2915 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2916 {
2917 struct net_device *dev = pci_get_drvdata(pdev);
2918 struct tc35815_local *lp = dev->priv;
2919 unsigned long flags;
2920
2921 pci_save_state(pdev);
2922 if (!netif_running(dev))
2923 return 0;
2924 netif_device_detach(dev);
2925 spin_lock_irqsave(&lp->lock, flags);
2926 del_timer(&lp->timer); /* Kill if running */
2927 tc35815_chip_reset(dev);
2928 spin_unlock_irqrestore(&lp->lock, flags);
2929 pci_set_power_state(pdev, PCI_D3hot);
2930 return 0;
2931 }
2932
2933 static int tc35815_resume(struct pci_dev *pdev)
2934 {
2935 struct net_device *dev = pci_get_drvdata(pdev);
2936 struct tc35815_local *lp = dev->priv;
2937 unsigned long flags;
2938
2939 pci_restore_state(pdev);
2940 if (!netif_running(dev))
2941 return 0;
2942 pci_set_power_state(pdev, PCI_D0);
2943 spin_lock_irqsave(&lp->lock, flags);
2944 tc35815_restart(dev);
2945 spin_unlock_irqrestore(&lp->lock, flags);
2946 netif_device_attach(dev);
2947 return 0;
2948 }
2949 #endif /* CONFIG_PM */
2950
2951 static struct pci_driver tc35815_pci_driver = {
2952 .name = MODNAME,
2953 .id_table = tc35815_pci_tbl,
2954 .probe = tc35815_init_one,
2955 .remove = __devexit_p(tc35815_remove_one),
2956 #ifdef CONFIG_PM
2957 .suspend = tc35815_suspend,
2958 .resume = tc35815_resume,
2959 #endif
2960 };
2961
2962 module_param_named(speed, options.speed, int, 0);
2963 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2964 module_param_named(duplex, options.duplex, int, 0);
2965 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2966 module_param_named(doforce, options.doforce, int, 0);
2967 MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2968
2969 static int __init tc35815_init_module(void)
2970 {
2971 return pci_register_driver(&tc35815_pci_driver);
2972 }
2973
2974 static void __exit tc35815_cleanup_module(void)
2975 {
2976 pci_unregister_driver(&tc35815_pci_driver);
2977 }
2978
2979 module_init(tc35815_init_module);
2980 module_exit(tc35815_cleanup_module);
2981
2982 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2983 MODULE_LICENSE("GPL");
WRT350N Kernel Patches