include/asm-mips/processor.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 Waldorf GMBH
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
   8  * Copyright (C) 1996 Paul M. Antoine
   9  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  10  */
  11 #ifndef _ASM_PROCESSOR_H
  12 #define _ASM_PROCESSOR_H
  13
  14 #include <linux/cpumask.h>
  15 #include <linux/threads.h>
  16
  17 #include <asm/cachectl.h>
  18 #include <asm/cpu.h>
  19 #include <asm/cpu-info.h>
  20 #include <asm/mipsregs.h>
  21 #include <asm/prefetch.h>
  22 #include <asm/system.h>
  23
  24 /*
  25  * Return current * instruction pointer ("program counter").
  26  */
  27 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  28
  29 /*
  30  * System setup and hardware flags..
  31  */
  32 extern void (*cpu_wait)(void);
  33
  34 extern unsigned int vced_count, vcei_count;
  35
  36 #ifdef CONFIG_32BIT
  37 /*
  38  * User space process size: 2GB. This is hardcoded into a few places,
  39  * so don't change it unless you know what you are doing.
  40  */
  41 #define TASK_SIZE       0x7fff8000UL
  42
  43 /*
  44  * This decides where the kernel will search for a free chunk of vm
  45  * space during mmap's.
  46  */
  47 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
  48 #endif
  49
  50 #ifdef CONFIG_64BIT
  51 /*
  52  * User space process size: 1TB. This is hardcoded into a few places,
  53  * so don't change it unless you know what you are doing.  TASK_SIZE
  54  * is limited to 1TB by the R4000 architecture; R10000 and better can
  55  * support 16TB; the architectural reserve for future expansion is
  56  * 8192EB ...
  57  */
  58 #define TASK_SIZE32     0x7fff8000UL
  59 #define TASK_SIZE       0x10000000000UL
  60
  61 /*
  62  * This decides where the kernel will search for a free chunk of vm
  63  * space during mmap's.
  64  */
  65 #define TASK_UNMAPPED_BASE      ((current->thread.mflags & MF_32BIT_ADDR) ? \
  66         PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
  67 #endif
  68
  69 #define NUM_FPU_REGS    32
  70
  71 typedef __u64 fpureg_t;
  72
  73 /*
  74  * It would be nice to add some more fields for emulator statistics, but there
  75  * are a number of fixed offsets in offset.h and elsewhere that would have to
  76  * be recalculated by hand.  So the additional information will be private to
  77  * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
  78  */
  79
  80 struct mips_fpu_struct {
  81         fpureg_t        fpr[NUM_FPU_REGS];
  82         unsigned int    fcr31;
  83 };
  84
  85 #define NUM_DSP_REGS   6
  86
  87 typedef __u32 dspreg_t;
  88
  89 struct mips_dsp_state {
  90         dspreg_t        dspr[NUM_DSP_REGS];
  91         unsigned int    dspcontrol;
  92 };
  93
  94 #define INIT_CPUMASK { \
  95         {0,} \
  96 }
  97
  98 typedef struct {
  99         unsigned long seg;
 100 } mm_segment_t;
 101
 102 #define ARCH_MIN_TASKALIGN      8
 103
 104 struct mips_abi;
 105
 106 /*
 107  * If you change thread_struct remember to change the #defines below too!
 108  */
 109 struct thread_struct {
 110         /* Saved main processor registers. */
 111         unsigned long reg16;
 112         unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
 113         unsigned long reg29, reg30, reg31;
 114
 115         /* Saved cp0 stuff. */
 116         unsigned long cp0_status;
 117
 118         /* Saved fpu/fpu emulator stuff. */
 119         struct mips_fpu_struct fpu;
 120 #ifdef CONFIG_MIPS_MT_FPAFF
 121         /* Emulated instruction count */
 122         unsigned long emulated_fp;
 123         /* Saved per-thread scheduler affinity mask */
 124         cpumask_t user_cpus_allowed;
 125 #endif /* CONFIG_MIPS_MT_FPAFF */
 126
 127         /* Saved state of the DSP ASE, if available. */
 128         struct mips_dsp_state dsp;
 129
 130         /* Other stuff associated with the thread. */
 131         unsigned long cp0_badvaddr;     /* Last user fault */
 132         unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
 133         unsigned long error_code;
 134         unsigned long trap_no;
 135 #define MF_FIXADE       1               /* Fix address errors in software */
 136 #define MF_LOGADE       2               /* Log address errors to syslog */
 137 #define MF_32BIT_REGS   4               /* also implies 16/32 fprs */
 138 #define MF_32BIT_ADDR   8               /* 32-bit address space (o32/n32) */
 139 #define MF_FPUBOUND     0x10            /* thread bound to FPU-full CPU set */
 140         unsigned long mflags;
 141         unsigned long irix_trampoline;  /* Wheee... */
 142         unsigned long irix_oldctx;
 143         struct mips_abi *abi;
 144 };
 145
 146 #define MF_ABI_MASK     (MF_32BIT_REGS | MF_32BIT_ADDR)
 147 #define MF_O32          (MF_32BIT_REGS | MF_32BIT_ADDR)
 148 #define MF_N32          MF_32BIT_ADDR
 149 #define MF_N64          0
 150
 151 #ifdef CONFIG_MIPS_MT_FPAFF
 152 #define FPAFF_INIT                                              \
 153         .emulated_fp                    = 0,                    \
 154         .user_cpus_allowed              = INIT_CPUMASK,
 155 #else
 156 #define FPAFF_INIT
 157 #endif /* CONFIG_MIPS_MT_FPAFF */
 158
 159 #define INIT_THREAD  {                                          \
 160         /*                                                      \
 161          * Saved main processor registers                       \
 162          */                                                     \
 163         .reg16                  = 0,                            \
 164         .reg17                  = 0,                            \
 165         .reg18                  = 0,                            \
 166         .reg19                  = 0,                            \
 167         .reg20                  = 0,                            \
 168         .reg21                  = 0,                            \
 169         .reg22                  = 0,                            \
 170         .reg23                  = 0,                            \
 171         .reg29                  = 0,                            \
 172         .reg30                  = 0,                            \
 173         .reg31                  = 0,                            \
 174         /*                                                      \
 175          * Saved cp0 stuff                                      \
 176          */                                                     \
 177         .cp0_status             = 0,                            \
 178         /*                                                      \
 179          * Saved FPU/FPU emulator stuff                         \
 180          */                                                     \
 181         .fpu                    = {                             \
 182                 .fpr            = {0,},                         \
 183                 .fcr31          = 0,                            \
 184         },                                                      \
 185         /*                                                      \
 186          * FPU affinity state (null if not FPAFF)               \
 187          */                                                     \
 188         FPAFF_INIT                                              \
 189         /*                                                      \
 190          * Saved DSP stuff                                      \
 191          */                                                     \
 192         .dsp                    = {                             \
 193                 .dspr           = {0, },                        \
 194                 .dspcontrol     = 0,                            \
 195         },                                                      \
 196         /*                                                      \
 197          * Other stuff associated with the process              \
 198          */                                                     \
 199         .cp0_badvaddr           = 0,                            \
 200         .cp0_baduaddr           = 0,                            \
 201         .error_code             = 0,                            \
 202         .trap_no                = 0,                            \
 203         /*                                                      \
 204          * For now the default is to fix address errors         \
 205          */                                                     \
 206         .mflags                 = MF_FIXADE,                    \
 207         .irix_trampoline        = 0,                            \
 208         .irix_oldctx            = 0,                            \
 209 }
 210
 211 struct task_struct;
 212
 213 /* Free all resources held by a thread. */
 214 #define release_thread(thread) do { } while(0)
 215
 216 /* Prepare to copy thread state - unlazy all lazy status */
 217 #define prepare_to_copy(tsk)    do { } while (0)
 218
 219 extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 220
 221 extern unsigned long thread_saved_pc(struct task_struct *tsk);
 222
 223 /*
 224  * Do necessary setup to start up a newly executed thread.
 225  */
 226 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
 227
 228 unsigned long get_wchan(struct task_struct *p);
 229
 230 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
 231 #define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
 232 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
 233 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
 234 #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
 235
 236 #define cpu_relax()     barrier()
 237
 238 /*
 239  * Return_address is a replacement for __builtin_return_address(count)
 240  * which on certain architectures cannot reasonably be implemented in GCC
 241  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 242  * Note that __builtin_return_address(x>=1) is forbidden because GCC
 243  * aborts compilation on some CPUs.  It's simply not possible to unwind
 244  * some CPU's stackframes.
 245  *
 246  * __builtin_return_address works only for non-leaf functions.  We avoid the
 247  * overhead of a function call by forcing the compiler to save the return
 248  * address register on the stack.
 249  */
 250 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
 251
 252 #ifdef CONFIG_CPU_HAS_PREFETCH
 253
 254 #define ARCH_HAS_PREFETCH
 255
 256 static inline void prefetch(const void *addr)
 257 {
 258         __asm__ __volatile__(
 259         "       .set    mips4           \n"
 260         "       pref    %0, (%1)        \n"
 261         "       .set    mips0           \n"
 262         :
 263         : "i" (Pref_Load), "r" (addr));
 264 }
 265
 266 #endif
 267
 268 #endif /* _ASM_PROCESSOR_H */