x86: pit_clockevent can be static
[wrt350n-kernel.git] / include / asm-arm / pgalloc.h
blob163b0305dd76b3e83176f294eb204d3a389bd3ad
1 /*
2 * linux/include/asm-arm/pgalloc.h
4 * Copyright (C) 2000-2001 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #ifndef _ASMARM_PGALLOC_H
11 #define _ASMARM_PGALLOC_H
13 #include <asm/domain.h>
14 #include <asm/pgtable-hwdef.h>
15 #include <asm/processor.h>
16 #include <asm/cacheflush.h>
17 #include <asm/tlbflush.h>
19 #define check_pgt_cache() do { } while (0)
21 #ifdef CONFIG_MMU
23 #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
24 #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
27 * Since we have only two-level page tables, these are trivial
29 #define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); })
30 #define pmd_free(mm, pmd) do { } while (0)
31 #define pgd_populate(mm,pmd,pte) BUG()
33 extern pgd_t *get_pgd_slow(struct mm_struct *mm);
34 extern void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd);
36 #define pgd_alloc(mm) get_pgd_slow(mm)
37 #define pgd_free(mm, pgd) free_pgd_slow(mm, pgd)
40 * Allocate one PTE table.
42 * This actually allocates two hardware PTE tables, but we wrap this up
43 * into one table thus:
45 * +------------+
46 * | h/w pt 0 |
47 * +------------+
48 * | h/w pt 1 |
49 * +------------+
50 * | Linux pt 0 |
51 * +------------+
52 * | Linux pt 1 |
53 * +------------+
55 static inline pte_t *
56 pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
58 pte_t *pte;
60 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
61 if (pte) {
62 clean_dcache_area(pte, sizeof(pte_t) * PTRS_PER_PTE);
63 pte += PTRS_PER_PTE;
66 return pte;
69 static inline pgtable_t
70 pte_alloc_one(struct mm_struct *mm, unsigned long addr)
72 struct page *pte;
74 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
75 if (pte) {
76 void *page = page_address(pte);
77 clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE);
78 pgtable_page_ctor(pte);
81 return pte;
85 * Free one PTE table.
87 static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
89 if (pte) {
90 pte -= PTRS_PER_PTE;
91 free_page((unsigned long)pte);
95 static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
97 pgtable_page_dtor(pte);
98 __free_page(pte);
101 static inline void __pmd_populate(pmd_t *pmdp, unsigned long pmdval)
103 pmdp[0] = __pmd(pmdval);
104 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
105 flush_pmd_entry(pmdp);
109 * Populate the pmdp entry with a pointer to the pte. This pmd is part
110 * of the mm address space.
112 * Ensure that we always set both PMD entries.
114 static inline void
115 pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
117 unsigned long pte_ptr = (unsigned long)ptep;
120 * The pmd must be loaded with the physical
121 * address of the PTE table
123 pte_ptr -= PTRS_PER_PTE * sizeof(void *);
124 __pmd_populate(pmdp, __pa(pte_ptr) | _PAGE_KERNEL_TABLE);
127 static inline void
128 pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
130 __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE);
132 #define pmd_pgtable(pmd) pmd_page(pmd)
134 #endif /* CONFIG_MMU */
136 #endif