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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[wrt350n-kernel.git] / drivers / media / video / ks0127.c
blob4895540be195ad0e8854b563c6eb53a50d5ccb14
1 /*
2 * Video Capture Driver (Video for Linux 1/2)
3 * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
4 *
5 * This module is an interface to the KS0127 video decoder chip.
6 *
7 * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 *****************************************************************************
24 *
25 * Modified and extended by
26 * Mike Bernson <mike@mlb.org>
27 * Gerard v.d. Horst
28 * Leon van Stuivenberg <l.vanstuivenberg@chello.nl>
29 * Gernot Ziegler <gz@lysator.liu.se>
30 *
31 * Version History:
32 * V1.0 Ryan Drake Initial version by Ryan Drake
33 * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard
34 */
35
36 #ifndef __KERNEL__
37 #define __KERNEL__
38 #endif
39
40 #include <linux/init.h>
41 #include <linux/module.h>
42 #include <linux/delay.h>
43 #include <linux/errno.h>
44 #include <linux/kernel.h>
45 #include <linux/slab.h>
46 #include <linux/proc_fs.h>
47 #include "ks0127.h"
48
49 #include <linux/i2c.h>
50 #include <linux/video_decoder.h>
51
52 #define dprintk if (debug) printk
53
54 /* i2c identification */
55 #define I2C_KS0127_ADDON 0xD8
56 #define I2C_KS0127_ONBOARD 0xDA
57
58 #define KS_TYPE_UNKNOWN 0
59 #define KS_TYPE_0122S 1
60 #define KS_TYPE_0127 2
61 #define KS_TYPE_0127B 3
62
63 /* ks0127 control registers */
64 #define KS_STAT 0x00
65 #define KS_CMDA 0x01
66 #define KS_CMDB 0x02
67 #define KS_CMDC 0x03
68 #define KS_CMDD 0x04
69 #define KS_HAVB 0x05
70 #define KS_HAVE 0x06
71 #define KS_HS1B 0x07
72 #define KS_HS1E 0x08
73 #define KS_HS2B 0x09
74 #define KS_HS2E 0x0a
75 #define KS_AGC 0x0b
76 #define KS_HXTRA 0x0c
77 #define KS_CDEM 0x0d
78 #define KS_PORTAB 0x0e
79 #define KS_LUMA 0x0f
80 #define KS_CON 0x10
81 #define KS_BRT 0x11
82 #define KS_CHROMA 0x12
83 #define KS_CHROMB 0x13
84 #define KS_DEMOD 0x14
85 #define KS_SAT 0x15
86 #define KS_HUE 0x16
87 #define KS_VERTIA 0x17
88 #define KS_VERTIB 0x18
89 #define KS_VERTIC 0x19
90 #define KS_HSCLL 0x1a
91 #define KS_HSCLH 0x1b
92 #define KS_VSCLL 0x1c
93 #define KS_VSCLH 0x1d
94 #define KS_OFMTA 0x1e
95 #define KS_OFMTB 0x1f
96 #define KS_VBICTL 0x20
97 #define KS_CCDAT2 0x21
98 #define KS_CCDAT1 0x22
99 #define KS_VBIL30 0x23
100 #define KS_VBIL74 0x24
101 #define KS_VBIL118 0x25
102 #define KS_VBIL1512 0x26
103 #define KS_TTFRAM 0x27
104 #define KS_TESTA 0x28
105 #define KS_UVOFFH 0x29
106 #define KS_UVOFFL 0x2a
107 #define KS_UGAIN 0x2b
108 #define KS_VGAIN 0x2c
109 #define KS_VAVB 0x2d
110 #define KS_VAVE 0x2e
111 #define KS_CTRACK 0x2f
112 #define KS_POLCTL 0x30
113 #define KS_REFCOD 0x31
114 #define KS_INVALY 0x32
115 #define KS_INVALU 0x33
116 #define KS_INVALV 0x34
117 #define KS_UNUSEY 0x35
118 #define KS_UNUSEU 0x36
119 #define KS_UNUSEV 0x37
120 #define KS_USRSAV 0x38
121 #define KS_USREAV 0x39
122 #define KS_SHS1A 0x3a
123 #define KS_SHS1B 0x3b
124 #define KS_SHS1C 0x3c
125 #define KS_CMDE 0x3d
126 #define KS_VSDEL 0x3e
127 #define KS_CMDF 0x3f
128 #define KS_GAMMA0 0x40
129 #define KS_GAMMA1 0x41
130 #define KS_GAMMA2 0x42
131 #define KS_GAMMA3 0x43
132 #define KS_GAMMA4 0x44
133 #define KS_GAMMA5 0x45
134 #define KS_GAMMA6 0x46
135 #define KS_GAMMA7 0x47
136 #define KS_GAMMA8 0x48
137 #define KS_GAMMA9 0x49
138 #define KS_GAMMA10 0x4a
139 #define KS_GAMMA11 0x4b
140 #define KS_GAMMA12 0x4c
141 #define KS_GAMMA13 0x4d
142 #define KS_GAMMA14 0x4e
143 #define KS_GAMMA15 0x4f
144 #define KS_GAMMA16 0x50
145 #define KS_GAMMA17 0x51
146 #define KS_GAMMA18 0x52
147 #define KS_GAMMA19 0x53
148 #define KS_GAMMA20 0x54
149 #define KS_GAMMA21 0x55
150 #define KS_GAMMA22 0x56
151 #define KS_GAMMA23 0x57
152 #define KS_GAMMA24 0x58
153 #define KS_GAMMA25 0x59
154 #define KS_GAMMA26 0x5a
155 #define KS_GAMMA27 0x5b
156 #define KS_GAMMA28 0x5c
157 #define KS_GAMMA29 0x5d
158 #define KS_GAMMA30 0x5e
159 #define KS_GAMMA31 0x5f
160 #define KS_GAMMAD0 0x60
161 #define KS_GAMMAD1 0x61
162 #define KS_GAMMAD2 0x62
163 #define KS_GAMMAD3 0x63
164 #define KS_GAMMAD4 0x64
165 #define KS_GAMMAD5 0x65
166 #define KS_GAMMAD6 0x66
167 #define KS_GAMMAD7 0x67
168 #define KS_GAMMAD8 0x68
169 #define KS_GAMMAD9 0x69
170 #define KS_GAMMAD10 0x6a
171 #define KS_GAMMAD11 0x6b
172 #define KS_GAMMAD12 0x6c
173 #define KS_GAMMAD13 0x6d
174 #define KS_GAMMAD14 0x6e
175 #define KS_GAMMAD15 0x6f
176 #define KS_GAMMAD16 0x70
177 #define KS_GAMMAD17 0x71
178 #define KS_GAMMAD18 0x72
179 #define KS_GAMMAD19 0x73
180 #define KS_GAMMAD20 0x74
181 #define KS_GAMMAD21 0x75
182 #define KS_GAMMAD22 0x76
183 #define KS_GAMMAD23 0x77
184 #define KS_GAMMAD24 0x78
185 #define KS_GAMMAD25 0x79
186 #define KS_GAMMAD26 0x7a
187 #define KS_GAMMAD27 0x7b
188 #define KS_GAMMAD28 0x7c
189 #define KS_GAMMAD29 0x7d
190 #define KS_GAMMAD30 0x7e
191 #define KS_GAMMAD31 0x7f
192
193
194 /****************************************************************************
195 * mga_dev : represents one ks0127 chip.
196 ****************************************************************************/
197
198 struct adjust {
199 int contrast;
200 int bright;
201 int hue;
202 int ugain;
203 int vgain;
204 };
205
206 struct ks0127 {
207 struct i2c_client *client;
208 unsigned char addr;
209 int format_width;
210 int format_height;
211 int cap_width;
212 int cap_height;
213 int norm;
214 int ks_type;
215 u8 regs[256];
216 };
217
218
219 static int debug; /* insmod parameter */
220
221 module_param(debug, int, 0);
222 MODULE_PARM_DESC(debug, "Debug output");
223 MODULE_LICENSE("GPL");
224
225 static u8 reg_defaults[64];
226
227
228
229 static void init_reg_defaults(void)
230 {
231 u8 *table = reg_defaults;
232
233 table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */
234 table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */
235 table[KS_CMDC] = 0x00; /* Test options */
236 /* clock & input select, write 1 to PORTA */
237 table[KS_CMDD] = 0x01;
238 table[KS_HAVB] = 0x00; /* HAV Start Control */
239 table[KS_HAVE] = 0x00; /* HAV End Control */
240 table[KS_HS1B] = 0x10; /* HS1 Start Control */
241 table[KS_HS1E] = 0x00; /* HS1 End Control */
242 table[KS_HS2B] = 0x00; /* HS2 Start Control */
243 table[KS_HS2E] = 0x00; /* HS2 End Control */
244 table[KS_AGC] = 0x53; /* Manual setting for AGC */
245 table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */
246 table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */
247 table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */
248 table[KS_LUMA] = 0x01; /* Luma control */
249 table[KS_CON] = 0x00; /* Contrast Control */
250 table[KS_BRT] = 0x00; /* Brightness Control */
251 table[KS_CHROMA] = 0x2a; /* Chroma control A */
252 table[KS_CHROMB] = 0x90; /* Chroma control B */
253 table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */
254 table[KS_SAT] = 0x00; /* Color Saturation Control*/
255 table[KS_HUE] = 0x00; /* Hue Control */
256 table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */
257 /* Vertical Processing Control B, luma 1 line delayed */
258 table[KS_VERTIB] = 0x12;
259 table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */
260 table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */
261 table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */
262 table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */
263 table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */
264 /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
265 table[KS_OFMTA] = 0x30;
266 table[KS_OFMTB] = 0x00; /* Output Control B */
267 /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
268 table[KS_VBICTL] = 0x5d;
269 table[KS_CCDAT2] = 0x00; /* Read Only register */
270 table[KS_CCDAT1] = 0x00; /* Read Only register */
271 table[KS_VBIL30] = 0xa8; /* VBI data decoding options */
272 table[KS_VBIL74] = 0xaa; /* VBI data decoding options */
273 table[KS_VBIL118] = 0x2a; /* VBI data decoding options */
274 table[KS_VBIL1512] = 0x00; /* VBI data decoding options */
275 table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */
276 table[KS_TESTA] = 0x00; /* test register, shouldn't be written */
277 table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */
278 table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */
279 table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */
280 table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */
281 table[KS_VAVB] = 0x07; /* VAV Begin */
282 table[KS_VAVE] = 0x00; /* VAV End */
283 table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */
284 table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */
285 table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */
286 table[KS_INVALY] = 0x10; /* Invalid Y Code */
287 table[KS_INVALU] = 0x80; /* Invalid U Code */
288 table[KS_INVALV] = 0x80; /* Invalid V Code */
289 table[KS_UNUSEY] = 0x10; /* Unused Y Code */
290 table[KS_UNUSEU] = 0x80; /* Unused U Code */
291 table[KS_UNUSEV] = 0x80; /* Unused V Code */
292 table[KS_USRSAV] = 0x00; /* reserved */
293 table[KS_USREAV] = 0x00; /* reserved */
294 table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */
295 /* User Defined SHS1 B, ALT656=1 on 0127B */
296 table[KS_SHS1B] = 0x80;
297 table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */
298 table[KS_CMDE] = 0x00; /* Command Register E */
299 table[KS_VSDEL] = 0x00; /* VS Delay Control */
300 /* Command Register F, update -immediately- */
301 /* (there might come no vsync)*/
302 table[KS_CMDF] = 0x02;
303 }
304
305
306 /* We need to manually read because of a bug in the KS0127 chip.
307 *
308 * An explanation from kayork@mail.utexas.edu:
309 *
310 * During I2C reads, the KS0127 only samples for a stop condition
311 * during the place where the acknoledge bit should be. Any standard
312 * I2C implementation (correctly) throws in another clock transition
313 * at the 9th bit, and the KS0127 will not recognize the stop condition
314 * and will continue to clock out data.
315 *
316 * So we have to do the read ourself. Big deal.
317 workaround in i2c-algo-bit
318 */
319
320
321 static u8 ks0127_read(struct ks0127 *ks, u8 reg)
322 {
323 struct i2c_client *c = ks->client;
324 char val = 0;
325 struct i2c_msg msgs[] = {
326 {c->addr, 0, sizeof(reg), &reg},
327 {c->addr, I2C_M_RD | I2C_M_NO_RD_ACK, sizeof(val), &val}};
328 int ret;
329
330 ret = i2c_transfer(c->adapter, msgs, ARRAY_SIZE(msgs));
331 if (ret != ARRAY_SIZE(msgs))
332 dprintk("ks0127_write error\n");
333
334 return val;
335 }
336
337
338 static void ks0127_write(struct ks0127 *ks, u8 reg, u8 val)
339 {
340 char msg[] = {reg, val};
341
342 if (i2c_master_send(ks->client, msg, sizeof(msg)) != sizeof(msg))
343 dprintk("ks0127_write error\n");
344
345 ks->regs[reg] = val;
346 }
347
348
349 /* generic bit-twiddling */
350 static void ks0127_and_or(struct ks0127 *ks, u8 reg, u8 and_v, u8 or_v)
351 {
352 u8 val = ks->regs[reg];
353 val = (val & and_v) | or_v;
354 ks0127_write(ks, reg, val);
355 }
356
357
358
359 /****************************************************************************
360 * ks0127 private api
361 ****************************************************************************/
362 static void ks0127_reset(struct ks0127* ks)
363 {
364 int i;
365 u8 *table = reg_defaults;
366
367 ks->ks_type = KS_TYPE_UNKNOWN;
368
369 dprintk("ks0127: reset\n");
370 msleep(1);
371
372 /* initialize all registers to known values */
373 /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
374
375 for(i = 1; i < 33; i++)
376 ks0127_write(ks, i, table[i]);
377
378 for(i = 35; i < 40; i++)
379 ks0127_write(ks, i, table[i]);
380
381 for(i = 41; i < 56; i++)
382 ks0127_write(ks, i, table[i]);
383
384 for(i = 58; i < 64; i++)
385 ks0127_write(ks, i, table[i]);
386
387
388 if ((ks0127_read(ks, KS_STAT) & 0x80) == 0) {
389 ks->ks_type = KS_TYPE_0122S;
390 dprintk("ks0127: ks0122s Found\n");
391 return;
392 }
393
394 switch(ks0127_read(ks, KS_CMDE) & 0x0f) {
395
396 case 0:
397 ks->ks_type = KS_TYPE_0127;
398 dprintk("ks0127: ks0127 found\n");
399 break;
400
401 case 9:
402 ks->ks_type = KS_TYPE_0127B;
403 dprintk("ks0127: ks0127B Revision A found\n");
404 break;
405
406 default:
407 dprintk("ks0127: unknown revision\n");
408 break;
409 }
410 }
411
412 static int ks0127_command(struct i2c_client *client,
413 unsigned int cmd, void *arg)
414 {
415 struct ks0127 *ks = i2c_get_clientdata(client);
416
417 int *iarg = (int*)arg;
418
419 int status;
420
421 if (!ks)
422 return -ENODEV;
423
424 switch (cmd) {
425
426 case DECODER_INIT:
427 dprintk("ks0127: command DECODER_INIT\n");
428 ks0127_reset(ks);
429 break;
430
431 case DECODER_SET_INPUT:
432 switch(*iarg) {
433 case KS_INPUT_COMPOSITE_1:
434 case KS_INPUT_COMPOSITE_2:
435 case KS_INPUT_COMPOSITE_3:
436 case KS_INPUT_COMPOSITE_4:
437 case KS_INPUT_COMPOSITE_5:
438 case KS_INPUT_COMPOSITE_6:
439 dprintk("ks0127: command DECODER_SET_INPUT %d: "
440 "Composite\n", *iarg);
441 /* autodetect 50/60 Hz */
442 ks0127_and_or(ks, KS_CMDA, 0xfc, 0x00);
443 /* VSE=0 */
444 ks0127_and_or(ks, KS_CMDA, ~0x40, 0x00);
445 /* set input line */
446 ks0127_and_or(ks, KS_CMDB, 0xb0, *iarg);
447 /* non-freerunning mode */
448 ks0127_and_or(ks, KS_CMDC, 0x70, 0x0a);
449 /* analog input */
450 ks0127_and_or(ks, KS_CMDD, 0x03, 0x00);
451 /* enable chroma demodulation */
452 ks0127_and_or(ks, KS_CTRACK, 0xcf, 0x00);
453 /* chroma trap, HYBWR=1 */
454 ks0127_and_or(ks, KS_LUMA, 0x00,
455 (reg_defaults[KS_LUMA])|0x0c);
456 /* scaler fullbw, luma comb off */
457 ks0127_and_or(ks, KS_VERTIA, 0x08, 0x81);
458 /* manual chroma comb .25 .5 .25 */
459 ks0127_and_or(ks, KS_VERTIC, 0x0f, 0x90);
460
461 /* chroma path delay */
462 ks0127_and_or(ks, KS_CHROMB, 0x0f, 0x90);
463
464 ks0127_write(ks, KS_UGAIN, reg_defaults[KS_UGAIN]);
465 ks0127_write(ks, KS_VGAIN, reg_defaults[KS_VGAIN]);
466 ks0127_write(ks, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
467 ks0127_write(ks, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
468 break;
469
470 case KS_INPUT_SVIDEO_1:
471 case KS_INPUT_SVIDEO_2:
472 case KS_INPUT_SVIDEO_3:
473 dprintk("ks0127: command DECODER_SET_INPUT %d: "
474 "S-Video\n", *iarg);
475 /* autodetect 50/60 Hz */
476 ks0127_and_or(ks, KS_CMDA, 0xfc, 0x00);
477 /* VSE=0 */
478 ks0127_and_or(ks, KS_CMDA, ~0x40, 0x00);
479 /* set input line */
480 ks0127_and_or(ks, KS_CMDB, 0xb0, *iarg);
481 /* non-freerunning mode */
482 ks0127_and_or(ks, KS_CMDC, 0x70, 0x0a);
483 /* analog input */
484 ks0127_and_or(ks, KS_CMDD, 0x03, 0x00);
485 /* enable chroma demodulation */
486 ks0127_and_or(ks, KS_CTRACK, 0xcf, 0x00);
487 ks0127_and_or(ks, KS_LUMA, 0x00,
488 reg_defaults[KS_LUMA]);
489 /* disable luma comb */
490 ks0127_and_or(ks, KS_VERTIA, 0x08,
491 (reg_defaults[KS_VERTIA]&0xf0)|0x01);
492 ks0127_and_or(ks, KS_VERTIC, 0x0f,
493 reg_defaults[KS_VERTIC]&0xf0);
494
495 ks0127_and_or(ks, KS_CHROMB, 0x0f,
496 reg_defaults[KS_CHROMB]&0xf0);
497
498 ks0127_write(ks, KS_UGAIN, reg_defaults[KS_UGAIN]);
499 ks0127_write(ks, KS_VGAIN, reg_defaults[KS_VGAIN]);
500 ks0127_write(ks, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
501 ks0127_write(ks, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
502 break;
503
504 case KS_INPUT_YUV656:
505 dprintk("ks0127: command DECODER_SET_INPUT 15: "
506 "YUV656\n");
507 if (ks->norm == VIDEO_MODE_NTSC ||
508 ks->norm == KS_STD_PAL_M)
509 /* force 60 Hz */
510 ks0127_and_or(ks, KS_CMDA, 0xfc, 0x03);
511 else
512 /* force 50 Hz */
513 ks0127_and_or(ks, KS_CMDA, 0xfc, 0x02);
514
515 ks0127_and_or(ks, KS_CMDA, 0xff, 0x40); /* VSE=1 */
516 /* set input line and VALIGN */
517 ks0127_and_or(ks, KS_CMDB, 0xb0, (*iarg | 0x40));
518 /* freerunning mode, */
519 /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/
520 ks0127_and_or(ks, KS_CMDC, 0x70, 0x87);
521 /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
522 ks0127_and_or(ks, KS_CMDD, 0x03, 0x08);
523 /* disable chroma demodulation */
524 ks0127_and_or(ks, KS_CTRACK, 0xcf, 0x30);
525 /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
526 ks0127_and_or(ks, KS_LUMA, 0x00, 0x71);
527 ks0127_and_or(ks, KS_VERTIC, 0x0f,
528 reg_defaults[KS_VERTIC]&0xf0);
529
530 /* scaler fullbw, luma comb off */
531 ks0127_and_or(ks, KS_VERTIA, 0x08, 0x81);
532
533 ks0127_and_or(ks, KS_CHROMB, 0x0f,
534 reg_defaults[KS_CHROMB]&0xf0);
535
536 ks0127_and_or(ks, KS_CON, 0x00, 0x00);
537 ks0127_and_or(ks, KS_BRT, 0x00, 32); /* spec: 34 */
538 /* spec: 229 (e5) */
539 ks0127_and_or(ks, KS_SAT, 0x00, 0xe8);
540 ks0127_and_or(ks, KS_HUE, 0x00, 0);
541
542 ks0127_and_or(ks, KS_UGAIN, 0x00, 238);
543 ks0127_and_or(ks, KS_VGAIN, 0x00, 0x00);
544
545 /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
546 ks0127_and_or(ks, KS_UVOFFH, 0x00, 0x4f);
547 ks0127_and_or(ks, KS_UVOFFL, 0x00, 0x00);
548 break;
549
550 default:
551 dprintk("ks0127: command DECODER_SET_INPUT: "
552 "Unknown input %d\n", *iarg);
553 break;
554 }
555
556 /* hack: CDMLPF sometimes spontaneously switches on; */
557 /* force back off */
558 ks0127_write(ks, KS_DEMOD, reg_defaults[KS_DEMOD]);
559 break;
560
561 case DECODER_SET_OUTPUT:
562 switch(*iarg) {
563 case KS_OUTPUT_YUV656E:
564 dprintk("ks0127: command DECODER_SET_OUTPUT: "
565 "OUTPUT_YUV656E (Missing)\n");
566 return -EINVAL;
567 break;
568
569 case KS_OUTPUT_EXV:
570 dprintk("ks0127: command DECODER_SET_OUTPUT: "
571 "OUTPUT_EXV\n");
572 ks0127_and_or(ks, KS_OFMTA, 0xf0, 0x09);
573 break;
574 }
575 break;
576
577 case DECODER_SET_NORM: //sam This block mixes old and new norm names...
578 /* Set to automatic SECAM/Fsc mode */
579 ks0127_and_or(ks, KS_DEMOD, 0xf0, 0x00);
580
581 ks->norm = *iarg;
582 switch(*iarg)
583 {
584 /* this is untested !! */
585 /* It just detects PAL_N/NTSC_M (no special frequencies) */
586 /* And you have to set the standard a second time afterwards */
587 case VIDEO_MODE_AUTO:
588 dprintk("ks0127: command DECODER_SET_NORM: AUTO\n");
589
590 /* The chip determines the format */
591 /* based on the current field rate */
592 ks0127_and_or(ks, KS_CMDA, 0xfc, 0x00);
593 ks0127_and_or(ks, KS_CHROMA, 0x9f, 0x20);
594 /* This is wrong for PAL ! As I said, */
595 /* you need to set the standard once again !! */
596 ks->format_height = 240;
597 ks->format_width = 704;
598 break;
599
600 case VIDEO_MODE_NTSC:
601 dprintk("ks0127: command DECODER_SET_NORM: NTSC_M\n");
602 ks0127_and_or(ks, KS_CHROMA, 0x9f, 0x20);
603 ks->format_height = 240;
604 ks->format_width = 704;
605 break;
606
607 case KS_STD_NTSC_N:
608 dprintk("ks0127: command KS0127_SET_STANDARD: "
609 "NTSC_N (fixme)\n");
610 ks0127_and_or(ks, KS_CHROMA, 0x9f, 0x40);
611 ks->format_height = 240;
612 ks->format_width = 704;
613 break;
614
615 case VIDEO_MODE_PAL:
616 dprintk("ks0127: command DECODER_SET_NORM: PAL_N\n");
617 ks0127_and_or(ks, KS_CHROMA, 0x9f, 0x20);
618 ks->format_height = 290;
619 ks->format_width = 704;
620 break;
621
622 case KS_STD_PAL_M:
623 dprintk("ks0127: command KS0127_SET_STANDARD: "
624 "PAL_M (fixme)\n");
625 ks0127_and_or(ks, KS_CHROMA, 0x9f, 0x40);
626 ks->format_height = 290;
627 ks->format_width = 704;
628 break;
629
630 case VIDEO_MODE_SECAM:
631 dprintk("ks0127: command KS0127_SET_STANDARD: "
632 "SECAM\n");
633 ks->format_height = 290;
634 ks->format_width = 704;
635
636 /* set to secam autodetection */
637 ks0127_and_or(ks, KS_CHROMA, 0xdf, 0x20);
638 ks0127_and_or(ks, KS_DEMOD, 0xf0, 0x00);
639 schedule_timeout_interruptible(HZ/10+1);
640
641 /* did it autodetect? */
642 if (ks0127_read(ks, KS_DEMOD) & 0x40)
643 break;
644
645 /* force to secam mode */
646 ks0127_and_or(ks, KS_DEMOD, 0xf0, 0x0f);
647 break;
648
649 default:
650 dprintk("ks0127: command DECODER_SET_NORM: "
651 "Unknown norm %d\n", *iarg);
652 break;
653 }
654 break;
655
656 case DECODER_SET_PICTURE:
657 dprintk("ks0127: command DECODER_SET_PICTURE "
658 "not yet supported (fixme)\n");
659 return -EINVAL;
660
661 //sam todo: KS0127_SET_BRIGHTNESS: Merge into DECODER_SET_PICTURE
662 //sam todo: KS0127_SET_CONTRAST: Merge into DECODER_SET_PICTURE
663 //sam todo: KS0127_SET_HUE: Merge into DECODER_SET_PICTURE?
664 //sam todo: KS0127_SET_SATURATION: Merge into DECODER_SET_PICTURE
665 //sam todo: KS0127_SET_AGC_MODE:
666 //sam todo: KS0127_SET_AGC:
667 //sam todo: KS0127_SET_CHROMA_MODE:
668 //sam todo: KS0127_SET_PIXCLK_MODE:
669 //sam todo: KS0127_SET_GAMMA_MODE:
670 //sam todo: KS0127_SET_UGAIN:
671 //sam todo: KS0127_SET_VGAIN:
672 //sam todo: KS0127_SET_INVALY:
673 //sam todo: KS0127_SET_INVALU:
674 //sam todo: KS0127_SET_INVALV:
675 //sam todo: KS0127_SET_UNUSEY:
676 //sam todo: KS0127_SET_UNUSEU:
677 //sam todo: KS0127_SET_UNUSEV:
678 //sam todo: KS0127_SET_VSALIGN_MODE:
679
680 case DECODER_ENABLE_OUTPUT:
681 {
682
683 int *iarg = arg;
684 int enable = (*iarg != 0);
685 if (enable) {
686 dprintk("ks0127: command "
687 "DECODER_ENABLE_OUTPUT on "
688 "(%d)\n", enable);
689 /* All output pins on */
690 ks0127_and_or(ks, KS_OFMTA, 0xcf, 0x30);
691 /* Obey the OEN pin */
692 ks0127_and_or(ks, KS_CDEM, 0x7f, 0x00);
693 } else {
694 dprintk("ks0127: command "
695 "DECODER_ENABLE_OUTPUT off "
696 "(%d)\n", enable);
697 /* Video output pins off */
698 ks0127_and_or(ks, KS_OFMTA, 0xcf, 0x00);
699 /* Ignore the OEN pin */
700 ks0127_and_or(ks, KS_CDEM, 0x7f, 0x80);
701 }
702 }
703 break;
704
705 //sam todo: KS0127_SET_OUTPUT_MODE:
706 //sam todo: KS0127_SET_WIDTH:
707 //sam todo: KS0127_SET_HEIGHT:
708 //sam todo: KS0127_SET_HSCALE:
709
710 case DECODER_GET_STATUS:
711 dprintk("ks0127: command DECODER_GET_STATUS\n");
712 *iarg = 0;
713 status = ks0127_read(ks, KS_STAT);
714 if (!(status & 0x20)) /* NOVID not set */
715 *iarg = (*iarg | DECODER_STATUS_GOOD);
716 if ((status & 0x01)) /* CLOCK set */
717 *iarg = (*iarg | DECODER_STATUS_COLOR);
718 if ((status & 0x08)) /* PALDET set */
719 *iarg = (*iarg | DECODER_STATUS_PAL);
720 else
721 *iarg = (*iarg | DECODER_STATUS_NTSC);
722 break;
723
724 //Catch any unknown command
725 default:
726 dprintk("ks0127: command unknown: %04X\n", cmd);
727 return -EINVAL;
728 }
729 return 0;
730 }
731
732
733
734
735 static int ks0127_probe(struct i2c_adapter *adapter);
736 static int ks0127_detach(struct i2c_client *client);
737 static int ks0127_command(struct i2c_client *client,
738 unsigned int cmd, void *arg);
739
740
741
742 /* Addresses to scan */
743 static unsigned short normal_i2c[] = {I2C_KS0127_ADDON>>1,
744 I2C_KS0127_ONBOARD>>1, I2C_CLIENT_END};
745 static unsigned short probe[2] = {I2C_CLIENT_END, I2C_CLIENT_END};
746 static unsigned short ignore[2] = {I2C_CLIENT_END, I2C_CLIENT_END};
747 static struct i2c_client_address_data addr_data = {
748 normal_i2c,
749 probe,
750 ignore,
751 };
752
753 static struct i2c_driver i2c_driver_ks0127 = {
754 .driver.name = "ks0127",
755 .id = I2C_DRIVERID_KS0127,
756 .attach_adapter = ks0127_probe,
757 .detach_client = ks0127_detach,
758 .command = ks0127_command
759 };
760
761 static struct i2c_client ks0127_client_tmpl =
762 {
763 .name = "(ks0127 unset)",
764 .addr = 0,
765 .adapter = NULL,
766 .driver = &i2c_driver_ks0127,
767 };
768
769 static int ks0127_found_proc(struct i2c_adapter *adapter, int addr, int kind)
770 {
771 struct ks0127 *ks;
772 struct i2c_client *client;
773
774 client = kzalloc(sizeof(*client), GFP_KERNEL);
775 if (client == NULL)
776 return -ENOMEM;
777 memcpy(client, &ks0127_client_tmpl, sizeof(*client));
778
779 ks = kzalloc(sizeof(*ks), GFP_KERNEL);
780 if (ks == NULL) {
781 kfree(client);
782 return -ENOMEM;
783 }
784
785 i2c_set_clientdata(client, ks);
786 client->adapter = adapter;
787 client->addr = addr;
788 sprintf(client->name, "ks0127-%02x", adapter->id);
789
790 ks->client = client;
791 ks->addr = addr;
792 ks->ks_type = KS_TYPE_UNKNOWN;
793
794 /* power up */
795 ks0127_write(ks, KS_CMDA, 0x2c);
796 mdelay(10);
797
798 /* reset the device */
799 ks0127_reset(ks);
800 printk(KERN_INFO "ks0127: attach: %s video decoder\n",
801 ks->addr==(I2C_KS0127_ADDON>>1) ? "addon" : "on-board");
802
803 i2c_attach_client(client);
804 return 0;
805 }
806
807
808 static int ks0127_probe(struct i2c_adapter *adapter)
809 {
810 if (adapter->id == I2C_HW_B_ZR36067)
811 return i2c_probe(adapter, &addr_data, ks0127_found_proc);
812 return 0;
813 }
814
815 static int ks0127_detach(struct i2c_client *client)
816 {
817 struct ks0127 *ks = i2c_get_clientdata(client);
818
819 ks0127_write(ks, KS_OFMTA, 0x20); /*tristate*/
820 ks0127_write(ks, KS_CMDA, 0x2c | 0x80); /* power down */
821
822 i2c_detach_client(client);
823 kfree(ks);
824 kfree(client);
825
826 dprintk("ks0127: detach\n");
827 return 0;
828 }
829
830
831 static int __devinit ks0127_init_module(void)
832 {
833 init_reg_defaults();
834 return i2c_add_driver(&i2c_driver_ks0127);
835 }
836
837 static void __devexit ks0127_cleanup_module(void)
838 {
839 i2c_del_driver(&i2c_driver_ks0127);
840 }
841
842
843 module_init(ks0127_init_module);
844 module_exit(ks0127_cleanup_module);
WRT350N Kernel Patches