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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[wrt350n-kernel.git] / drivers / media / video / ov7670.c
blob2bc6bdc9c1f2c50eb966aa2fd127a13cc2d8090d
1 /*
2 * A V4L2 driver for OmniVision OV7670 cameras.
3 *
4 * Copyright 2006 One Laptop Per Child Association, Inc. Written
5 * by Jonathan Corbet with substantial inspiration from Mark
6 * McClelland's ovcamchip code.
7 *
8 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
9 *
10 * This file may be distributed under the terms of the GNU General
11 * Public License, version 2.
12 */
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/videodev.h>
18 #include <media/v4l2-common.h>
19 #include <media/v4l2-chip-ident.h>
20 #include <linux/i2c.h>
21
22
23 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
24 MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
25 MODULE_LICENSE("GPL");
26
27 /*
28 * Basic window sizes. These probably belong somewhere more globally
29 * useful.
30 */
31 #define VGA_WIDTH 640
32 #define VGA_HEIGHT 480
33 #define QVGA_WIDTH 320
34 #define QVGA_HEIGHT 240
35 #define CIF_WIDTH 352
36 #define CIF_HEIGHT 288
37 #define QCIF_WIDTH 176
38 #define QCIF_HEIGHT 144
39
40 /*
41 * Our nominal (default) frame rate.
42 */
43 #define OV7670_FRAME_RATE 30
44
45 /*
46 * The 7670 sits on i2c with ID 0x42
47 */
48 #define OV7670_I2C_ADDR 0x42
49
50 /* Registers */
51 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
52 #define REG_BLUE 0x01 /* blue gain */
53 #define REG_RED 0x02 /* red gain */
54 #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
55 #define REG_COM1 0x04 /* Control 1 */
56 #define COM1_CCIR656 0x40 /* CCIR656 enable */
57 #define REG_BAVE 0x05 /* U/B Average level */
58 #define REG_GbAVE 0x06 /* Y/Gb Average level */
59 #define REG_AECHH 0x07 /* AEC MS 5 bits */
60 #define REG_RAVE 0x08 /* V/R Average level */
61 #define REG_COM2 0x09 /* Control 2 */
62 #define COM2_SSLEEP 0x10 /* Soft sleep mode */
63 #define REG_PID 0x0a /* Product ID MSB */
64 #define REG_VER 0x0b /* Product ID LSB */
65 #define REG_COM3 0x0c /* Control 3 */
66 #define COM3_SWAP 0x40 /* Byte swap */
67 #define COM3_SCALEEN 0x08 /* Enable scaling */
68 #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
69 #define REG_COM4 0x0d /* Control 4 */
70 #define REG_COM5 0x0e /* All "reserved" */
71 #define REG_COM6 0x0f /* Control 6 */
72 #define REG_AECH 0x10 /* More bits of AEC value */
73 #define REG_CLKRC 0x11 /* Clocl control */
74 #define CLK_EXT 0x40 /* Use external clock directly */
75 #define CLK_SCALE 0x3f /* Mask for internal clock scale */
76 #define REG_COM7 0x12 /* Control 7 */
77 #define COM7_RESET 0x80 /* Register reset */
78 #define COM7_FMT_MASK 0x38
79 #define COM7_FMT_VGA 0x00
80 #define COM7_FMT_CIF 0x20 /* CIF format */
81 #define COM7_FMT_QVGA 0x10 /* QVGA format */
82 #define COM7_FMT_QCIF 0x08 /* QCIF format */
83 #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
84 #define COM7_YUV 0x00 /* YUV */
85 #define COM7_BAYER 0x01 /* Bayer format */
86 #define COM7_PBAYER 0x05 /* "Processed bayer" */
87 #define REG_COM8 0x13 /* Control 8 */
88 #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
89 #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
90 #define COM8_BFILT 0x20 /* Band filter enable */
91 #define COM8_AGC 0x04 /* Auto gain enable */
92 #define COM8_AWB 0x02 /* White balance enable */
93 #define COM8_AEC 0x01 /* Auto exposure enable */
94 #define REG_COM9 0x14 /* Control 9 - gain ceiling */
95 #define REG_COM10 0x15 /* Control 10 */
96 #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
97 #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
98 #define COM10_HREF_REV 0x08 /* Reverse HREF */
99 #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
100 #define COM10_VS_NEG 0x02 /* VSYNC negative */
101 #define COM10_HS_NEG 0x01 /* HSYNC negative */
102 #define REG_HSTART 0x17 /* Horiz start high bits */
103 #define REG_HSTOP 0x18 /* Horiz stop high bits */
104 #define REG_VSTART 0x19 /* Vert start high bits */
105 #define REG_VSTOP 0x1a /* Vert stop high bits */
106 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
107 #define REG_MIDH 0x1c /* Manuf. ID high */
108 #define REG_MIDL 0x1d /* Manuf. ID low */
109 #define REG_MVFP 0x1e /* Mirror / vflip */
110 #define MVFP_MIRROR 0x20 /* Mirror image */
111 #define MVFP_FLIP 0x10 /* Vertical flip */
112
113 #define REG_AEW 0x24 /* AGC upper limit */
114 #define REG_AEB 0x25 /* AGC lower limit */
115 #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
116 #define REG_HSYST 0x30 /* HSYNC rising edge delay */
117 #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
118 #define REG_HREF 0x32 /* HREF pieces */
119 #define REG_TSLB 0x3a /* lots of stuff */
120 #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
121 #define REG_COM11 0x3b /* Control 11 */
122 #define COM11_NIGHT 0x80 /* NIght mode enable */
123 #define COM11_NMFR 0x60 /* Two bit NM frame rate */
124 #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
125 #define COM11_50HZ 0x08 /* Manual 50Hz select */
126 #define COM11_EXP 0x02
127 #define REG_COM12 0x3c /* Control 12 */
128 #define COM12_HREF 0x80 /* HREF always */
129 #define REG_COM13 0x3d /* Control 13 */
130 #define COM13_GAMMA 0x80 /* Gamma enable */
131 #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
132 #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
133 #define REG_COM14 0x3e /* Control 14 */
134 #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
135 #define REG_EDGE 0x3f /* Edge enhancement factor */
136 #define REG_COM15 0x40 /* Control 15 */
137 #define COM15_R10F0 0x00 /* Data range 10 to F0 */
138 #define COM15_R01FE 0x80 /* 01 to FE */
139 #define COM15_R00FF 0xc0 /* 00 to FF */
140 #define COM15_RGB565 0x10 /* RGB565 output */
141 #define COM15_RGB555 0x30 /* RGB555 output */
142 #define REG_COM16 0x41 /* Control 16 */
143 #define COM16_AWBGAIN 0x08 /* AWB gain enable */
144 #define REG_COM17 0x42 /* Control 17 */
145 #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
146 #define COM17_CBAR 0x08 /* DSP Color bar */
147
148 /*
149 * This matrix defines how the colors are generated, must be
150 * tweaked to adjust hue and saturation.
151 *
152 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
153 *
154 * They are nine-bit signed quantities, with the sign bit
155 * stored in 0x58. Sign for v-red is bit 0, and up from there.
156 */
157 #define REG_CMATRIX_BASE 0x4f
158 #define CMATRIX_LEN 6
159 #define REG_CMATRIX_SIGN 0x58
160
161
162 #define REG_BRIGHT 0x55 /* Brightness */
163 #define REG_CONTRAS 0x56 /* Contrast control */
164
165 #define REG_GFIX 0x69 /* Fix gain control */
166
167 #define REG_REG76 0x76 /* OV's name */
168 #define R76_BLKPCOR 0x80 /* Black pixel correction enable */
169 #define R76_WHTPCOR 0x40 /* White pixel correction enable */
170
171 #define REG_RGB444 0x8c /* RGB 444 control */
172 #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
173 #define R444_RGBX 0x01 /* Empty nibble at end */
174
175 #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
176 #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
177
178 #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
179 #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
180 #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
181 #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
182 #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
183 #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
184 #define REG_BD60MAX 0xab /* 60hz banding step limit */
185
186
187 /*
188 * Information we maintain about a known sensor.
189 */
190 struct ov7670_format_struct; /* coming later */
191 struct ov7670_info {
192 struct ov7670_format_struct *fmt; /* Current format */
193 unsigned char sat; /* Saturation value */
194 int hue; /* Hue value */
195 };
196
197
198
199
200 /*
201 * The default register settings, as obtained from OmniVision. There
202 * is really no making sense of most of these - lots of "reserved" values
203 * and such.
204 *
205 * These settings give VGA YUYV.
206 */
207
208 struct regval_list {
209 unsigned char reg_num;
210 unsigned char value;
211 };
212
213 static struct regval_list ov7670_default_regs[] = {
214 { REG_COM7, COM7_RESET },
215 /*
216 * Clock scale: 3 = 15fps
217 * 2 = 20fps
218 * 1 = 30fps
219 */
220 { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
221 { REG_TSLB, 0x04 }, /* OV */
222 { REG_COM7, 0 }, /* VGA */
223 /*
224 * Set the hardware window. These values from OV don't entirely
225 * make sense - hstop is less than hstart. But they work...
226 */
227 { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
228 { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
229 { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
230
231 { REG_COM3, 0 }, { REG_COM14, 0 },
232 /* Mystery scaling numbers */
233 { 0x70, 0x3a }, { 0x71, 0x35 },
234 { 0x72, 0x11 }, { 0x73, 0xf0 },
235 { 0xa2, 0x02 }, { REG_COM10, 0x0 },
236
237 /* Gamma curve values */
238 { 0x7a, 0x20 }, { 0x7b, 0x10 },
239 { 0x7c, 0x1e }, { 0x7d, 0x35 },
240 { 0x7e, 0x5a }, { 0x7f, 0x69 },
241 { 0x80, 0x76 }, { 0x81, 0x80 },
242 { 0x82, 0x88 }, { 0x83, 0x8f },
243 { 0x84, 0x96 }, { 0x85, 0xa3 },
244 { 0x86, 0xaf }, { 0x87, 0xc4 },
245 { 0x88, 0xd7 }, { 0x89, 0xe8 },
246
247 /* AGC and AEC parameters. Note we start by disabling those features,
248 then turn them only after tweaking the values. */
249 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
250 { REG_GAIN, 0 }, { REG_AECH, 0 },
251 { REG_COM4, 0x40 }, /* magic reserved bit */
252 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
253 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
254 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
255 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
256 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
257 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
258 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
259 { REG_HAECC7, 0x94 },
260 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
261
262 /* Almost all of these are magic "reserved" values. */
263 { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
264 { 0x16, 0x02 }, { REG_MVFP, 0x07 },
265 { 0x21, 0x02 }, { 0x22, 0x91 },
266 { 0x29, 0x07 }, { 0x33, 0x0b },
267 { 0x35, 0x0b }, { 0x37, 0x1d },
268 { 0x38, 0x71 }, { 0x39, 0x2a },
269 { REG_COM12, 0x78 }, { 0x4d, 0x40 },
270 { 0x4e, 0x20 }, { REG_GFIX, 0 },
271 { 0x6b, 0x4a }, { 0x74, 0x10 },
272 { 0x8d, 0x4f }, { 0x8e, 0 },
273 { 0x8f, 0 }, { 0x90, 0 },
274 { 0x91, 0 }, { 0x96, 0 },
275 { 0x9a, 0 }, { 0xb0, 0x84 },
276 { 0xb1, 0x0c }, { 0xb2, 0x0e },
277 { 0xb3, 0x82 }, { 0xb8, 0x0a },
278
279 /* More reserved magic, some of which tweaks white balance */
280 { 0x43, 0x0a }, { 0x44, 0xf0 },
281 { 0x45, 0x34 }, { 0x46, 0x58 },
282 { 0x47, 0x28 }, { 0x48, 0x3a },
283 { 0x59, 0x88 }, { 0x5a, 0x88 },
284 { 0x5b, 0x44 }, { 0x5c, 0x67 },
285 { 0x5d, 0x49 }, { 0x5e, 0x0e },
286 { 0x6c, 0x0a }, { 0x6d, 0x55 },
287 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
288 { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
289 { REG_RED, 0x60 },
290 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
291
292 /* Matrix coefficients */
293 { 0x4f, 0x80 }, { 0x50, 0x80 },
294 { 0x51, 0 }, { 0x52, 0x22 },
295 { 0x53, 0x5e }, { 0x54, 0x80 },
296 { 0x58, 0x9e },
297
298 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
299 { 0x75, 0x05 }, { 0x76, 0xe1 },
300 { 0x4c, 0 }, { 0x77, 0x01 },
301 { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
302 { 0xc9, 0x60 }, { REG_COM16, 0x38 },
303 { 0x56, 0x40 },
304
305 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
306 { 0xa4, 0x88 }, { 0x96, 0 },
307 { 0x97, 0x30 }, { 0x98, 0x20 },
308 { 0x99, 0x30 }, { 0x9a, 0x84 },
309 { 0x9b, 0x29 }, { 0x9c, 0x03 },
310 { 0x9d, 0x4c }, { 0x9e, 0x3f },
311 { 0x78, 0x04 },
312
313 /* Extra-weird stuff. Some sort of multiplexor register */
314 { 0x79, 0x01 }, { 0xc8, 0xf0 },
315 { 0x79, 0x0f }, { 0xc8, 0x00 },
316 { 0x79, 0x10 }, { 0xc8, 0x7e },
317 { 0x79, 0x0a }, { 0xc8, 0x80 },
318 { 0x79, 0x0b }, { 0xc8, 0x01 },
319 { 0x79, 0x0c }, { 0xc8, 0x0f },
320 { 0x79, 0x0d }, { 0xc8, 0x20 },
321 { 0x79, 0x09 }, { 0xc8, 0x80 },
322 { 0x79, 0x02 }, { 0xc8, 0xc0 },
323 { 0x79, 0x03 }, { 0xc8, 0x40 },
324 { 0x79, 0x05 }, { 0xc8, 0x30 },
325 { 0x79, 0x26 },
326
327 { 0xff, 0xff }, /* END MARKER */
328 };
329
330
331 /*
332 * Here we'll try to encapsulate the changes for just the output
333 * video format.
334 *
335 * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
336 *
337 * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
338 */
339
340
341 static struct regval_list ov7670_fmt_yuv422[] = {
342 { REG_COM7, 0x0 }, /* Selects YUV mode */
343 { REG_RGB444, 0 }, /* No RGB444 please */
344 { REG_COM1, 0 },
345 { REG_COM15, COM15_R00FF },
346 { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
347 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
348 { 0x50, 0x80 }, /* "matrix coefficient 2" */
349 { 0x51, 0 }, /* vb */
350 { 0x52, 0x22 }, /* "matrix coefficient 4" */
351 { 0x53, 0x5e }, /* "matrix coefficient 5" */
352 { 0x54, 0x80 }, /* "matrix coefficient 6" */
353 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
354 { 0xff, 0xff },
355 };
356
357 static struct regval_list ov7670_fmt_rgb565[] = {
358 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
359 { REG_RGB444, 0 }, /* No RGB444 please */
360 { REG_COM1, 0x0 },
361 { REG_COM15, COM15_RGB565 },
362 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
363 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
364 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
365 { 0x51, 0 }, /* vb */
366 { 0x52, 0x3d }, /* "matrix coefficient 4" */
367 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
368 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
369 { REG_COM13, COM13_GAMMA|COM13_UVSAT },
370 { 0xff, 0xff },
371 };
372
373 static struct regval_list ov7670_fmt_rgb444[] = {
374 { REG_COM7, COM7_RGB }, /* Selects RGB mode */
375 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
376 { REG_COM1, 0x40 }, /* Magic reserved bit */
377 { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
378 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
379 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
380 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
381 { 0x51, 0 }, /* vb */
382 { 0x52, 0x3d }, /* "matrix coefficient 4" */
383 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
384 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
385 { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
386 { 0xff, 0xff },
387 };
388
389 static struct regval_list ov7670_fmt_raw[] = {
390 { REG_COM7, COM7_BAYER },
391 { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */
392 { REG_COM16, 0x3d }, /* Edge enhancement, denoise */
393 { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */
394 { 0xff, 0xff },
395 };
396
397
398
399 /*
400 * Low-level register I/O.
401 */
402
403 static int ov7670_read(struct i2c_client *c, unsigned char reg,
404 unsigned char *value)
405 {
406 int ret;
407
408 ret = i2c_smbus_read_byte_data(c, reg);
409 if (ret >= 0)
410 *value = (unsigned char) ret;
411 return ret;
412 }
413
414
415 static int ov7670_write(struct i2c_client *c, unsigned char reg,
416 unsigned char value)
417 {
418 int ret = i2c_smbus_write_byte_data(c, reg, value);
419 if (reg == REG_COM7 && (value & COM7_RESET))
420 msleep(2); /* Wait for reset to run */
421 return ret;
422 }
423
424
425 /*
426 * Write a list of register settings; ff/ff stops the process.
427 */
428 static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
429 {
430 while (vals->reg_num != 0xff || vals->value != 0xff) {
431 int ret = ov7670_write(c, vals->reg_num, vals->value);
432 if (ret < 0)
433 return ret;
434 vals++;
435 }
436 return 0;
437 }
438
439
440 /*
441 * Stuff that knows about the sensor.
442 */
443 static void ov7670_reset(struct i2c_client *client)
444 {
445 ov7670_write(client, REG_COM7, COM7_RESET);
446 msleep(1);
447 }
448
449
450 static int ov7670_init(struct i2c_client *client)
451 {
452 return ov7670_write_array(client, ov7670_default_regs);
453 }
454
455
456
457 static int ov7670_detect(struct i2c_client *client)
458 {
459 unsigned char v;
460 int ret;
461
462 ret = ov7670_init(client);
463 if (ret < 0)
464 return ret;
465 ret = ov7670_read(client, REG_MIDH, &v);
466 if (ret < 0)
467 return ret;
468 if (v != 0x7f) /* OV manuf. id. */
469 return -ENODEV;
470 ret = ov7670_read(client, REG_MIDL, &v);
471 if (ret < 0)
472 return ret;
473 if (v != 0xa2)
474 return -ENODEV;
475 /*
476 * OK, we know we have an OmniVision chip...but which one?
477 */
478 ret = ov7670_read(client, REG_PID, &v);
479 if (ret < 0)
480 return ret;
481 if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
482 return -ENODEV;
483 ret = ov7670_read(client, REG_VER, &v);
484 if (ret < 0)
485 return ret;
486 if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
487 return -ENODEV;
488 return 0;
489 }
490
491
492 /*
493 * Store information about the video data format. The color matrix
494 * is deeply tied into the format, so keep the relevant values here.
495 * The magic matrix nubmers come from OmniVision.
496 */
497 static struct ov7670_format_struct {
498 __u8 *desc;
499 __u32 pixelformat;
500 struct regval_list *regs;
501 int cmatrix[CMATRIX_LEN];
502 int bpp; /* Bytes per pixel */
503 } ov7670_formats[] = {
504 {
505 .desc = "YUYV 4:2:2",
506 .pixelformat = V4L2_PIX_FMT_YUYV,
507 .regs = ov7670_fmt_yuv422,
508 .cmatrix = { 128, -128, 0, -34, -94, 128 },
509 .bpp = 2,
510 },
511 {
512 .desc = "RGB 444",
513 .pixelformat = V4L2_PIX_FMT_RGB444,
514 .regs = ov7670_fmt_rgb444,
515 .cmatrix = { 179, -179, 0, -61, -176, 228 },
516 .bpp = 2,
517 },
518 {
519 .desc = "RGB 565",
520 .pixelformat = V4L2_PIX_FMT_RGB565,
521 .regs = ov7670_fmt_rgb565,
522 .cmatrix = { 179, -179, 0, -61, -176, 228 },
523 .bpp = 2,
524 },
525 {
526 .desc = "Raw RGB Bayer",
527 .pixelformat = V4L2_PIX_FMT_SBGGR8,
528 .regs = ov7670_fmt_raw,
529 .cmatrix = { 0, 0, 0, 0, 0, 0 },
530 .bpp = 1
531 },
532 };
533 #define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats)
534
535
536 /*
537 * Then there is the issue of window sizes. Try to capture the info here.
538 */
539
540 /*
541 * QCIF mode is done (by OV) in a very strange way - it actually looks like
542 * VGA with weird scaling options - they do *not* use the canned QCIF mode
543 * which is allegedly provided by the sensor. So here's the weird register
544 * settings.
545 */
546 static struct regval_list ov7670_qcif_regs[] = {
547 { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
548 { REG_COM3, COM3_DCWEN },
549 { REG_COM14, COM14_DCWEN | 0x01},
550 { 0x73, 0xf1 },
551 { 0xa2, 0x52 },
552 { 0x7b, 0x1c },
553 { 0x7c, 0x28 },
554 { 0x7d, 0x3c },
555 { 0x7f, 0x69 },
556 { REG_COM9, 0x38 },
557 { 0xa1, 0x0b },
558 { 0x74, 0x19 },
559 { 0x9a, 0x80 },
560 { 0x43, 0x14 },
561 { REG_COM13, 0xc0 },
562 { 0xff, 0xff },
563 };
564
565 static struct ov7670_win_size {
566 int width;
567 int height;
568 unsigned char com7_bit;
569 int hstart; /* Start/stop values for the camera. Note */
570 int hstop; /* that they do not always make complete */
571 int vstart; /* sense to humans, but evidently the sensor */
572 int vstop; /* will do the right thing... */
573 struct regval_list *regs; /* Regs to tweak */
574 /* h/vref stuff */
575 } ov7670_win_sizes[] = {
576 /* VGA */
577 {
578 .width = VGA_WIDTH,
579 .height = VGA_HEIGHT,
580 .com7_bit = COM7_FMT_VGA,
581 .hstart = 158, /* These values from */
582 .hstop = 14, /* Omnivision */
583 .vstart = 10,
584 .vstop = 490,
585 .regs = NULL,
586 },
587 /* CIF */
588 {
589 .width = CIF_WIDTH,
590 .height = CIF_HEIGHT,
591 .com7_bit = COM7_FMT_CIF,
592 .hstart = 170, /* Empirically determined */
593 .hstop = 90,
594 .vstart = 14,
595 .vstop = 494,
596 .regs = NULL,
597 },
598 /* QVGA */
599 {
600 .width = QVGA_WIDTH,
601 .height = QVGA_HEIGHT,
602 .com7_bit = COM7_FMT_QVGA,
603 .hstart = 164, /* Empirically determined */
604 .hstop = 20,
605 .vstart = 14,
606 .vstop = 494,
607 .regs = NULL,
608 },
609 /* QCIF */
610 {
611 .width = QCIF_WIDTH,
612 .height = QCIF_HEIGHT,
613 .com7_bit = COM7_FMT_VGA, /* see comment above */
614 .hstart = 456, /* Empirically determined */
615 .hstop = 24,
616 .vstart = 14,
617 .vstop = 494,
618 .regs = ov7670_qcif_regs,
619 },
620 };
621
622 #define N_WIN_SIZES (ARRAY_SIZE(ov7670_win_sizes))
623
624
625 /*
626 * Store a set of start/stop values into the camera.
627 */
628 static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
629 int vstart, int vstop)
630 {
631 int ret;
632 unsigned char v;
633 /*
634 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
635 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
636 * a mystery "edge offset" value in the top two bits of href.
637 */
638 ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
639 ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
640 ret += ov7670_read(client, REG_HREF, &v);
641 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
642 msleep(10);
643 ret += ov7670_write(client, REG_HREF, v);
644 /*
645 * Vertical: similar arrangement, but only 10 bits.
646 */
647 ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
648 ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
649 ret += ov7670_read(client, REG_VREF, &v);
650 v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
651 msleep(10);
652 ret += ov7670_write(client, REG_VREF, v);
653 return ret;
654 }
655
656
657 static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
658 {
659 struct ov7670_format_struct *ofmt;
660
661 if (fmt->index >= N_OV7670_FMTS)
662 return -EINVAL;
663
664 ofmt = ov7670_formats + fmt->index;
665 fmt->flags = 0;
666 strcpy(fmt->description, ofmt->desc);
667 fmt->pixelformat = ofmt->pixelformat;
668 return 0;
669 }
670
671
672 static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
673 struct ov7670_format_struct **ret_fmt,
674 struct ov7670_win_size **ret_wsize)
675 {
676 int index;
677 struct ov7670_win_size *wsize;
678 struct v4l2_pix_format *pix = &fmt->fmt.pix;
679
680 for (index = 0; index < N_OV7670_FMTS; index++)
681 if (ov7670_formats[index].pixelformat == pix->pixelformat)
682 break;
683 if (index >= N_OV7670_FMTS)
684 return -EINVAL;
685 if (ret_fmt != NULL)
686 *ret_fmt = ov7670_formats + index;
687 /*
688 * Fields: the OV devices claim to be progressive.
689 */
690 if (pix->field == V4L2_FIELD_ANY)
691 pix->field = V4L2_FIELD_NONE;
692 else if (pix->field != V4L2_FIELD_NONE)
693 return -EINVAL;
694 /*
695 * Round requested image size down to the nearest
696 * we support, but not below the smallest.
697 */
698 for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
699 wsize++)
700 if (pix->width >= wsize->width && pix->height >= wsize->height)
701 break;
702 if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
703 wsize--; /* Take the smallest one */
704 if (ret_wsize != NULL)
705 *ret_wsize = wsize;
706 /*
707 * Note the size we'll actually handle.
708 */
709 pix->width = wsize->width;
710 pix->height = wsize->height;
711 pix->bytesperline = pix->width*ov7670_formats[index].bpp;
712 pix->sizeimage = pix->height*pix->bytesperline;
713 return 0;
714 }
715
716 /*
717 * Set a format.
718 */
719 static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
720 {
721 int ret;
722 struct ov7670_format_struct *ovfmt;
723 struct ov7670_win_size *wsize;
724 struct ov7670_info *info = i2c_get_clientdata(c);
725 unsigned char com7, clkrc;
726
727 ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
728 if (ret)
729 return ret;
730 /*
731 * HACK: if we're running rgb565 we need to grab then rewrite
732 * CLKRC. If we're *not*, however, then rewriting clkrc hoses
733 * the colors.
734 */
735 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) {
736 ret = ov7670_read(c, REG_CLKRC, &clkrc);
737 if (ret)
738 return ret;
739 }
740 /*
741 * COM7 is a pain in the ass, it doesn't like to be read then
742 * quickly written afterward. But we have everything we need
743 * to set it absolutely here, as long as the format-specific
744 * register sets list it first.
745 */
746 com7 = ovfmt->regs[0].value;
747 com7 |= wsize->com7_bit;
748 ov7670_write(c, REG_COM7, com7);
749 /*
750 * Now write the rest of the array. Also store start/stops
751 */
752 ov7670_write_array(c, ovfmt->regs + 1);
753 ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
754 wsize->vstop);
755 ret = 0;
756 if (wsize->regs)
757 ret = ov7670_write_array(c, wsize->regs);
758 info->fmt = ovfmt;
759
760 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0)
761 ret = ov7670_write(c, REG_CLKRC, clkrc);
762 return ret;
763 }
764
765 /*
766 * Implement G/S_PARM. There is a "high quality" mode we could try
767 * to do someday; for now, we just do the frame rate tweak.
768 */
769 static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
770 {
771 struct v4l2_captureparm *cp = &parms->parm.capture;
772 unsigned char clkrc;
773 int ret;
774
775 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
776 return -EINVAL;
777 ret = ov7670_read(c, REG_CLKRC, &clkrc);
778 if (ret < 0)
779 return ret;
780 memset(cp, 0, sizeof(struct v4l2_captureparm));
781 cp->capability = V4L2_CAP_TIMEPERFRAME;
782 cp->timeperframe.numerator = 1;
783 cp->timeperframe.denominator = OV7670_FRAME_RATE;
784 if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
785 cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
786 return 0;
787 }
788
789 static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
790 {
791 struct v4l2_captureparm *cp = &parms->parm.capture;
792 struct v4l2_fract *tpf = &cp->timeperframe;
793 unsigned char clkrc;
794 int ret, div;
795
796 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
797 return -EINVAL;
798 if (cp->extendedmode != 0)
799 return -EINVAL;
800 /*
801 * CLKRC has a reserved bit, so let's preserve it.
802 */
803 ret = ov7670_read(c, REG_CLKRC, &clkrc);
804 if (ret < 0)
805 return ret;
806 if (tpf->numerator == 0 || tpf->denominator == 0)
807 div = 1; /* Reset to full rate */
808 else
809 div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator;
810 if (div == 0)
811 div = 1;
812 else if (div > CLK_SCALE)
813 div = CLK_SCALE;
814 clkrc = (clkrc & 0x80) | div;
815 tpf->numerator = 1;
816 tpf->denominator = OV7670_FRAME_RATE/div;
817 return ov7670_write(c, REG_CLKRC, clkrc);
818 }
819
820
821
822 /*
823 * Code for dealing with controls.
824 */
825
826
827
828
829
830 static int ov7670_store_cmatrix(struct i2c_client *client,
831 int matrix[CMATRIX_LEN])
832 {
833 int i, ret;
834 unsigned char signbits;
835
836 /*
837 * Weird crap seems to exist in the upper part of
838 * the sign bits register, so let's preserve it.
839 */
840 ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
841 signbits &= 0xc0;
842
843 for (i = 0; i < CMATRIX_LEN; i++) {
844 unsigned char raw;
845
846 if (matrix[i] < 0) {
847 signbits |= (1 << i);
848 if (matrix[i] < -255)
849 raw = 0xff;
850 else
851 raw = (-1 * matrix[i]) & 0xff;
852 }
853 else {
854 if (matrix[i] > 255)
855 raw = 0xff;
856 else
857 raw = matrix[i] & 0xff;
858 }
859 ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
860 }
861 ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
862 return ret;
863 }
864
865
866 /*
867 * Hue also requires messing with the color matrix. It also requires
868 * trig functions, which tend not to be well supported in the kernel.
869 * So here is a simple table of sine values, 0-90 degrees, in steps
870 * of five degrees. Values are multiplied by 1000.
871 *
872 * The following naive approximate trig functions require an argument
873 * carefully limited to -180 <= theta <= 180.
874 */
875 #define SIN_STEP 5
876 static const int ov7670_sin_table[] = {
877 0, 87, 173, 258, 342, 422,
878 499, 573, 642, 707, 766, 819,
879 866, 906, 939, 965, 984, 996,
880 1000
881 };
882
883 static int ov7670_sine(int theta)
884 {
885 int chs = 1;
886 int sine;
887
888 if (theta < 0) {
889 theta = -theta;
890 chs = -1;
891 }
892 if (theta <= 90)
893 sine = ov7670_sin_table[theta/SIN_STEP];
894 else {
895 theta -= 90;
896 sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
897 }
898 return sine*chs;
899 }
900
901 static int ov7670_cosine(int theta)
902 {
903 theta = 90 - theta;
904 if (theta > 180)
905 theta -= 360;
906 else if (theta < -180)
907 theta += 360;
908 return ov7670_sine(theta);
909 }
910
911
912
913
914 static void ov7670_calc_cmatrix(struct ov7670_info *info,
915 int matrix[CMATRIX_LEN])
916 {
917 int i;
918 /*
919 * Apply the current saturation setting first.
920 */
921 for (i = 0; i < CMATRIX_LEN; i++)
922 matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
923 /*
924 * Then, if need be, rotate the hue value.
925 */
926 if (info->hue != 0) {
927 int sinth, costh, tmpmatrix[CMATRIX_LEN];
928
929 memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
930 sinth = ov7670_sine(info->hue);
931 costh = ov7670_cosine(info->hue);
932
933 matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
934 matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
935 matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
936 matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
937 matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
938 matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
939 }
940 }
941
942
943
944 static int ov7670_t_sat(struct i2c_client *client, int value)
945 {
946 struct ov7670_info *info = i2c_get_clientdata(client);
947 int matrix[CMATRIX_LEN];
948 int ret;
949
950 info->sat = value;
951 ov7670_calc_cmatrix(info, matrix);
952 ret = ov7670_store_cmatrix(client, matrix);
953 return ret;
954 }
955
956 static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
957 {
958 struct ov7670_info *info = i2c_get_clientdata(client);
959
960 *value = info->sat;
961 return 0;
962 }
963
964 static int ov7670_t_hue(struct i2c_client *client, int value)
965 {
966 struct ov7670_info *info = i2c_get_clientdata(client);
967 int matrix[CMATRIX_LEN];
968 int ret;
969
970 if (value < -180 || value > 180)
971 return -EINVAL;
972 info->hue = value;
973 ov7670_calc_cmatrix(info, matrix);
974 ret = ov7670_store_cmatrix(client, matrix);
975 return ret;
976 }
977
978
979 static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
980 {
981 struct ov7670_info *info = i2c_get_clientdata(client);
982
983 *value = info->hue;
984 return 0;
985 }
986
987
988 /*
989 * Some weird registers seem to store values in a sign/magnitude format!
990 */
991 static unsigned char ov7670_sm_to_abs(unsigned char v)
992 {
993 if ((v & 0x80) == 0)
994 return v + 128;
995 else
996 return 128 - (v & 0x7f);
997 }
998
999
1000 static unsigned char ov7670_abs_to_sm(unsigned char v)
1001 {
1002 if (v > 127)
1003 return v & 0x7f;
1004 else
1005 return (128 - v) | 0x80;
1006 }
1007
1008 static int ov7670_t_brightness(struct i2c_client *client, int value)
1009 {
1010 unsigned char com8, v;
1011 int ret;
1012
1013 ov7670_read(client, REG_COM8, &com8);
1014 com8 &= ~COM8_AEC;
1015 ov7670_write(client, REG_COM8, com8);
1016 v = ov7670_abs_to_sm(value);
1017 ret = ov7670_write(client, REG_BRIGHT, v);
1018 return ret;
1019 }
1020
1021 static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
1022 {
1023 unsigned char v;
1024 int ret = ov7670_read(client, REG_BRIGHT, &v);
1025
1026 *value = ov7670_sm_to_abs(v);
1027 return ret;
1028 }
1029
1030 static int ov7670_t_contrast(struct i2c_client *client, int value)
1031 {
1032 return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
1033 }
1034
1035 static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
1036 {
1037 unsigned char v;
1038 int ret = ov7670_read(client, REG_CONTRAS, &v);
1039
1040 *value = v;
1041 return ret;
1042 }
1043
1044 static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
1045 {
1046 int ret;
1047 unsigned char v;
1048
1049 ret = ov7670_read(client, REG_MVFP, &v);
1050 *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
1051 return ret;
1052 }
1053
1054
1055 static int ov7670_t_hflip(struct i2c_client *client, int value)
1056 {
1057 unsigned char v;
1058 int ret;
1059
1060 ret = ov7670_read(client, REG_MVFP, &v);
1061 if (value)
1062 v |= MVFP_MIRROR;
1063 else
1064 v &= ~MVFP_MIRROR;
1065 msleep(10); /* FIXME */
1066 ret += ov7670_write(client, REG_MVFP, v);
1067 return ret;
1068 }
1069
1070
1071
1072 static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
1073 {
1074 int ret;
1075 unsigned char v;
1076
1077 ret = ov7670_read(client, REG_MVFP, &v);
1078 *value = (v & MVFP_FLIP) == MVFP_FLIP;
1079 return ret;
1080 }
1081
1082
1083 static int ov7670_t_vflip(struct i2c_client *client, int value)
1084 {
1085 unsigned char v;
1086 int ret;
1087
1088 ret = ov7670_read(client, REG_MVFP, &v);
1089 if (value)
1090 v |= MVFP_FLIP;
1091 else
1092 v &= ~MVFP_FLIP;
1093 msleep(10); /* FIXME */
1094 ret += ov7670_write(client, REG_MVFP, v);
1095 return ret;
1096 }
1097
1098
1099 static struct ov7670_control {
1100 struct v4l2_queryctrl qc;
1101 int (*query)(struct i2c_client *c, __s32 *value);
1102 int (*tweak)(struct i2c_client *c, int value);
1103 } ov7670_controls[] =
1104 {
1105 {
1106 .qc = {
1107 .id = V4L2_CID_BRIGHTNESS,
1108 .type = V4L2_CTRL_TYPE_INTEGER,
1109 .name = "Brightness",
1110 .minimum = 0,
1111 .maximum = 255,
1112 .step = 1,
1113 .default_value = 0x80,
1114 .flags = V4L2_CTRL_FLAG_SLIDER
1115 },
1116 .tweak = ov7670_t_brightness,
1117 .query = ov7670_q_brightness,
1118 },
1119 {
1120 .qc = {
1121 .id = V4L2_CID_CONTRAST,
1122 .type = V4L2_CTRL_TYPE_INTEGER,
1123 .name = "Contrast",
1124 .minimum = 0,
1125 .maximum = 127,
1126 .step = 1,
1127 .default_value = 0x40, /* XXX ov7670 spec */
1128 .flags = V4L2_CTRL_FLAG_SLIDER
1129 },
1130 .tweak = ov7670_t_contrast,
1131 .query = ov7670_q_contrast,
1132 },
1133 {
1134 .qc = {
1135 .id = V4L2_CID_SATURATION,
1136 .type = V4L2_CTRL_TYPE_INTEGER,
1137 .name = "Saturation",
1138 .minimum = 0,
1139 .maximum = 256,
1140 .step = 1,
1141 .default_value = 0x80,
1142 .flags = V4L2_CTRL_FLAG_SLIDER
1143 },
1144 .tweak = ov7670_t_sat,
1145 .query = ov7670_q_sat,
1146 },
1147 {
1148 .qc = {
1149 .id = V4L2_CID_HUE,
1150 .type = V4L2_CTRL_TYPE_INTEGER,
1151 .name = "HUE",
1152 .minimum = -180,
1153 .maximum = 180,
1154 .step = 5,
1155 .default_value = 0,
1156 .flags = V4L2_CTRL_FLAG_SLIDER
1157 },
1158 .tweak = ov7670_t_hue,
1159 .query = ov7670_q_hue,
1160 },
1161 {
1162 .qc = {
1163 .id = V4L2_CID_VFLIP,
1164 .type = V4L2_CTRL_TYPE_BOOLEAN,
1165 .name = "Vertical flip",
1166 .minimum = 0,
1167 .maximum = 1,
1168 .step = 1,
1169 .default_value = 0,
1170 },
1171 .tweak = ov7670_t_vflip,
1172 .query = ov7670_q_vflip,
1173 },
1174 {
1175 .qc = {
1176 .id = V4L2_CID_HFLIP,
1177 .type = V4L2_CTRL_TYPE_BOOLEAN,
1178 .name = "Horizontal mirror",
1179 .minimum = 0,
1180 .maximum = 1,
1181 .step = 1,
1182 .default_value = 0,
1183 },
1184 .tweak = ov7670_t_hflip,
1185 .query = ov7670_q_hflip,
1186 },
1187 };
1188 #define N_CONTROLS (ARRAY_SIZE(ov7670_controls))
1189
1190 static struct ov7670_control *ov7670_find_control(__u32 id)
1191 {
1192 int i;
1193
1194 for (i = 0; i < N_CONTROLS; i++)
1195 if (ov7670_controls[i].qc.id == id)
1196 return ov7670_controls + i;
1197 return NULL;
1198 }
1199
1200
1201 static int ov7670_queryctrl(struct i2c_client *client,
1202 struct v4l2_queryctrl *qc)
1203 {
1204 struct ov7670_control *ctrl = ov7670_find_control(qc->id);
1205
1206 if (ctrl == NULL)
1207 return -EINVAL;
1208 *qc = ctrl->qc;
1209 return 0;
1210 }
1211
1212 static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1213 {
1214 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
1215 int ret;
1216
1217 if (octrl == NULL)
1218 return -EINVAL;
1219 ret = octrl->query(client, &ctrl->value);
1220 if (ret >= 0)
1221 return 0;
1222 return ret;
1223 }
1224
1225 static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
1226 {
1227 struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
1228 int ret;
1229
1230 if (octrl == NULL)
1231 return -EINVAL;
1232 ret = octrl->tweak(client, ctrl->value);
1233 if (ret >= 0)
1234 return 0;
1235 return ret;
1236 }
1237
1238
1239
1240
1241
1242
1243 /*
1244 * Basic i2c stuff.
1245 */
1246 static struct i2c_driver ov7670_driver;
1247
1248 static int ov7670_attach(struct i2c_adapter *adapter)
1249 {
1250 int ret;
1251 struct i2c_client *client;
1252 struct ov7670_info *info;
1253
1254 /*
1255 * For now: only deal with adapters we recognize.
1256 */
1257 if (adapter->id != I2C_HW_SMBUS_CAFE)
1258 return -ENODEV;
1259
1260 client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
1261 if (! client)
1262 return -ENOMEM;
1263 client->adapter = adapter;
1264 client->addr = OV7670_I2C_ADDR;
1265 client->driver = &ov7670_driver,
1266 strcpy(client->name, "OV7670");
1267 /*
1268 * Set up our info structure.
1269 */
1270 info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
1271 if (! info) {
1272 ret = -ENOMEM;
1273 goto out_free;
1274 }
1275 info->fmt = &ov7670_formats[0];
1276 info->sat = 128; /* Review this */
1277 i2c_set_clientdata(client, info);
1278
1279 /*
1280 * Make sure it's an ov7670
1281 */
1282 ret = ov7670_detect(client);
1283 if (ret)
1284 goto out_free_info;
1285 ret = i2c_attach_client(client);
1286 if (ret)
1287 goto out_free_info;
1288 return 0;
1289
1290 out_free_info:
1291 kfree(info);
1292 out_free:
1293 kfree(client);
1294 return ret;
1295 }
1296
1297
1298 static int ov7670_detach(struct i2c_client *client)
1299 {
1300 i2c_detach_client(client);
1301 kfree(i2c_get_clientdata(client));
1302 kfree(client);
1303 return 0;
1304 }
1305
1306
1307 static int ov7670_command(struct i2c_client *client, unsigned int cmd,
1308 void *arg)
1309 {
1310 switch (cmd) {
1311 case VIDIOC_G_CHIP_IDENT:
1312 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0);
1313
1314 case VIDIOC_INT_RESET:
1315 ov7670_reset(client);
1316 return 0;
1317
1318 case VIDIOC_INT_INIT:
1319 return ov7670_init(client);
1320
1321 case VIDIOC_ENUM_FMT:
1322 return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
1323 case VIDIOC_TRY_FMT:
1324 return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
1325 case VIDIOC_S_FMT:
1326 return ov7670_s_fmt(client, (struct v4l2_format *) arg);
1327 case VIDIOC_QUERYCTRL:
1328 return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
1329 case VIDIOC_S_CTRL:
1330 return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
1331 case VIDIOC_G_CTRL:
1332 return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
1333 case VIDIOC_S_PARM:
1334 return ov7670_s_parm(client, (struct v4l2_streamparm *) arg);
1335 case VIDIOC_G_PARM:
1336 return ov7670_g_parm(client, (struct v4l2_streamparm *) arg);
1337 }
1338 return -EINVAL;
1339 }
1340
1341
1342
1343 static struct i2c_driver ov7670_driver = {
1344 .driver = {
1345 .name = "ov7670",
1346 },
1347 .id = I2C_DRIVERID_OV7670,
1348 .class = I2C_CLASS_CAM_DIGITAL,
1349 .attach_adapter = ov7670_attach,
1350 .detach_client = ov7670_detach,
1351 .command = ov7670_command,
1352 };
1353
1354
1355 /*
1356 * Module initialization
1357 */
1358 static int __init ov7670_mod_init(void)
1359 {
1360 printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
1361 return i2c_add_driver(&ov7670_driver);
1362 }
1363
1364 static void __exit ov7670_mod_exit(void)
1365 {
1366 i2c_del_driver(&ov7670_driver);
1367 }
1368
1369 module_init(ov7670_mod_init);
1370 module_exit(ov7670_mod_exit);
WRT350N Kernel Patches