x86: add PAGE_KERNEL_EXEC_NOCACHE
[wrt350n-kernel.git] / arch / powerpc / boot / dts / mpc836x_mds.dts
blob0b2d2b588daa0c907523bb258e8aa11ec628fb25
1 /*
2  * MPC8360E EMDS Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
14 /memreserve/    00000000 1000000;
17 / {
18         model = "MPC8360MDS";
19         compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
20         #address-cells = <1>;
21         #size-cells = <1>;
23         cpus {
24                 #address-cells = <1>;
25                 #size-cells = <0>;
27                 PowerPC,8360@0 {
28                         device_type = "cpu";
29                         reg = <0>;
30                         d-cache-line-size = <20>;       // 32 bytes
31                         i-cache-line-size = <20>;       // 32 bytes
32                         d-cache-size = <8000>;          // L1, 32K
33                         i-cache-size = <8000>;          // L1, 32K
34                         timebase-frequency = <3EF1480>;
35                         bus-frequency = <FBC5200>;
36                         clock-frequency = <1F78A400>;
37                 };
38         };
40         memory {
41                 device_type = "memory";
42                 reg = <00000000 10000000>;
43         };
45         bcsr@f8000000 {
46                 device_type = "board-control";
47                 reg = <f8000000 8000>;
48         };
50         soc8360@e0000000 {
51                 #address-cells = <1>;
52                 #size-cells = <1>;
53                 device_type = "soc";
54                 ranges = <0 e0000000 00100000>;
55                 reg = <e0000000 00000200>;
56                 bus-frequency = <FBC5200>;
58                 wdt@200 {
59                         device_type = "watchdog";
60                         compatible = "mpc83xx_wdt";
61                         reg = <200 100>;
62                 };
64                 i2c@3000 {
65                         #address-cells = <1>;
66                         #size-cells = <0>;
67                         device_type = "i2c";
68                         compatible = "fsl-i2c";
69                         reg = <3000 100>;
70                         interrupts = <e 8>;
71                         interrupt-parent = < &ipic >;
72                         dfsrr;
74                         rtc@68 {
75                                 compatible = "dallas,ds1374";
76                                 reg = <68>;
77                         };
78                 };
80                 i2c@3100 {
81                         #address-cells = <1>;
82                         #size-cells = <0>;
83                         device_type = "i2c";
84                         compatible = "fsl-i2c";
85                         reg = <3100 100>;
86                         interrupts = <f 8>;
87                         interrupt-parent = < &ipic >;
88                         dfsrr;
89                 };
91                 serial@4500 {
92                         device_type = "serial";
93                         compatible = "ns16550";
94                         reg = <4500 100>;
95                         clock-frequency = <FBC5200>;
96                         interrupts = <9 8>;
97                         interrupt-parent = < &ipic >;
98                 };
100                 serial@4600 {
101                         device_type = "serial";
102                         compatible = "ns16550";
103                         reg = <4600 100>;
104                         clock-frequency = <FBC5200>;
105                         interrupts = <a 8>;
106                         interrupt-parent = < &ipic >;
107                 };
109                 crypto@30000 {
110                         device_type = "crypto";
111                         model = "SEC2";
112                         compatible = "talitos";
113                         reg = <30000 10000>;
114                         interrupts = <b 8>;
115                         interrupt-parent = < &ipic >;
116                         num-channels = <4>;
117                         channel-fifo-len = <18>;
118                         exec-units-mask = <0000007e>;
119                         /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
120                         descriptor-types-mask = <01010ebf>;
121                 };
123                 ipic: pic@700 {
124                         interrupt-controller;
125                         #address-cells = <0>;
126                         #interrupt-cells = <2>;
127                         reg = <700 100>;
128                         device_type = "ipic";
129                 };
131                 par_io@1400 {
132                         reg = <1400 100>;
133                         device_type = "par_io";
134                         num-ports = <7>;
136                         pio1: ucc_pin@01 {
137                                 pio-map = <
138                         /* port  pin  dir  open_drain  assignment  has_irq */
139                                         0  3  1  0  1  0        /* TxD0 */
140                                         0  4  1  0  1  0        /* TxD1 */
141                                         0  5  1  0  1  0        /* TxD2 */
142                                         0  6  1  0  1  0        /* TxD3 */
143                                         1  6  1  0  3  0        /* TxD4 */
144                                         1  7  1  0  1  0        /* TxD5 */
145                                         1  9  1  0  2  0        /* TxD6 */
146                                         1  a  1  0  2  0        /* TxD7 */
147                                         0  9  2  0  1  0        /* RxD0 */
148                                         0  a  2  0  1  0        /* RxD1 */
149                                         0  b  2  0  1  0        /* RxD2 */
150                                         0  c  2  0  1  0        /* RxD3 */
151                                         0  d  2  0  1  0        /* RxD4 */
152                                         1  1  2  0  2  0        /* RxD5 */
153                                         1  0  2  0  2  0        /* RxD6 */
154                                         1  4  2  0  2  0        /* RxD7 */
155                                         0  7  1  0  1  0        /* TX_EN */
156                                         0  8  1  0  1  0        /* TX_ER */
157                                         0  f  2  0  1  0        /* RX_DV */
158                                         0  10 2  0  1  0        /* RX_ER */
159                                         0  0  2  0  1  0        /* RX_CLK */
160                                         2  9  1  0  3  0        /* GTX_CLK - CLK10 */
161                                         2  8  2  0  1  0>;      /* GTX125 - CLK9 */
162                         };
163                         pio2: ucc_pin@02 {
164                                 pio-map = <
165                         /* port  pin  dir  open_drain  assignment  has_irq */
166                                         0  11 1  0  1  0   /* TxD0 */
167                                         0  12 1  0  1  0   /* TxD1 */
168                                         0  13 1  0  1  0   /* TxD2 */
169                                         0  14 1  0  1  0   /* TxD3 */
170                                         1  2  1  0  1  0   /* TxD4 */
171                                         1  3  1  0  2  0   /* TxD5 */
172                                         1  5  1  0  3  0   /* TxD6 */
173                                         1  8  1  0  3  0   /* TxD7 */
174                                         0  17 2  0  1  0   /* RxD0 */
175                                         0  18 2  0  1  0   /* RxD1 */
176                                         0  19 2  0  1  0   /* RxD2 */
177                                         0  1a 2  0  1  0   /* RxD3 */
178                                         0  1b 2  0  1  0   /* RxD4 */
179                                         1  c  2  0  2  0   /* RxD5 */
180                                         1  d  2  0  3  0   /* RxD6 */
181                                         1  b  2  0  2  0   /* RxD7 */
182                                         0  15 1  0  1  0   /* TX_EN */
183                                         0  16 1  0  1  0   /* TX_ER */
184                                         0  1d 2  0  1  0   /* RX_DV */
185                                         0  1e 2  0  1  0   /* RX_ER */
186                                         0  1f 2  0  1  0   /* RX_CLK */
187                                         2  2  1  0  2  0   /* GTX_CLK - CLK10 */
188                                         2  3  2  0  1  0   /* GTX125 - CLK4 */
189                                         0  1  3  0  2  0   /* MDIO */
190                                         0  2  1  0  1  0>; /* MDC */
191                         };
193                 };
194         };
196         qe@e0100000 {
197                 #address-cells = <1>;
198                 #size-cells = <1>;
199                 device_type = "qe";
200                 model = "QE";
201                 ranges = <0 e0100000 00100000>;
202                 reg = <e0100000 480>;
203                 brg-frequency = <0>;
204                 bus-frequency = <179A7B00>;
206                 muram@10000 {
207                         device_type = "muram";
208                         ranges = <0 00010000 0000c000>;
210                         data-only@0{
211                                 reg = <0 c000>;
212                         };
213                 };
215                 spi@4c0 {
216                         device_type = "spi";
217                         compatible = "fsl_spi";
218                         reg = <4c0 40>;
219                         interrupts = <2>;
220                         interrupt-parent = < &qeic >;
221                         mode = "cpu";
222                 };
224                 spi@500 {
225                         device_type = "spi";
226                         compatible = "fsl_spi";
227                         reg = <500 40>;
228                         interrupts = <1>;
229                         interrupt-parent = < &qeic >;
230                         mode = "cpu";
231                 };
233                 usb@6c0 {
234                         device_type = "usb";
235                         compatible = "qe_udc";
236                         reg = <6c0 40 8B00 100>;
237                         interrupts = <b>;
238                         interrupt-parent = < &qeic >;
239                         mode = "slave";
240                 };
242                 ucc@2000 {
243                         device_type = "network";
244                         compatible = "ucc_geth";
245                         model = "UCC";
246                         device-id = <1>;
247                         reg = <2000 200>;
248                         interrupts = <20>;
249                         interrupt-parent = < &qeic >;
250                         /*
251                          * mac-address is deprecated and will be removed
252                          * in 2.6.25.  Only recent versions of
253                          * U-Boot support local-mac-address, however.
254                          */
255                         mac-address = [ 00 00 00 00 00 00 ];
256                         local-mac-address = [ 00 00 00 00 00 00 ];
257                         rx-clock = <0>;
258                         tx-clock = <19>;
259                         phy-handle = < &phy0 >;
260                         phy-connection-type = "rgmii-id";
261                         pio-handle = < &pio1 >;
262                 };
264                 ucc@3000 {
265                         device_type = "network";
266                         compatible = "ucc_geth";
267                         model = "UCC";
268                         device-id = <2>;
269                         reg = <3000 200>;
270                         interrupts = <21>;
271                         interrupt-parent = < &qeic >;
272                         /*
273                          * mac-address is deprecated and will be removed
274                          * in 2.6.25.  Only recent versions of
275                          * U-Boot support local-mac-address, however.
276                          */
277                         mac-address = [ 00 00 00 00 00 00 ];
278                         local-mac-address = [ 00 00 00 00 00 00 ];
279                         rx-clock = <0>;
280                         tx-clock = <14>;
281                         phy-handle = < &phy1 >;
282                         phy-connection-type = "rgmii-id";
283                         pio-handle = < &pio2 >;
284                 };
286                 mdio@2120 {
287                         #address-cells = <1>;
288                         #size-cells = <0>;
289                         reg = <2120 18>;
290                         device_type = "mdio";
291                         compatible = "ucc_geth_phy";
293                         phy0: ethernet-phy@00 {
294                                 interrupt-parent = < &ipic >;
295                                 interrupts = <11 8>;
296                                 reg = <0>;
297                                 device_type = "ethernet-phy";
298                         };
299                         phy1: ethernet-phy@01 {
300                                 interrupt-parent = < &ipic >;
301                                 interrupts = <12 8>;
302                                 reg = <1>;
303                                 device_type = "ethernet-phy";
304                         };
305                 };
307                 qeic: qeic@80 {
308                         interrupt-controller;
309                         device_type = "qeic";
310                         #address-cells = <0>;
311                         #interrupt-cells = <1>;
312                         reg = <80 80>;
313                         big-endian;
314                         interrupts = <20 8 21 8>; //high:32 low:33
315                         interrupt-parent = < &ipic >;
316                 };
317         };
319         pci@e0008500 {
320                 interrupt-map-mask = <f800 0 0 7>;
321                 interrupt-map = <
323                                 /* IDSEL 0x11 AD17 */
324                                  8800 0 0 1 &ipic 14 8
325                                  8800 0 0 2 &ipic 15 8
326                                  8800 0 0 3 &ipic 16 8
327                                  8800 0 0 4 &ipic 17 8
329                                 /* IDSEL 0x12 AD18 */
330                                  9000 0 0 1 &ipic 16 8
331                                  9000 0 0 2 &ipic 17 8
332                                  9000 0 0 3 &ipic 14 8
333                                  9000 0 0 4 &ipic 15 8
335                                 /* IDSEL 0x13 AD19 */
336                                  9800 0 0 1 &ipic 17 8
337                                  9800 0 0 2 &ipic 14 8
338                                  9800 0 0 3 &ipic 15 8
339                                  9800 0 0 4 &ipic 16 8
341                                 /* IDSEL 0x15 AD21*/
342                                  a800 0 0 1 &ipic 14 8
343                                  a800 0 0 2 &ipic 15 8
344                                  a800 0 0 3 &ipic 16 8
345                                  a800 0 0 4 &ipic 17 8
347                                 /* IDSEL 0x16 AD22*/
348                                  b000 0 0 1 &ipic 17 8
349                                  b000 0 0 2 &ipic 14 8
350                                  b000 0 0 3 &ipic 15 8
351                                  b000 0 0 4 &ipic 16 8
353                                 /* IDSEL 0x17 AD23*/
354                                  b800 0 0 1 &ipic 16 8
355                                  b800 0 0 2 &ipic 17 8
356                                  b800 0 0 3 &ipic 14 8
357                                  b800 0 0 4 &ipic 15 8
359                                 /* IDSEL 0x18 AD24*/
360                                  c000 0 0 1 &ipic 15 8
361                                  c000 0 0 2 &ipic 16 8
362                                  c000 0 0 3 &ipic 17 8
363                                  c000 0 0 4 &ipic 14 8>;
364                 interrupt-parent = < &ipic >;
365                 interrupts = <42 8>;
366                 bus-range = <0 0>;
367                 ranges = <02000000 0 a0000000 a0000000 0 10000000
368                           42000000 0 80000000 80000000 0 10000000
369                           01000000 0 00000000 e2000000 0 00100000>;
370                 clock-frequency = <3f940aa>;
371                 #interrupt-cells = <1>;
372                 #size-cells = <2>;
373                 #address-cells = <3>;
374                 reg = <e0008500 100>;
375                 compatible = "fsl,mpc8349-pci";
376                 device_type = "pci";
377         };