x86: add PAGE_KERNEL_EXEC_NOCACHE
[wrt350n-kernel.git] / arch / powerpc / boot / dts / mpc866ads.dts
blob90f2293ed3cde4b221136a0eaba5dad51b7bf6f7
1 /*
2  * MPC866 ADS Device Tree Source
3  *
4  * Copyright 2006 MontaVista Software, Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
13 / {
14         model = "MPC866ADS";
15         compatible = "mpc8xx";
16         #address-cells = <1>;
17         #size-cells = <1>;
19         cpus {
20                 #address-cells = <1>;
21                 #size-cells = <0>;
23                 PowerPC,866@0 {
24                         device_type = "cpu";
25                         reg = <0>;
26                         d-cache-line-size = <20>;       // 32 bytes
27                         i-cache-line-size = <20>;       // 32 bytes
28                         d-cache-size = <2000>;          // L1, 8K
29                         i-cache-size = <4000>;          // L1, 16K
30                         timebase-frequency = <0>;
31                         bus-frequency = <0>;
32                         clock-frequency = <0>;
33                         interrupts = <f 2>;     // decrementer interrupt
34                         interrupt-parent = <&Mpc8xx_pic>;
35                 };
36         };
38         memory {
39                 device_type = "memory";
40                 reg = <00000000 800000>;
41         };
43         soc866@ff000000 {
44                 #address-cells = <1>;
45                 #size-cells = <1>;
46                 device_type = "soc";
47                 ranges = <0 ff000000 00100000>;
48                 reg = <ff000000 00000200>;
49                 bus-frequency = <0>;
50                 mdio@e80 {
51                         device_type = "mdio";
52                         compatible = "fs_enet";
53                         reg = <e80 8>;
54                         #address-cells = <1>;
55                         #size-cells = <0>;
56                         phy: ethernet-phy@f {
57                                 reg = <f>;
58                                 device_type = "ethernet-phy";
59                         };
60                 };
62                 fec@e00 {
63                         device_type = "network";
64                         compatible = "fs_enet";
65                         model = "FEC";
66                         device-id = <1>;
67                         reg = <e00 188>;
68                         mac-address = [ 00 00 0C 00 01 FD ];
69                         interrupts = <3 1>;
70                         interrupt-parent = <&Mpc8xx_pic>;
71                         phy-handle = <&Phy>;
72                 };
74                 mpc8xx_pic: pic@ff000000 {
75                         interrupt-controller;
76                         #address-cells = <0>;
77                         #interrupt-cells = <2>;
78                         reg = <0 24>;
79                         device_type = "mpc8xx-pic";
80                         compatible = "CPM";
81                 };
83                 cpm@ff000000 {
84                         #address-cells = <1>;
85                         #size-cells = <1>;
86                         device_type = "cpm";
87                         model = "CPM";
88                         ranges = <0 0 4000>;
89                         reg = <860 f0>;
90                         command-proc = <9c0>;
91                         brg-frequency = <0>;
92                         interrupts = <0 2>;     // cpm error interrupt
93                         interrupt-parent = <&Cpm_pic>;
95                         cpm_pic: pic@930 {
96                                 interrupt-controller;
97                                 #address-cells = <0>;
98                                 #interrupt-cells = <2>;
99                                 interrupts = <5 2 0 2>;
100                                 interrupt-parent = <&Mpc8xx_pic>;
101                                 reg = <930 20>;
102                                 device_type = "cpm-pic";
103                                 compatible = "CPM";
104                         };
106                         smc@a80 {
107                                 device_type = "serial";
108                                 compatible = "cpm_uart";
109                                 model = "SMC";
110                                 device-id = <1>;
111                                 reg = <a80 10 3e80 40>;
112                                 clock-setup = <00ffffff 0>;
113                                 rx-clock = <1>;
114                                 tx-clock = <1>;
115                                 current-speed = <0>;
116                                 interrupts = <4 3>;
117                                 interrupt-parent = <&Cpm_pic>;
118                         };
120                         smc@a90 {
121                                 device_type = "serial";
122                                 compatible = "cpm_uart";
123                                 model = "SMC";
124                                 device-id = <2>;
125                                 reg = <a90 20 3f80 40>;
126                                 clock-setup = <ff00ffff 90000>;
127                                 rx-clock = <2>;
128                                 tx-clock = <2>;
129                                 current-speed = <0>;
130                                 interrupts = <3 3>;
131                                 interrupt-parent = <&Cpm_pic>;
132                         };
134                         scc@a00 {
135                                 device_type = "network";
136                                 compatible = "fs_enet";
137                                 model = "SCC";
138                                 device-id = <1>;
139                                 reg = <a00 18 3c00 80>;
140                                 mac-address = [ 00 00 0C 00 03 FD ];
141                                 interrupts = <1e 3>;
142                                 interrupt-parent = <&Cpm_pic>;
143                         };
144                 };
145         };