x86: add PAGE_KERNEL_EXEC_NOCACHE
[wrt350n-kernel.git] / include / asm-arm / arch-omap / entry-macro.S
blobf6967c8df32336c6d780005e6ff3251dcb6e79ea
1 /*
2  * include/asm-arm/arch-omap/entry-macro.S
3  *
4  * Low-level IRQ helper macros for OMAP-based platforms
5  *
6  * This file is licensed under  the terms of the GNU General Public
7  * License version 2. This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 #include <asm/hardware.h>
11 #include <asm/arch/irqs.h>
13 #if defined(CONFIG_ARCH_OMAP1)
15 #if defined(CONFIG_ARCH_OMAP730) && \
16         (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
17 #error "FIXME: OMAP730 doesn't support multiple-OMAP"
18 #elif defined(CONFIG_ARCH_OMAP730)
19 #define INT_IH2_IRQ             INT_730_IH2_IRQ
20 #elif defined(CONFIG_ARCH_OMAP15XX)
21 #define INT_IH2_IRQ             INT_1510_IH2_IRQ
22 #elif defined(CONFIG_ARCH_OMAP16XX)
23 #define INT_IH2_IRQ             INT_1610_IH2_IRQ
24 #else
25 #warning "IH2 IRQ defaulted"
26 #define INT_IH2_IRQ             INT_1510_IH2_IRQ
27 #endif
29                 .macro  disable_fiq
30                 .endm
32                 .macro  get_irqnr_preamble, base, tmp
33                 .endm
35                 .macro  arch_ret_to_user, tmp1, tmp2
36                 .endm
38                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
39                 ldr     \base, =IO_ADDRESS(OMAP_IH1_BASE)
40                 ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
41                 ldr     \tmp, [\base, #IRQ_MIR_REG_OFFSET]
42                 mov     \irqstat, #0xffffffff
43                 bic     \tmp, \irqstat, \tmp
44                 tst     \irqnr, \tmp
45                 beq     1510f
47                 ldr     \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
48                 cmp     \irqnr, #0
49                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
50                 cmpeq   \irqnr, #INT_IH2_IRQ
51                 ldreq   \base, =IO_ADDRESS(OMAP_IH2_BASE)
52                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
53                 addeqs  \irqnr, \irqnr, #32
54 1510:
55                 .endm
57 #elif defined(CONFIG_ARCH_OMAP24XX)
59 #include <asm/arch/omap24xx.h>
61                 .macro  disable_fiq
62                 .endm
64                 .macro  get_irqnr_preamble, base, tmp
65                 .endm
67                 .macro  arch_ret_to_user, tmp1, tmp2
68                 .endm
70                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
71                 ldr     \base, =VA_IC_BASE
72                 ldr     \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
73                 cmp     \irqnr, #0x0
74                 bne     2222f
75                 ldr     \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
76                 cmp     \irqnr, #0x0
77                 bne     2222f
78                 ldr     \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
79                 cmp     \irqnr, #0x0
80 2222:
81                 ldrne   \irqnr, [\base, #IRQ_SIR_IRQ]
83                 .endm
85                 .macro  irq_prio_table
86                 .endm
88 #endif