x86: add PAGE_KERNEL_EXEC_NOCACHE
[wrt350n-kernel.git] / include / asm-arm / hardware / ep7212.h
blob0e952e7470730eecf3370893b33182d751081aee
1 /*
2 * linux/include/asm-arm/hardware/ep7212.h
4 * This file contains the hardware definitions of the EP7212 internal
5 * registers.
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifndef __ASM_HARDWARE_EP7212_H
24 #define __ASM_HARDWARE_EP7212_H
27 * define EP7212_BASE to be the base address of the region
28 * you want to access.
31 #define EP7212_PHYS_BASE (0x80000000)
33 #ifndef __ASSEMBLY__
34 #define ep_readl(off) __raw_readl(EP7212_BASE + (off))
35 #define ep_writel(val,off) __raw_writel(val, EP7212_BASE + (off))
36 #endif
39 * These registers are specific to the EP7212 only
41 #define DAIR 0x2000
42 #define DAIR0 0x2040
43 #define DAIDR1 0x2080
44 #define DAIDR2 0x20c0
45 #define DAISR 0x2100
46 #define SYSCON3 0x2200
47 #define INTSR3 0x2240
48 #define INTMR3 0x2280
49 #define LEDFLSH 0x22c0
51 #define DAIR_DAIEN (1 << 16)
52 #define DAIR_ECS (1 << 17)
53 #define DAIR_LCTM (1 << 19)
54 #define DAIR_LCRM (1 << 20)
55 #define DAIR_RCTM (1 << 21)
56 #define DAIR_RCRM (1 << 22)
57 #define DAIR_LBM (1 << 23)
59 #define DAIDR2_FIFOEN (1 << 15)
60 #define DAIDR2_FIFOLEFT (0x0d << 16)
61 #define DAIDR2_FIFORIGHT (0x11 << 16)
63 #define DAISR_RCTS (1 << 0)
64 #define DAISR_RCRS (1 << 1)
65 #define DAISR_LCTS (1 << 2)
66 #define DAISR_LCRS (1 << 3)
67 #define DAISR_RCTU (1 << 4)
68 #define DAISR_RCRO (1 << 5)
69 #define DAISR_LCTU (1 << 6)
70 #define DAISR_LCRO (1 << 7)
71 #define DAISR_RCNF (1 << 8)
72 #define DAISR_RCNE (1 << 9)
73 #define DAISR_LCNF (1 << 10)
74 #define DAISR_LCNE (1 << 11)
75 #define DAISR_FIFO (1 << 12)
77 #define SYSCON3_ADCCON (1 << 0)
78 #define SYSCON3_DAISEL (1 << 3)
79 #define SYSCON3_ADCCKNSEN (1 << 4)
80 #define SYSCON3_FASTWAKE (1 << 8)
81 #define SYSCON3_DAIEN (1 << 9)
83 #endif /* __ASM_HARDWARE_EP7212_H */