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x86: cpa: move clflush_cache_range()
[wrt350n-kernel.git] / sound / sparc / cs4231.c
blobf8c7a120ccbb3ce2c98821523c55223fcbbb3458
1 /*
2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002 David S. Miller <davem@redhat.com>
4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/irq.h>
19 #include <linux/io.h>
20
21
22 #include <sound/driver.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/info.h>
26 #include <sound/control.h>
27 #include <sound/timer.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30
31 #ifdef CONFIG_SBUS
32 #define SBUS_SUPPORT
33 #include <asm/sbus.h>
34 #endif
35
36 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
37 #define EBUS_SUPPORT
38 #include <linux/pci.h>
39 #include <asm/ebus.h>
40 #endif
41
42 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 /* Enable this card */
45 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
46
47 module_param_array(index, int, NULL, 0444);
48 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
49 module_param_array(id, charp, NULL, 0444);
50 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
51 module_param_array(enable, bool, NULL, 0444);
52 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
53 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
54 MODULE_DESCRIPTION("Sun CS4231");
55 MODULE_LICENSE("GPL");
56 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
57
58 #ifdef SBUS_SUPPORT
59 struct sbus_dma_info {
60 spinlock_t lock; /* DMA access lock */
61 int dir;
62 void __iomem *regs;
63 };
64 #endif
65
66 struct snd_cs4231;
67 struct cs4231_dma_control {
68 void (*prepare)(struct cs4231_dma_control *dma_cont,
69 int dir);
70 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
71 int (*request)(struct cs4231_dma_control *dma_cont,
72 dma_addr_t bus_addr, size_t len);
73 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
74 void (*preallocate)(struct snd_cs4231 *chip,
75 struct snd_pcm *pcm);
76 #ifdef EBUS_SUPPORT
77 struct ebus_dma_info ebus_info;
78 #endif
79 #ifdef SBUS_SUPPORT
80 struct sbus_dma_info sbus_info;
81 #endif
82 };
83
84 struct snd_cs4231 {
85 spinlock_t lock; /* registers access lock */
86 void __iomem *port;
87
88 struct cs4231_dma_control p_dma;
89 struct cs4231_dma_control c_dma;
90
91 u32 flags;
92 #define CS4231_FLAG_EBUS 0x00000001
93 #define CS4231_FLAG_PLAYBACK 0x00000002
94 #define CS4231_FLAG_CAPTURE 0x00000004
95
96 struct snd_card *card;
97 struct snd_pcm *pcm;
98 struct snd_pcm_substream *playback_substream;
99 unsigned int p_periods_sent;
100 struct snd_pcm_substream *capture_substream;
101 unsigned int c_periods_sent;
102 struct snd_timer *timer;
103
104 unsigned short mode;
105 #define CS4231_MODE_NONE 0x0000
106 #define CS4231_MODE_PLAY 0x0001
107 #define CS4231_MODE_RECORD 0x0002
108 #define CS4231_MODE_TIMER 0x0004
109 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
110 CS4231_MODE_TIMER)
111
112 unsigned char image[32]; /* registers image */
113 int mce_bit;
114 int calibrate_mute;
115 struct mutex mce_mutex; /* mutex for mce register */
116 struct mutex open_mutex; /* mutex for ALSA open/close */
117
118 union {
119 #ifdef SBUS_SUPPORT
120 struct sbus_dev *sdev;
121 #endif
122 #ifdef EBUS_SUPPORT
123 struct pci_dev *pdev;
124 #endif
125 } dev_u;
126 unsigned int irq[2];
127 unsigned int regs_size;
128 struct snd_cs4231 *next;
129 };
130
131 static struct snd_cs4231 *cs4231_list;
132
133 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
134 * now.... -DaveM
135 */
136
137 /* IO ports */
138 #include <sound/cs4231-regs.h>
139
140 /* XXX offsets are different than PC ISA chips... */
141 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
142
143 /* SBUS DMA register defines. */
144
145 #define APCCSR 0x10UL /* APC DMA CSR */
146 #define APCCVA 0x20UL /* APC Capture DMA Address */
147 #define APCCC 0x24UL /* APC Capture Count */
148 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
149 #define APCCNC 0x2cUL /* APC Capture Next Count */
150 #define APCPVA 0x30UL /* APC Play DMA Address */
151 #define APCPC 0x34UL /* APC Play Count */
152 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
153 #define APCPNC 0x3cUL /* APC Play Next Count */
154
155 /* Defines for SBUS DMA-routines */
156
157 #define APCVA 0x0UL /* APC DMA Address */
158 #define APCC 0x4UL /* APC Count */
159 #define APCNVA 0x8UL /* APC DMA Next Address */
160 #define APCNC 0xcUL /* APC Next Count */
161 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
162 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
163
164 /* APCCSR bits */
165
166 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
167 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
168 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
169 #define APC_GENL_INT 0x100000 /* General interrupt */
170 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
171 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
172 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
173 #define APC_XINT_GENL 0x10000 /* Error ext intr */
174 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
175 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
176 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
177 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
178 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
179 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
180 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
181 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
182 #define APC_PPAUSE 0x80 /* Pause the play DMA */
183 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
184 #define APC_CDC_RESET 0x20 /* CODEC RESET */
185 #define APC_PDMA_READY 0x08 /* Play DMA Go */
186 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
187 #define APC_CHIP_RESET 0x01 /* Reset the chip */
188
189 /* EBUS DMA register offsets */
190
191 #define EBDMA_CSR 0x00UL /* Control/Status */
192 #define EBDMA_ADDR 0x04UL /* DMA Address */
193 #define EBDMA_COUNT 0x08UL /* DMA Count */
194
195 /*
196 * Some variables
197 */
198
199 static unsigned char freq_bits[14] = {
200 /* 5510 */ 0x00 | CS4231_XTAL2,
201 /* 6620 */ 0x0E | CS4231_XTAL2,
202 /* 8000 */ 0x00 | CS4231_XTAL1,
203 /* 9600 */ 0x0E | CS4231_XTAL1,
204 /* 11025 */ 0x02 | CS4231_XTAL2,
205 /* 16000 */ 0x02 | CS4231_XTAL1,
206 /* 18900 */ 0x04 | CS4231_XTAL2,
207 /* 22050 */ 0x06 | CS4231_XTAL2,
208 /* 27042 */ 0x04 | CS4231_XTAL1,
209 /* 32000 */ 0x06 | CS4231_XTAL1,
210 /* 33075 */ 0x0C | CS4231_XTAL2,
211 /* 37800 */ 0x08 | CS4231_XTAL2,
212 /* 44100 */ 0x0A | CS4231_XTAL2,
213 /* 48000 */ 0x0C | CS4231_XTAL1
214 };
215
216 static unsigned int rates[14] = {
217 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
218 27042, 32000, 33075, 37800, 44100, 48000
219 };
220
221 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
222 .count = ARRAY_SIZE(rates),
223 .list = rates,
224 };
225
226 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
227 {
228 return snd_pcm_hw_constraint_list(runtime, 0,
229 SNDRV_PCM_HW_PARAM_RATE,
230 &hw_constraints_rates);
231 }
232
233 static unsigned char snd_cs4231_original_image[32] =
234 {
235 0x00, /* 00/00 - lic */
236 0x00, /* 01/01 - ric */
237 0x9f, /* 02/02 - la1ic */
238 0x9f, /* 03/03 - ra1ic */
239 0x9f, /* 04/04 - la2ic */
240 0x9f, /* 05/05 - ra2ic */
241 0xbf, /* 06/06 - loc */
242 0xbf, /* 07/07 - roc */
243 0x20, /* 08/08 - pdfr */
244 CS4231_AUTOCALIB, /* 09/09 - ic */
245 0x00, /* 0a/10 - pc */
246 0x00, /* 0b/11 - ti */
247 CS4231_MODE2, /* 0c/12 - mi */
248 0x00, /* 0d/13 - lbc */
249 0x00, /* 0e/14 - pbru */
250 0x00, /* 0f/15 - pbrl */
251 0x80, /* 10/16 - afei */
252 0x01, /* 11/17 - afeii */
253 0x9f, /* 12/18 - llic */
254 0x9f, /* 13/19 - rlic */
255 0x00, /* 14/20 - tlb */
256 0x00, /* 15/21 - thb */
257 0x00, /* 16/22 - la3mic/reserved */
258 0x00, /* 17/23 - ra3mic/reserved */
259 0x00, /* 18/24 - afs */
260 0x00, /* 19/25 - lamoc/version */
261 0x00, /* 1a/26 - mioc */
262 0x00, /* 1b/27 - ramoc/reserved */
263 0x20, /* 1c/28 - cdfr */
264 0x00, /* 1d/29 - res4 */
265 0x00, /* 1e/30 - cbru */
266 0x00, /* 1f/31 - cbrl */
267 };
268
269 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
270 {
271 #ifdef EBUS_SUPPORT
272 if (cp->flags & CS4231_FLAG_EBUS)
273 return readb(reg_addr);
274 else
275 #endif
276 #ifdef SBUS_SUPPORT
277 return sbus_readb(reg_addr);
278 #endif
279 }
280
281 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
282 void __iomem *reg_addr)
283 {
284 #ifdef EBUS_SUPPORT
285 if (cp->flags & CS4231_FLAG_EBUS)
286 return writeb(val, reg_addr);
287 else
288 #endif
289 #ifdef SBUS_SUPPORT
290 return sbus_writeb(val, reg_addr);
291 #endif
292 }
293
294 /*
295 * Basic I/O functions
296 */
297
298 static void snd_cs4231_ready(struct snd_cs4231 *chip)
299 {
300 int timeout;
301
302 for (timeout = 250; timeout > 0; timeout--) {
303 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
304 if ((val & CS4231_INIT) == 0)
305 break;
306 udelay(100);
307 }
308 }
309
310 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
311 unsigned char value)
312 {
313 snd_cs4231_ready(chip);
314 #ifdef CONFIG_SND_DEBUG
315 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
316 snd_printdd("out: auto calibration time out - reg = 0x%x, "
317 "value = 0x%x\n",
318 reg, value);
319 #endif
320 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
321 wmb();
322 __cs4231_writeb(chip, value, CS4231U(chip, REG));
323 mb();
324 }
325
326 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
327 unsigned char mask, unsigned char value)
328 {
329 unsigned char tmp = (chip->image[reg] & mask) | value;
330
331 chip->image[reg] = tmp;
332 if (!chip->calibrate_mute)
333 snd_cs4231_dout(chip, reg, tmp);
334 }
335
336 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
337 unsigned char value)
338 {
339 snd_cs4231_dout(chip, reg, value);
340 chip->image[reg] = value;
341 mb();
342 }
343
344 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
345 {
346 snd_cs4231_ready(chip);
347 #ifdef CONFIG_SND_DEBUG
348 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
349 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
350 reg);
351 #endif
352 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
353 mb();
354 return __cs4231_readb(chip, CS4231U(chip, REG));
355 }
356
357 /*
358 * CS4231 detection / MCE routines
359 */
360
361 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
362 {
363 int timeout;
364
365 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
366 for (timeout = 5; timeout > 0; timeout--)
367 __cs4231_readb(chip, CS4231U(chip, REGSEL));
368
369 /* end of cleanup sequence */
370 for (timeout = 500; timeout > 0; timeout--) {
371 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
372 if ((val & CS4231_INIT) == 0)
373 break;
374 msleep(1);
375 }
376 }
377
378 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
379 {
380 unsigned long flags;
381 int timeout;
382
383 spin_lock_irqsave(&chip->lock, flags);
384 snd_cs4231_ready(chip);
385 #ifdef CONFIG_SND_DEBUG
386 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
387 snd_printdd("mce_up - auto calibration time out (0)\n");
388 #endif
389 chip->mce_bit |= CS4231_MCE;
390 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
391 if (timeout == 0x80)
392 snd_printdd("mce_up [%p]: serious init problem - "
393 "codec still busy\n",
394 chip->port);
395 if (!(timeout & CS4231_MCE))
396 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
397 CS4231U(chip, REGSEL));
398 spin_unlock_irqrestore(&chip->lock, flags);
399 }
400
401 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
402 {
403 unsigned long flags, timeout;
404 int reg;
405
406 snd_cs4231_busy_wait(chip);
407 spin_lock_irqsave(&chip->lock, flags);
408 #ifdef CONFIG_SND_DEBUG
409 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
410 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
411 CS4231U(chip, REGSEL));
412 #endif
413 chip->mce_bit &= ~CS4231_MCE;
414 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
415 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
416 CS4231U(chip, REGSEL));
417 if (reg == 0x80)
418 snd_printdd("mce_down [%p]: serious init problem "
419 "- codec still busy\n", chip->port);
420 if ((reg & CS4231_MCE) == 0) {
421 spin_unlock_irqrestore(&chip->lock, flags);
422 return;
423 }
424
425 /*
426 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
427 */
428 timeout = jiffies + msecs_to_jiffies(250);
429 do {
430 spin_unlock_irqrestore(&chip->lock, flags);
431 msleep(1);
432 spin_lock_irqsave(&chip->lock, flags);
433 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
434 reg &= CS4231_CALIB_IN_PROGRESS;
435 } while (reg && time_before(jiffies, timeout));
436 spin_unlock_irqrestore(&chip->lock, flags);
437
438 if (reg)
439 snd_printk(KERN_ERR
440 "mce_down - auto calibration time out (2)\n");
441 }
442
443 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
444 struct snd_pcm_substream *substream,
445 unsigned int *periods_sent)
446 {
447 struct snd_pcm_runtime *runtime = substream->runtime;
448
449 while (1) {
450 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
451 unsigned int offset = period_size * (*periods_sent);
452
453 BUG_ON(period_size >= (1 << 24));
454
455 if (dma_cont->request(dma_cont,
456 runtime->dma_addr + offset, period_size))
457 return;
458 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
459 }
460 }
461
462 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
463 unsigned int what, int on)
464 {
465 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
466 struct cs4231_dma_control *dma_cont;
467
468 if (what & CS4231_PLAYBACK_ENABLE) {
469 dma_cont = &chip->p_dma;
470 if (on) {
471 dma_cont->prepare(dma_cont, 0);
472 dma_cont->enable(dma_cont, 1);
473 snd_cs4231_advance_dma(dma_cont,
474 chip->playback_substream,
475 &chip->p_periods_sent);
476 } else {
477 dma_cont->enable(dma_cont, 0);
478 }
479 }
480 if (what & CS4231_RECORD_ENABLE) {
481 dma_cont = &chip->c_dma;
482 if (on) {
483 dma_cont->prepare(dma_cont, 1);
484 dma_cont->enable(dma_cont, 1);
485 snd_cs4231_advance_dma(dma_cont,
486 chip->capture_substream,
487 &chip->c_periods_sent);
488 } else {
489 dma_cont->enable(dma_cont, 0);
490 }
491 }
492 }
493
494 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
495 {
496 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
497 int result = 0;
498
499 switch (cmd) {
500 case SNDRV_PCM_TRIGGER_START:
501 case SNDRV_PCM_TRIGGER_STOP:
502 {
503 unsigned int what = 0;
504 struct snd_pcm_substream *s;
505 unsigned long flags;
506
507 snd_pcm_group_for_each_entry(s, substream) {
508 if (s == chip->playback_substream) {
509 what |= CS4231_PLAYBACK_ENABLE;
510 snd_pcm_trigger_done(s, substream);
511 } else if (s == chip->capture_substream) {
512 what |= CS4231_RECORD_ENABLE;
513 snd_pcm_trigger_done(s, substream);
514 }
515 }
516
517 spin_lock_irqsave(&chip->lock, flags);
518 if (cmd == SNDRV_PCM_TRIGGER_START) {
519 cs4231_dma_trigger(substream, what, 1);
520 chip->image[CS4231_IFACE_CTRL] |= what;
521 } else {
522 cs4231_dma_trigger(substream, what, 0);
523 chip->image[CS4231_IFACE_CTRL] &= ~what;
524 }
525 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
526 chip->image[CS4231_IFACE_CTRL]);
527 spin_unlock_irqrestore(&chip->lock, flags);
528 break;
529 }
530 default:
531 result = -EINVAL;
532 break;
533 }
534
535 return result;
536 }
537
538 /*
539 * CODEC I/O
540 */
541
542 static unsigned char snd_cs4231_get_rate(unsigned int rate)
543 {
544 int i;
545
546 for (i = 0; i < 14; i++)
547 if (rate == rates[i])
548 return freq_bits[i];
549
550 return freq_bits[13];
551 }
552
553 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
554 int channels)
555 {
556 unsigned char rformat;
557
558 rformat = CS4231_LINEAR_8;
559 switch (format) {
560 case SNDRV_PCM_FORMAT_MU_LAW:
561 rformat = CS4231_ULAW_8;
562 break;
563 case SNDRV_PCM_FORMAT_A_LAW:
564 rformat = CS4231_ALAW_8;
565 break;
566 case SNDRV_PCM_FORMAT_S16_LE:
567 rformat = CS4231_LINEAR_16;
568 break;
569 case SNDRV_PCM_FORMAT_S16_BE:
570 rformat = CS4231_LINEAR_16_BIG;
571 break;
572 case SNDRV_PCM_FORMAT_IMA_ADPCM:
573 rformat = CS4231_ADPCM_16;
574 break;
575 }
576 if (channels > 1)
577 rformat |= CS4231_STEREO;
578 return rformat;
579 }
580
581 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
582 {
583 unsigned long flags;
584
585 mute = mute ? 1 : 0;
586 spin_lock_irqsave(&chip->lock, flags);
587 if (chip->calibrate_mute == mute) {
588 spin_unlock_irqrestore(&chip->lock, flags);
589 return;
590 }
591 if (!mute) {
592 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
593 chip->image[CS4231_LEFT_INPUT]);
594 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
595 chip->image[CS4231_RIGHT_INPUT]);
596 snd_cs4231_dout(chip, CS4231_LOOPBACK,
597 chip->image[CS4231_LOOPBACK]);
598 }
599 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
600 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
601 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
602 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
603 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
604 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
605 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
606 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
607 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
608 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
609 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
610 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
611 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
612 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
613 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
614 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
615 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
616 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
617 chip->calibrate_mute = mute;
618 spin_unlock_irqrestore(&chip->lock, flags);
619 }
620
621 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
622 struct snd_pcm_hw_params *params,
623 unsigned char pdfr)
624 {
625 unsigned long flags;
626
627 mutex_lock(&chip->mce_mutex);
628 snd_cs4231_calibrate_mute(chip, 1);
629
630 snd_cs4231_mce_up(chip);
631
632 spin_lock_irqsave(&chip->lock, flags);
633 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
634 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
635 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
636 pdfr);
637 spin_unlock_irqrestore(&chip->lock, flags);
638
639 snd_cs4231_mce_down(chip);
640
641 snd_cs4231_calibrate_mute(chip, 0);
642 mutex_unlock(&chip->mce_mutex);
643 }
644
645 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
646 struct snd_pcm_hw_params *params,
647 unsigned char cdfr)
648 {
649 unsigned long flags;
650
651 mutex_lock(&chip->mce_mutex);
652 snd_cs4231_calibrate_mute(chip, 1);
653
654 snd_cs4231_mce_up(chip);
655
656 spin_lock_irqsave(&chip->lock, flags);
657 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
658 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
659 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
660 (cdfr & 0x0f));
661 spin_unlock_irqrestore(&chip->lock, flags);
662 snd_cs4231_mce_down(chip);
663 snd_cs4231_mce_up(chip);
664 spin_lock_irqsave(&chip->lock, flags);
665 }
666 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
667 spin_unlock_irqrestore(&chip->lock, flags);
668
669 snd_cs4231_mce_down(chip);
670
671 snd_cs4231_calibrate_mute(chip, 0);
672 mutex_unlock(&chip->mce_mutex);
673 }
674
675 /*
676 * Timer interface
677 */
678
679 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
680 {
681 struct snd_cs4231 *chip = snd_timer_chip(timer);
682
683 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
684 }
685
686 static int snd_cs4231_timer_start(struct snd_timer *timer)
687 {
688 unsigned long flags;
689 unsigned int ticks;
690 struct snd_cs4231 *chip = snd_timer_chip(timer);
691
692 spin_lock_irqsave(&chip->lock, flags);
693 ticks = timer->sticks;
694 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
695 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
696 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
697 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
698 chip->image[CS4231_TIMER_HIGH] =
699 (unsigned char) (ticks >> 8));
700 snd_cs4231_out(chip, CS4231_TIMER_LOW,
701 chip->image[CS4231_TIMER_LOW] =
702 (unsigned char) ticks);
703 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
704 chip->image[CS4231_ALT_FEATURE_1] |
705 CS4231_TIMER_ENABLE);
706 }
707 spin_unlock_irqrestore(&chip->lock, flags);
708
709 return 0;
710 }
711
712 static int snd_cs4231_timer_stop(struct snd_timer *timer)
713 {
714 unsigned long flags;
715 struct snd_cs4231 *chip = snd_timer_chip(timer);
716
717 spin_lock_irqsave(&chip->lock, flags);
718 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
719 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
720 chip->image[CS4231_ALT_FEATURE_1]);
721 spin_unlock_irqrestore(&chip->lock, flags);
722
723 return 0;
724 }
725
726 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
727 {
728 unsigned long flags;
729
730 snd_cs4231_mce_down(chip);
731
732 #ifdef SNDRV_DEBUG_MCE
733 snd_printdd("init: (1)\n");
734 #endif
735 snd_cs4231_mce_up(chip);
736 spin_lock_irqsave(&chip->lock, flags);
737 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
738 CS4231_PLAYBACK_PIO |
739 CS4231_RECORD_ENABLE |
740 CS4231_RECORD_PIO |
741 CS4231_CALIB_MODE);
742 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
743 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
744 spin_unlock_irqrestore(&chip->lock, flags);
745 snd_cs4231_mce_down(chip);
746
747 #ifdef SNDRV_DEBUG_MCE
748 snd_printdd("init: (2)\n");
749 #endif
750
751 snd_cs4231_mce_up(chip);
752 spin_lock_irqsave(&chip->lock, flags);
753 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
754 chip->image[CS4231_ALT_FEATURE_1]);
755 spin_unlock_irqrestore(&chip->lock, flags);
756 snd_cs4231_mce_down(chip);
757
758 #ifdef SNDRV_DEBUG_MCE
759 snd_printdd("init: (3) - afei = 0x%x\n",
760 chip->image[CS4231_ALT_FEATURE_1]);
761 #endif
762
763 spin_lock_irqsave(&chip->lock, flags);
764 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
765 chip->image[CS4231_ALT_FEATURE_2]);
766 spin_unlock_irqrestore(&chip->lock, flags);
767
768 snd_cs4231_mce_up(chip);
769 spin_lock_irqsave(&chip->lock, flags);
770 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
771 chip->image[CS4231_PLAYBK_FORMAT]);
772 spin_unlock_irqrestore(&chip->lock, flags);
773 snd_cs4231_mce_down(chip);
774
775 #ifdef SNDRV_DEBUG_MCE
776 snd_printdd("init: (4)\n");
777 #endif
778
779 snd_cs4231_mce_up(chip);
780 spin_lock_irqsave(&chip->lock, flags);
781 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
782 spin_unlock_irqrestore(&chip->lock, flags);
783 snd_cs4231_mce_down(chip);
784
785 #ifdef SNDRV_DEBUG_MCE
786 snd_printdd("init: (5)\n");
787 #endif
788 }
789
790 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
791 {
792 unsigned long flags;
793
794 mutex_lock(&chip->open_mutex);
795 if ((chip->mode & mode)) {
796 mutex_unlock(&chip->open_mutex);
797 return -EAGAIN;
798 }
799 if (chip->mode & CS4231_MODE_OPEN) {
800 chip->mode |= mode;
801 mutex_unlock(&chip->open_mutex);
802 return 0;
803 }
804 /* ok. now enable and ack CODEC IRQ */
805 spin_lock_irqsave(&chip->lock, flags);
806 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
807 CS4231_RECORD_IRQ |
808 CS4231_TIMER_IRQ);
809 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
810 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
811 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
812
813 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
814 CS4231_RECORD_IRQ |
815 CS4231_TIMER_IRQ);
816 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
817
818 spin_unlock_irqrestore(&chip->lock, flags);
819
820 chip->mode = mode;
821 mutex_unlock(&chip->open_mutex);
822 return 0;
823 }
824
825 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
826 {
827 unsigned long flags;
828
829 mutex_lock(&chip->open_mutex);
830 chip->mode &= ~mode;
831 if (chip->mode & CS4231_MODE_OPEN) {
832 mutex_unlock(&chip->open_mutex);
833 return;
834 }
835 snd_cs4231_calibrate_mute(chip, 1);
836
837 /* disable IRQ */
838 spin_lock_irqsave(&chip->lock, flags);
839 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
840 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
841 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
842
843 /* now disable record & playback */
844
845 if (chip->image[CS4231_IFACE_CTRL] &
846 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
847 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
848 spin_unlock_irqrestore(&chip->lock, flags);
849 snd_cs4231_mce_up(chip);
850 spin_lock_irqsave(&chip->lock, flags);
851 chip->image[CS4231_IFACE_CTRL] &=
852 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
853 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
854 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
855 chip->image[CS4231_IFACE_CTRL]);
856 spin_unlock_irqrestore(&chip->lock, flags);
857 snd_cs4231_mce_down(chip);
858 spin_lock_irqsave(&chip->lock, flags);
859 }
860
861 /* clear IRQ again */
862 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
863 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
864 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
865 spin_unlock_irqrestore(&chip->lock, flags);
866
867 snd_cs4231_calibrate_mute(chip, 0);
868
869 chip->mode = 0;
870 mutex_unlock(&chip->open_mutex);
871 }
872
873 /*
874 * timer open/close
875 */
876
877 static int snd_cs4231_timer_open(struct snd_timer *timer)
878 {
879 struct snd_cs4231 *chip = snd_timer_chip(timer);
880 snd_cs4231_open(chip, CS4231_MODE_TIMER);
881 return 0;
882 }
883
884 static int snd_cs4231_timer_close(struct snd_timer *timer)
885 {
886 struct snd_cs4231 *chip = snd_timer_chip(timer);
887 snd_cs4231_close(chip, CS4231_MODE_TIMER);
888 return 0;
889 }
890
891 static struct snd_timer_hardware snd_cs4231_timer_table = {
892 .flags = SNDRV_TIMER_HW_AUTO,
893 .resolution = 9945,
894 .ticks = 65535,
895 .open = snd_cs4231_timer_open,
896 .close = snd_cs4231_timer_close,
897 .c_resolution = snd_cs4231_timer_resolution,
898 .start = snd_cs4231_timer_start,
899 .stop = snd_cs4231_timer_stop,
900 };
901
902 /*
903 * ok.. exported functions..
904 */
905
906 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
907 struct snd_pcm_hw_params *hw_params)
908 {
909 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
910 unsigned char new_pdfr;
911 int err;
912
913 err = snd_pcm_lib_malloc_pages(substream,
914 params_buffer_bytes(hw_params));
915 if (err < 0)
916 return err;
917 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
918 params_channels(hw_params)) |
919 snd_cs4231_get_rate(params_rate(hw_params));
920 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
921
922 return 0;
923 }
924
925 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
926 {
927 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
928 struct snd_pcm_runtime *runtime = substream->runtime;
929 unsigned long flags;
930
931 spin_lock_irqsave(&chip->lock, flags);
932
933 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
934 CS4231_PLAYBACK_PIO);
935
936 BUG_ON(runtime->period_size > 0xffff + 1);
937
938 chip->p_periods_sent = 0;
939 spin_unlock_irqrestore(&chip->lock, flags);
940
941 return 0;
942 }
943
944 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
945 struct snd_pcm_hw_params *hw_params)
946 {
947 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
948 unsigned char new_cdfr;
949 int err;
950
951 err = snd_pcm_lib_malloc_pages(substream,
952 params_buffer_bytes(hw_params));
953 if (err < 0)
954 return err;
955 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
956 params_channels(hw_params)) |
957 snd_cs4231_get_rate(params_rate(hw_params));
958 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
959
960 return 0;
961 }
962
963 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
964 {
965 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
966 unsigned long flags;
967
968 spin_lock_irqsave(&chip->lock, flags);
969 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
970 CS4231_RECORD_PIO);
971
972
973 chip->c_periods_sent = 0;
974 spin_unlock_irqrestore(&chip->lock, flags);
975
976 return 0;
977 }
978
979 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
980 {
981 unsigned long flags;
982 unsigned char res;
983
984 spin_lock_irqsave(&chip->lock, flags);
985 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
986 spin_unlock_irqrestore(&chip->lock, flags);
987
988 /* detect overrange only above 0dB; may be user selectable? */
989 if (res & (0x08 | 0x02))
990 chip->capture_substream->runtime->overrange++;
991 }
992
993 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
994 {
995 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
996 snd_pcm_period_elapsed(chip->playback_substream);
997 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
998 &chip->p_periods_sent);
999 }
1000 }
1001
1002 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1003 {
1004 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1005 snd_pcm_period_elapsed(chip->capture_substream);
1006 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1007 &chip->c_periods_sent);
1008 }
1009 }
1010
1011 static snd_pcm_uframes_t snd_cs4231_playback_pointer(
1012 struct snd_pcm_substream *substream)
1013 {
1014 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1015 struct cs4231_dma_control *dma_cont = &chip->p_dma;
1016 size_t ptr;
1017
1018 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1019 return 0;
1020 ptr = dma_cont->address(dma_cont);
1021 if (ptr != 0)
1022 ptr -= substream->runtime->dma_addr;
1023
1024 return bytes_to_frames(substream->runtime, ptr);
1025 }
1026
1027 static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1028 struct snd_pcm_substream *substream)
1029 {
1030 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1031 struct cs4231_dma_control *dma_cont = &chip->c_dma;
1032 size_t ptr;
1033
1034 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1035 return 0;
1036 ptr = dma_cont->address(dma_cont);
1037 if (ptr != 0)
1038 ptr -= substream->runtime->dma_addr;
1039
1040 return bytes_to_frames(substream->runtime, ptr);
1041 }
1042
1043 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1044 {
1045 unsigned long flags;
1046 int i;
1047 int id = 0;
1048 int vers = 0;
1049 unsigned char *ptr;
1050
1051 for (i = 0; i < 50; i++) {
1052 mb();
1053 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1054 msleep(2);
1055 else {
1056 spin_lock_irqsave(&chip->lock, flags);
1057 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1058 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1059 vers = snd_cs4231_in(chip, CS4231_VERSION);
1060 spin_unlock_irqrestore(&chip->lock, flags);
1061 if (id == 0x0a)
1062 break; /* this is valid value */
1063 }
1064 }
1065 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1066 if (id != 0x0a)
1067 return -ENODEV; /* no valid device found */
1068
1069 spin_lock_irqsave(&chip->lock, flags);
1070
1071 /* clear any pendings IRQ */
1072 __cs4231_readb(chip, CS4231U(chip, STATUS));
1073 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1074 mb();
1075
1076 spin_unlock_irqrestore(&chip->lock, flags);
1077
1078 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1079 chip->image[CS4231_IFACE_CTRL] =
1080 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1081 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1082 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1083 if (vers & 0x20)
1084 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1085
1086 ptr = (unsigned char *) &chip->image;
1087
1088 snd_cs4231_mce_down(chip);
1089
1090 spin_lock_irqsave(&chip->lock, flags);
1091
1092 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1093 snd_cs4231_out(chip, i, *ptr++);
1094
1095 spin_unlock_irqrestore(&chip->lock, flags);
1096
1097 snd_cs4231_mce_up(chip);
1098
1099 snd_cs4231_mce_down(chip);
1100
1101 mdelay(2);
1102
1103 return 0; /* all things are ok.. */
1104 }
1105
1106 static struct snd_pcm_hardware snd_cs4231_playback = {
1107 .info = SNDRV_PCM_INFO_MMAP |
1108 SNDRV_PCM_INFO_INTERLEAVED |
1109 SNDRV_PCM_INFO_MMAP_VALID |
1110 SNDRV_PCM_INFO_SYNC_START,
1111 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1112 SNDRV_PCM_FMTBIT_A_LAW |
1113 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1114 SNDRV_PCM_FMTBIT_U8 |
1115 SNDRV_PCM_FMTBIT_S16_LE |
1116 SNDRV_PCM_FMTBIT_S16_BE,
1117 .rates = SNDRV_PCM_RATE_KNOT |
1118 SNDRV_PCM_RATE_8000_48000,
1119 .rate_min = 5510,
1120 .rate_max = 48000,
1121 .channels_min = 1,
1122 .channels_max = 2,
1123 .buffer_bytes_max = 32 * 1024,
1124 .period_bytes_min = 64,
1125 .period_bytes_max = 32 * 1024,
1126 .periods_min = 1,
1127 .periods_max = 1024,
1128 };
1129
1130 static struct snd_pcm_hardware snd_cs4231_capture = {
1131 .info = SNDRV_PCM_INFO_MMAP |
1132 SNDRV_PCM_INFO_INTERLEAVED |
1133 SNDRV_PCM_INFO_MMAP_VALID |
1134 SNDRV_PCM_INFO_SYNC_START,
1135 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1136 SNDRV_PCM_FMTBIT_A_LAW |
1137 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1138 SNDRV_PCM_FMTBIT_U8 |
1139 SNDRV_PCM_FMTBIT_S16_LE |
1140 SNDRV_PCM_FMTBIT_S16_BE,
1141 .rates = SNDRV_PCM_RATE_KNOT |
1142 SNDRV_PCM_RATE_8000_48000,
1143 .rate_min = 5510,
1144 .rate_max = 48000,
1145 .channels_min = 1,
1146 .channels_max = 2,
1147 .buffer_bytes_max = 32 * 1024,
1148 .period_bytes_min = 64,
1149 .period_bytes_max = 32 * 1024,
1150 .periods_min = 1,
1151 .periods_max = 1024,
1152 };
1153
1154 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1155 {
1156 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1157 struct snd_pcm_runtime *runtime = substream->runtime;
1158 int err;
1159
1160 runtime->hw = snd_cs4231_playback;
1161
1162 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1163 if (err < 0) {
1164 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1165 return err;
1166 }
1167 chip->playback_substream = substream;
1168 chip->p_periods_sent = 0;
1169 snd_pcm_set_sync(substream);
1170 snd_cs4231_xrate(runtime);
1171
1172 return 0;
1173 }
1174
1175 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1176 {
1177 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1178 struct snd_pcm_runtime *runtime = substream->runtime;
1179 int err;
1180
1181 runtime->hw = snd_cs4231_capture;
1182
1183 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1184 if (err < 0) {
1185 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1186 return err;
1187 }
1188 chip->capture_substream = substream;
1189 chip->c_periods_sent = 0;
1190 snd_pcm_set_sync(substream);
1191 snd_cs4231_xrate(runtime);
1192
1193 return 0;
1194 }
1195
1196 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1197 {
1198 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1199
1200 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1201 chip->playback_substream = NULL;
1202
1203 return 0;
1204 }
1205
1206 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1207 {
1208 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1209
1210 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1211 chip->capture_substream = NULL;
1212
1213 return 0;
1214 }
1215
1216 /* XXX We can do some power-management, in particular on EBUS using
1217 * XXX the audio AUXIO register...
1218 */
1219
1220 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1221 .open = snd_cs4231_playback_open,
1222 .close = snd_cs4231_playback_close,
1223 .ioctl = snd_pcm_lib_ioctl,
1224 .hw_params = snd_cs4231_playback_hw_params,
1225 .hw_free = snd_pcm_lib_free_pages,
1226 .prepare = snd_cs4231_playback_prepare,
1227 .trigger = snd_cs4231_trigger,
1228 .pointer = snd_cs4231_playback_pointer,
1229 };
1230
1231 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1232 .open = snd_cs4231_capture_open,
1233 .close = snd_cs4231_capture_close,
1234 .ioctl = snd_pcm_lib_ioctl,
1235 .hw_params = snd_cs4231_capture_hw_params,
1236 .hw_free = snd_pcm_lib_free_pages,
1237 .prepare = snd_cs4231_capture_prepare,
1238 .trigger = snd_cs4231_trigger,
1239 .pointer = snd_cs4231_capture_pointer,
1240 };
1241
1242 static int __init snd_cs4231_pcm(struct snd_card *card)
1243 {
1244 struct snd_cs4231 *chip = card->private_data;
1245 struct snd_pcm *pcm;
1246 int err;
1247
1248 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1249 if (err < 0)
1250 return err;
1251
1252 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1253 &snd_cs4231_playback_ops);
1254 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1255 &snd_cs4231_capture_ops);
1256
1257 /* global setup */
1258 pcm->private_data = chip;
1259 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1260 strcpy(pcm->name, "CS4231");
1261
1262 chip->p_dma.preallocate(chip, pcm);
1263
1264 chip->pcm = pcm;
1265
1266 return 0;
1267 }
1268
1269 static int __init snd_cs4231_timer(struct snd_card *card)
1270 {
1271 struct snd_cs4231 *chip = card->private_data;
1272 struct snd_timer *timer;
1273 struct snd_timer_id tid;
1274 int err;
1275
1276 /* Timer initialization */
1277 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1278 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1279 tid.card = card->number;
1280 tid.device = 0;
1281 tid.subdevice = 0;
1282 err = snd_timer_new(card, "CS4231", &tid, &timer);
1283 if (err < 0)
1284 return err;
1285 strcpy(timer->name, "CS4231");
1286 timer->private_data = chip;
1287 timer->hw = snd_cs4231_timer_table;
1288 chip->timer = timer;
1289
1290 return 0;
1291 }
1292
1293 /*
1294 * MIXER part
1295 */
1296
1297 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_info *uinfo)
1299 {
1300 static char *texts[4] = {
1301 "Line", "CD", "Mic", "Mix"
1302 };
1303
1304 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1305 uinfo->count = 2;
1306 uinfo->value.enumerated.items = 4;
1307 if (uinfo->value.enumerated.item > 3)
1308 uinfo->value.enumerated.item = 3;
1309 strcpy(uinfo->value.enumerated.name,
1310 texts[uinfo->value.enumerated.item]);
1311
1312 return 0;
1313 }
1314
1315 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1316 struct snd_ctl_elem_value *ucontrol)
1317 {
1318 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1319 unsigned long flags;
1320
1321 spin_lock_irqsave(&chip->lock, flags);
1322 ucontrol->value.enumerated.item[0] =
1323 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1324 ucontrol->value.enumerated.item[1] =
1325 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1326 spin_unlock_irqrestore(&chip->lock, flags);
1327
1328 return 0;
1329 }
1330
1331 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_value *ucontrol)
1333 {
1334 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1335 unsigned long flags;
1336 unsigned short left, right;
1337 int change;
1338
1339 if (ucontrol->value.enumerated.item[0] > 3 ||
1340 ucontrol->value.enumerated.item[1] > 3)
1341 return -EINVAL;
1342 left = ucontrol->value.enumerated.item[0] << 6;
1343 right = ucontrol->value.enumerated.item[1] << 6;
1344
1345 spin_lock_irqsave(&chip->lock, flags);
1346
1347 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1348 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1349 change = left != chip->image[CS4231_LEFT_INPUT] ||
1350 right != chip->image[CS4231_RIGHT_INPUT];
1351 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1352 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1353
1354 spin_unlock_irqrestore(&chip->lock, flags);
1355
1356 return change;
1357 }
1358
1359 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1360 struct snd_ctl_elem_info *uinfo)
1361 {
1362 int mask = (kcontrol->private_value >> 16) & 0xff;
1363
1364 uinfo->type = (mask == 1) ?
1365 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1366 uinfo->count = 1;
1367 uinfo->value.integer.min = 0;
1368 uinfo->value.integer.max = mask;
1369
1370 return 0;
1371 }
1372
1373 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1374 struct snd_ctl_elem_value *ucontrol)
1375 {
1376 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1377 unsigned long flags;
1378 int reg = kcontrol->private_value & 0xff;
1379 int shift = (kcontrol->private_value >> 8) & 0xff;
1380 int mask = (kcontrol->private_value >> 16) & 0xff;
1381 int invert = (kcontrol->private_value >> 24) & 0xff;
1382
1383 spin_lock_irqsave(&chip->lock, flags);
1384
1385 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1386
1387 spin_unlock_irqrestore(&chip->lock, flags);
1388
1389 if (invert)
1390 ucontrol->value.integer.value[0] =
1391 (mask - ucontrol->value.integer.value[0]);
1392
1393 return 0;
1394 }
1395
1396 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1397 struct snd_ctl_elem_value *ucontrol)
1398 {
1399 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1400 unsigned long flags;
1401 int reg = kcontrol->private_value & 0xff;
1402 int shift = (kcontrol->private_value >> 8) & 0xff;
1403 int mask = (kcontrol->private_value >> 16) & 0xff;
1404 int invert = (kcontrol->private_value >> 24) & 0xff;
1405 int change;
1406 unsigned short val;
1407
1408 val = (ucontrol->value.integer.value[0] & mask);
1409 if (invert)
1410 val = mask - val;
1411 val <<= shift;
1412
1413 spin_lock_irqsave(&chip->lock, flags);
1414
1415 val = (chip->image[reg] & ~(mask << shift)) | val;
1416 change = val != chip->image[reg];
1417 snd_cs4231_out(chip, reg, val);
1418
1419 spin_unlock_irqrestore(&chip->lock, flags);
1420
1421 return change;
1422 }
1423
1424 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_info *uinfo)
1426 {
1427 int mask = (kcontrol->private_value >> 24) & 0xff;
1428
1429 uinfo->type = mask == 1 ?
1430 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1431 uinfo->count = 2;
1432 uinfo->value.integer.min = 0;
1433 uinfo->value.integer.max = mask;
1434
1435 return 0;
1436 }
1437
1438 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1440 {
1441 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1442 unsigned long flags;
1443 int left_reg = kcontrol->private_value & 0xff;
1444 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1445 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1446 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1447 int mask = (kcontrol->private_value >> 24) & 0xff;
1448 int invert = (kcontrol->private_value >> 22) & 1;
1449
1450 spin_lock_irqsave(&chip->lock, flags);
1451
1452 ucontrol->value.integer.value[0] =
1453 (chip->image[left_reg] >> shift_left) & mask;
1454 ucontrol->value.integer.value[1] =
1455 (chip->image[right_reg] >> shift_right) & mask;
1456
1457 spin_unlock_irqrestore(&chip->lock, flags);
1458
1459 if (invert) {
1460 ucontrol->value.integer.value[0] =
1461 (mask - ucontrol->value.integer.value[0]);
1462 ucontrol->value.integer.value[1] =
1463 (mask - ucontrol->value.integer.value[1]);
1464 }
1465
1466 return 0;
1467 }
1468
1469 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1470 struct snd_ctl_elem_value *ucontrol)
1471 {
1472 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1473 unsigned long flags;
1474 int left_reg = kcontrol->private_value & 0xff;
1475 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1476 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1477 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1478 int mask = (kcontrol->private_value >> 24) & 0xff;
1479 int invert = (kcontrol->private_value >> 22) & 1;
1480 int change;
1481 unsigned short val1, val2;
1482
1483 val1 = ucontrol->value.integer.value[0] & mask;
1484 val2 = ucontrol->value.integer.value[1] & mask;
1485 if (invert) {
1486 val1 = mask - val1;
1487 val2 = mask - val2;
1488 }
1489 val1 <<= shift_left;
1490 val2 <<= shift_right;
1491
1492 spin_lock_irqsave(&chip->lock, flags);
1493
1494 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1495 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1496 change = val1 != chip->image[left_reg];
1497 change |= val2 != chip->image[right_reg];
1498 snd_cs4231_out(chip, left_reg, val1);
1499 snd_cs4231_out(chip, right_reg, val2);
1500
1501 spin_unlock_irqrestore(&chip->lock, flags);
1502
1503 return change;
1504 }
1505
1506 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1507 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1508 .info = snd_cs4231_info_single, \
1509 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1510 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1511
1512 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1513 shift_right, mask, invert) \
1514 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1515 .info = snd_cs4231_info_double, \
1516 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1517 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1518 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1519
1520 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1521 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1522 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1523 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1524 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1525 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1526 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1527 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1528 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1529 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1530 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1531 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1532 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1533 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1534 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1535 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1536 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1537 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1538 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1539 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1540 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1541 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1542 15, 0),
1543 {
1544 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1545 .name = "Capture Source",
1546 .info = snd_cs4231_info_mux,
1547 .get = snd_cs4231_get_mux,
1548 .put = snd_cs4231_put_mux,
1549 },
1550 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1551 1, 0),
1552 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1553 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1554 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1555 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1556 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1557 };
1558
1559 static int __init snd_cs4231_mixer(struct snd_card *card)
1560 {
1561 struct snd_cs4231 *chip = card->private_data;
1562 int err, idx;
1563
1564 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1565
1566 strcpy(card->mixername, chip->pcm->name);
1567
1568 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1569 err = snd_ctl_add(card,
1570 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1571 if (err < 0)
1572 return err;
1573 }
1574 return 0;
1575 }
1576
1577 static int dev;
1578
1579 static int __init cs4231_attach_begin(struct snd_card **rcard)
1580 {
1581 struct snd_card *card;
1582 struct snd_cs4231 *chip;
1583
1584 *rcard = NULL;
1585
1586 if (dev >= SNDRV_CARDS)
1587 return -ENODEV;
1588
1589 if (!enable[dev]) {
1590 dev++;
1591 return -ENOENT;
1592 }
1593
1594 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1595 sizeof(struct snd_cs4231));
1596 if (card == NULL)
1597 return -ENOMEM;
1598
1599 strcpy(card->driver, "CS4231");
1600 strcpy(card->shortname, "Sun CS4231");
1601
1602 chip = card->private_data;
1603 chip->card = card;
1604
1605 *rcard = card;
1606 return 0;
1607 }
1608
1609 static int __init cs4231_attach_finish(struct snd_card *card)
1610 {
1611 struct snd_cs4231 *chip = card->private_data;
1612 int err;
1613
1614 err = snd_cs4231_pcm(card);
1615 if (err < 0)
1616 goto out_err;
1617
1618 err = snd_cs4231_mixer(card);
1619 if (err < 0)
1620 goto out_err;
1621
1622 err = snd_cs4231_timer(card);
1623 if (err < 0)
1624 goto out_err;
1625
1626 err = snd_card_register(card);
1627 if (err < 0)
1628 goto out_err;
1629
1630 chip->next = cs4231_list;
1631 cs4231_list = chip;
1632
1633 dev++;
1634 return 0;
1635
1636 out_err:
1637 snd_card_free(card);
1638 return err;
1639 }
1640
1641 #ifdef SBUS_SUPPORT
1642
1643 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1644 {
1645 unsigned long flags;
1646 unsigned char status;
1647 u32 csr;
1648 struct snd_cs4231 *chip = dev_id;
1649
1650 /*This is IRQ is not raised by the cs4231*/
1651 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1652 return IRQ_NONE;
1653
1654 /* ACK the APC interrupt. */
1655 csr = sbus_readl(chip->port + APCCSR);
1656
1657 sbus_writel(csr, chip->port + APCCSR);
1658
1659 if ((csr & APC_PDMA_READY) &&
1660 (csr & APC_PLAY_INT) &&
1661 (csr & APC_XINT_PNVA) &&
1662 !(csr & APC_XINT_EMPT))
1663 snd_cs4231_play_callback(chip);
1664
1665 if ((csr & APC_CDMA_READY) &&
1666 (csr & APC_CAPT_INT) &&
1667 (csr & APC_XINT_CNVA) &&
1668 !(csr & APC_XINT_EMPT))
1669 snd_cs4231_capture_callback(chip);
1670
1671 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1672
1673 if (status & CS4231_TIMER_IRQ) {
1674 if (chip->timer)
1675 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1676 }
1677
1678 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1679 snd_cs4231_overrange(chip);
1680
1681 /* ACK the CS4231 interrupt. */
1682 spin_lock_irqsave(&chip->lock, flags);
1683 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1684 spin_unlock_irqrestore(&chip->lock, flags);
1685
1686 return IRQ_HANDLED;
1687 }
1688
1689 /*
1690 * SBUS DMA routines
1691 */
1692
1693 static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1694 dma_addr_t bus_addr, size_t len)
1695 {
1696 unsigned long flags;
1697 u32 test, csr;
1698 int err;
1699 struct sbus_dma_info *base = &dma_cont->sbus_info;
1700
1701 if (len >= (1 << 24))
1702 return -EINVAL;
1703 spin_lock_irqsave(&base->lock, flags);
1704 csr = sbus_readl(base->regs + APCCSR);
1705 err = -EINVAL;
1706 test = APC_CDMA_READY;
1707 if (base->dir == APC_PLAY)
1708 test = APC_PDMA_READY;
1709 if (!(csr & test))
1710 goto out;
1711 err = -EBUSY;
1712 test = APC_XINT_CNVA;
1713 if (base->dir == APC_PLAY)
1714 test = APC_XINT_PNVA;
1715 if (!(csr & test))
1716 goto out;
1717 err = 0;
1718 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1719 sbus_writel(len, base->regs + base->dir + APCNC);
1720 out:
1721 spin_unlock_irqrestore(&base->lock, flags);
1722 return err;
1723 }
1724
1725 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1726 {
1727 unsigned long flags;
1728 u32 csr, test;
1729 struct sbus_dma_info *base = &dma_cont->sbus_info;
1730
1731 spin_lock_irqsave(&base->lock, flags);
1732 csr = sbus_readl(base->regs + APCCSR);
1733 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1734 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1735 APC_XINT_PENA;
1736 if (base->dir == APC_RECORD)
1737 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1738 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1739 csr |= test;
1740 sbus_writel(csr, base->regs + APCCSR);
1741 spin_unlock_irqrestore(&base->lock, flags);
1742 }
1743
1744 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1745 {
1746 unsigned long flags;
1747 u32 csr, shift;
1748 struct sbus_dma_info *base = &dma_cont->sbus_info;
1749
1750 spin_lock_irqsave(&base->lock, flags);
1751 if (!on) {
1752 sbus_writel(0, base->regs + base->dir + APCNC);
1753 sbus_writel(0, base->regs + base->dir + APCNVA);
1754 if (base->dir == APC_PLAY) {
1755 sbus_writel(0, base->regs + base->dir + APCC);
1756 sbus_writel(0, base->regs + base->dir + APCVA);
1757 }
1758
1759 udelay(1200);
1760 }
1761 csr = sbus_readl(base->regs + APCCSR);
1762 shift = 0;
1763 if (base->dir == APC_PLAY)
1764 shift = 1;
1765 if (on)
1766 csr &= ~(APC_CPAUSE << shift);
1767 else
1768 csr |= (APC_CPAUSE << shift);
1769 sbus_writel(csr, base->regs + APCCSR);
1770 if (on)
1771 csr |= (APC_CDMA_READY << shift);
1772 else
1773 csr &= ~(APC_CDMA_READY << shift);
1774 sbus_writel(csr, base->regs + APCCSR);
1775
1776 spin_unlock_irqrestore(&base->lock, flags);
1777 }
1778
1779 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1780 {
1781 struct sbus_dma_info *base = &dma_cont->sbus_info;
1782
1783 return sbus_readl(base->regs + base->dir + APCVA);
1784 }
1785
1786 static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1787 {
1788 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1789 snd_dma_sbus_data(chip->dev_u.sdev),
1790 64 * 1024, 128 * 1024);
1791 }
1792
1793 /*
1794 * Init and exit routines
1795 */
1796
1797 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1798 {
1799 if (chip->irq[0])
1800 free_irq(chip->irq[0], chip);
1801
1802 if (chip->port)
1803 sbus_iounmap(chip->port, chip->regs_size);
1804
1805 return 0;
1806 }
1807
1808 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1809 {
1810 struct snd_cs4231 *cp = device->device_data;
1811
1812 return snd_cs4231_sbus_free(cp);
1813 }
1814
1815 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1816 .dev_free = snd_cs4231_sbus_dev_free,
1817 };
1818
1819 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1820 struct sbus_dev *sdev,
1821 int dev)
1822 {
1823 struct snd_cs4231 *chip = card->private_data;
1824 int err;
1825
1826 spin_lock_init(&chip->lock);
1827 spin_lock_init(&chip->c_dma.sbus_info.lock);
1828 spin_lock_init(&chip->p_dma.sbus_info.lock);
1829 mutex_init(&chip->mce_mutex);
1830 mutex_init(&chip->open_mutex);
1831 chip->dev_u.sdev = sdev;
1832 chip->regs_size = sdev->reg_addrs[0].reg_size;
1833 memcpy(&chip->image, &snd_cs4231_original_image,
1834 sizeof(snd_cs4231_original_image));
1835
1836 chip->port = sbus_ioremap(&sdev->resource[0], 0,
1837 chip->regs_size, "cs4231");
1838 if (!chip->port) {
1839 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1840 return -EIO;
1841 }
1842
1843 chip->c_dma.sbus_info.regs = chip->port;
1844 chip->p_dma.sbus_info.regs = chip->port;
1845 chip->c_dma.sbus_info.dir = APC_RECORD;
1846 chip->p_dma.sbus_info.dir = APC_PLAY;
1847
1848 chip->p_dma.prepare = sbus_dma_prepare;
1849 chip->p_dma.enable = sbus_dma_enable;
1850 chip->p_dma.request = sbus_dma_request;
1851 chip->p_dma.address = sbus_dma_addr;
1852 chip->p_dma.preallocate = sbus_dma_preallocate;
1853
1854 chip->c_dma.prepare = sbus_dma_prepare;
1855 chip->c_dma.enable = sbus_dma_enable;
1856 chip->c_dma.request = sbus_dma_request;
1857 chip->c_dma.address = sbus_dma_addr;
1858 chip->c_dma.preallocate = sbus_dma_preallocate;
1859
1860 if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
1861 IRQF_SHARED, "cs4231", chip)) {
1862 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1863 dev, sdev->irqs[0]);
1864 snd_cs4231_sbus_free(chip);
1865 return -EBUSY;
1866 }
1867 chip->irq[0] = sdev->irqs[0];
1868
1869 if (snd_cs4231_probe(chip) < 0) {
1870 snd_cs4231_sbus_free(chip);
1871 return -ENODEV;
1872 }
1873 snd_cs4231_init(chip);
1874
1875 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1876 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1877 snd_cs4231_sbus_free(chip);
1878 return err;
1879 }
1880
1881 return 0;
1882 }
1883
1884 static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
1885 {
1886 struct resource *rp = &sdev->resource[0];
1887 struct snd_card *card;
1888 int err;
1889
1890 err = cs4231_attach_begin(&card);
1891 if (err)
1892 return err;
1893
1894 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1895 card->shortname,
1896 rp->flags & 0xffL,
1897 (unsigned long long)rp->start,
1898 sdev->irqs[0]);
1899
1900 err = snd_cs4231_sbus_create(card, sdev, dev);
1901 if (err < 0) {
1902 snd_card_free(card);
1903 return err;
1904 }
1905
1906 return cs4231_attach_finish(card);
1907 }
1908 #endif
1909
1910 #ifdef EBUS_SUPPORT
1911
1912 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1913 void *cookie)
1914 {
1915 struct snd_cs4231 *chip = cookie;
1916
1917 snd_cs4231_play_callback(chip);
1918 }
1919
1920 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1921 int event, void *cookie)
1922 {
1923 struct snd_cs4231 *chip = cookie;
1924
1925 snd_cs4231_capture_callback(chip);
1926 }
1927
1928 /*
1929 * EBUS DMA wrappers
1930 */
1931
1932 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1933 dma_addr_t bus_addr, size_t len)
1934 {
1935 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1936 }
1937
1938 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1939 {
1940 ebus_dma_enable(&dma_cont->ebus_info, on);
1941 }
1942
1943 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1944 {
1945 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1946 }
1947
1948 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1949 {
1950 return ebus_dma_addr(&dma_cont->ebus_info);
1951 }
1952
1953 static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1954 {
1955 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1956 snd_dma_pci_data(chip->dev_u.pdev),
1957 64*1024, 128*1024);
1958 }
1959
1960 /*
1961 * Init and exit routines
1962 */
1963
1964 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1965 {
1966 if (chip->c_dma.ebus_info.regs) {
1967 ebus_dma_unregister(&chip->c_dma.ebus_info);
1968 iounmap(chip->c_dma.ebus_info.regs);
1969 }
1970 if (chip->p_dma.ebus_info.regs) {
1971 ebus_dma_unregister(&chip->p_dma.ebus_info);
1972 iounmap(chip->p_dma.ebus_info.regs);
1973 }
1974
1975 if (chip->port)
1976 iounmap(chip->port);
1977
1978 return 0;
1979 }
1980
1981 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1982 {
1983 struct snd_cs4231 *cp = device->device_data;
1984
1985 return snd_cs4231_ebus_free(cp);
1986 }
1987
1988 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1989 .dev_free = snd_cs4231_ebus_dev_free,
1990 };
1991
1992 static int __init snd_cs4231_ebus_create(struct snd_card *card,
1993 struct linux_ebus_device *edev,
1994 int dev)
1995 {
1996 struct snd_cs4231 *chip = card->private_data;
1997 int err;
1998
1999 spin_lock_init(&chip->lock);
2000 spin_lock_init(&chip->c_dma.ebus_info.lock);
2001 spin_lock_init(&chip->p_dma.ebus_info.lock);
2002 mutex_init(&chip->mce_mutex);
2003 mutex_init(&chip->open_mutex);
2004 chip->flags |= CS4231_FLAG_EBUS;
2005 chip->dev_u.pdev = edev->bus->self;
2006 memcpy(&chip->image, &snd_cs4231_original_image,
2007 sizeof(snd_cs4231_original_image));
2008 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2009 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2010 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2011 chip->c_dma.ebus_info.client_cookie = chip;
2012 chip->c_dma.ebus_info.irq = edev->irqs[0];
2013 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2014 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2015 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2016 chip->p_dma.ebus_info.client_cookie = chip;
2017 chip->p_dma.ebus_info.irq = edev->irqs[1];
2018
2019 chip->p_dma.prepare = _ebus_dma_prepare;
2020 chip->p_dma.enable = _ebus_dma_enable;
2021 chip->p_dma.request = _ebus_dma_request;
2022 chip->p_dma.address = _ebus_dma_addr;
2023 chip->p_dma.preallocate = _ebus_dma_preallocate;
2024
2025 chip->c_dma.prepare = _ebus_dma_prepare;
2026 chip->c_dma.enable = _ebus_dma_enable;
2027 chip->c_dma.request = _ebus_dma_request;
2028 chip->c_dma.address = _ebus_dma_addr;
2029 chip->c_dma.preallocate = _ebus_dma_preallocate;
2030
2031 chip->port = ioremap(edev->resource[0].start, 0x10);
2032 chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2033 chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
2034 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2035 !chip->c_dma.ebus_info.regs) {
2036 snd_cs4231_ebus_free(chip);
2037 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2038 return -EIO;
2039 }
2040
2041 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2042 snd_cs4231_ebus_free(chip);
2043 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2044 dev);
2045 return -EBUSY;
2046 }
2047 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2048 snd_cs4231_ebus_free(chip);
2049 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2050 dev);
2051 return -EBUSY;
2052 }
2053
2054 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2055 snd_cs4231_ebus_free(chip);
2056 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2057 dev);
2058 return -EBUSY;
2059 }
2060 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2061 snd_cs4231_ebus_free(chip);
2062 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2063 return -EBUSY;
2064 }
2065
2066 if (snd_cs4231_probe(chip) < 0) {
2067 snd_cs4231_ebus_free(chip);
2068 return -ENODEV;
2069 }
2070 snd_cs4231_init(chip);
2071
2072 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2073 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2074 snd_cs4231_ebus_free(chip);
2075 return err;
2076 }
2077
2078 return 0;
2079 }
2080
2081 static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
2082 {
2083 struct snd_card *card;
2084 int err;
2085
2086 err = cs4231_attach_begin(&card);
2087 if (err)
2088 return err;
2089
2090 sprintf(card->longname, "%s at 0x%lx, irq %d",
2091 card->shortname,
2092 edev->resource[0].start,
2093 edev->irqs[0]);
2094
2095 err = snd_cs4231_ebus_create(card, edev, dev);
2096 if (err < 0) {
2097 snd_card_free(card);
2098 return err;
2099 }
2100
2101 return cs4231_attach_finish(card);
2102 }
2103 #endif
2104
2105 static int __init cs4231_init(void)
2106 {
2107 #ifdef SBUS_SUPPORT
2108 struct sbus_bus *sbus;
2109 struct sbus_dev *sdev;
2110 #endif
2111 #ifdef EBUS_SUPPORT
2112 struct linux_ebus *ebus;
2113 struct linux_ebus_device *edev;
2114 #endif
2115 int found;
2116
2117 found = 0;
2118
2119 #ifdef SBUS_SUPPORT
2120 for_all_sbusdev(sdev, sbus) {
2121 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2122 if (cs4231_sbus_attach(sdev) == 0)
2123 found++;
2124 }
2125 }
2126 #endif
2127 #ifdef EBUS_SUPPORT
2128 for_each_ebus(ebus) {
2129 for_each_ebusdev(edev, ebus) {
2130 int match = 0;
2131
2132 if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
2133 match = 1;
2134 } else if (!strcmp(edev->prom_node->name, "audio")) {
2135 const char *compat;
2136
2137 compat = of_get_property(edev->prom_node,
2138 "compatible", NULL);
2139 if (compat && !strcmp(compat, "SUNW,CS4231"))
2140 match = 1;
2141 }
2142
2143 if (match &&
2144 cs4231_ebus_attach(edev) == 0)
2145 found++;
2146 }
2147 }
2148 #endif
2149
2150
2151 return (found > 0) ? 0 : -EIO;
2152 }
2153
2154 static void __exit cs4231_exit(void)
2155 {
2156 struct snd_cs4231 *p = cs4231_list;
2157
2158 while (p != NULL) {
2159 struct snd_cs4231 *next = p->next;
2160
2161 snd_card_free(p->card);
2162
2163 p = next;
2164 }
2165
2166 cs4231_list = NULL;
2167 }
2168
2169 module_init(cs4231_init);
2170 module_exit(cs4231_exit);
WRT350N Kernel Patches