arch/mips/mips-boards/malta/malta_setup.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License along
  15  *  with this program; if not, write to the Free Software Foundation, Inc.,
  16  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17  */
  18 #include <linux/init.h>
  19 #include <linux/sched.h>
  20 #include <linux/ioport.h>
  21 #include <linux/pci.h>
  22 #include <linux/screen_info.h>
  23
  24 #include <asm/cpu.h>
  25 #include <asm/bootinfo.h>
  26 #include <asm/irq.h>
  27 #include <asm/mips-boards/generic.h>
  28 #include <asm/mips-boards/prom.h>
  29 #include <asm/mips-boards/malta.h>
  30 #include <asm/mips-boards/maltaint.h>
  31 #include <asm/dma.h>
  32 #include <asm/time.h>
  33 #include <asm/traps.h>
  34 #ifdef CONFIG_VT
  35 #include <linux/console.h>
  36 #endif
  37
  38 extern void mips_reboot_setup(void);
  39 extern unsigned long mips_rtc_get_time(void);
  40
  41 #ifdef CONFIG_KGDB
  42 extern void kgdb_config(void);
  43 #endif
  44
  45 struct resource standard_io_resources[] = {
  46         { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY },
  47         { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY },
  48         { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY },
  49         { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY },
  50         { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY },
  51 };
  52
  53 const char *get_system_type(void)
  54 {
  55         return "MIPS Malta";
  56 }
  57
  58 #if defined(CONFIG_MIPS_MT_SMTC)
  59 const char display_string[] = "       SMTC LINUX ON MALTA       ";
  60 #else
  61 const char display_string[] = "        LINUX ON MALTA       ";
  62 #endif /* CONFIG_MIPS_MT_SMTC */
  63
  64 #ifdef CONFIG_BLK_DEV_FD
  65 void __init fd_activate(void)
  66 {
  67         /*
  68          * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
  69          * Controller.
  70          * Done by YAMON 2.00 onwards
  71          */
  72         /* Entering config state. */
  73         SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
  74
  75         /* Activate floppy controller. */
  76         SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
  77         SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
  78         SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
  79         SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
  80
  81         /* Exit config state. */
  82         SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
  83 }
  84 #endif
  85
  86 void __init plat_mem_setup(void)
  87 {
  88         unsigned int i;
  89
  90         mips_pcibios_init();
  91
  92         /* Request I/O space for devices used on the Malta board. */
  93         for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
  94                 request_resource(&ioport_resource, standard_io_resources+i);
  95
  96         /*
  97          * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
  98          */
  99         enable_dma(4);
 100
 101 #ifdef CONFIG_KGDB
 102         kgdb_config();
 103 #endif
 104
 105         if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
 106                 char *argptr;
 107
 108                 argptr = prom_getcmdline();
 109                 if (strstr(argptr, "debug")) {
 110                         BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
 111                         printk("Enabled Bonito debug mode\n");
 112                 }
 113                 else
 114                         BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
 115
 116 #ifdef CONFIG_DMA_COHERENT
 117                 if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
 118                         BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
 119                         printk("Enabled Bonito CPU coherency\n");
 120
 121                         argptr = prom_getcmdline();
 122                         if (strstr(argptr, "iobcuncached")) {
 123                                 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
 124                                 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
 125                                         ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 126                                           BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 127                                 printk("Disabled Bonito IOBC coherency\n");
 128                         }
 129                         else {
 130                                 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
 131                                 BONITO_PCIMEMBASECFG |=
 132                                         (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 133                                          BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 134                                 printk("Enabled Bonito IOBC coherency\n");
 135                         }
 136                 }
 137                 else
 138                         panic("Hardware DMA cache coherency not supported");
 139
 140 #endif
 141         }
 142 #ifdef CONFIG_DMA_COHERENT
 143         else {
 144                 panic("Hardware DMA cache coherency not supported");
 145         }
 146 #endif
 147
 148 #ifdef CONFIG_BLK_DEV_IDE
 149         /* Check PCI clock */
 150         {
 151                 unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
 152                 int jmpr = (readw(jmpr_p) >> 2) & 0x07;
 153                 static const int pciclocks[] __initdata = {
 154                         33, 20, 25, 30, 12, 16, 37, 10
 155                 };
 156                 int pciclock = pciclocks[jmpr];
 157                 char *argptr = prom_getcmdline();
 158
 159                 if (pciclock != 33 && !strstr (argptr, "idebus=")) {
 160                         printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
 161                         argptr += strlen(argptr);
 162                         sprintf(argptr, " idebus=%d", pciclock);
 163                         if (pciclock < 20 || pciclock > 66)
 164                                 printk("WARNING: IDE timing calculations will be incorrect\n");
 165                 }
 166         }
 167 #endif
 168 #ifdef CONFIG_BLK_DEV_FD
 169         fd_activate();
 170 #endif
 171 #ifdef CONFIG_VT
 172 #if defined(CONFIG_VGA_CONSOLE)
 173         screen_info = (struct screen_info) {
 174                 0, 25,                  /* orig-x, orig-y */
 175                 0,                      /* unused */
 176                 0,                      /* orig-video-page */
 177                 0,                      /* orig-video-mode */
 178                 80,                     /* orig-video-cols */
 179                 0, 0, 0,                /* ega_ax, ega_bx, ega_cx */
 180                 25,                     /* orig-video-lines */
 181                 VIDEO_TYPE_VGAC,        /* orig-video-isVGA */
 182                 16                      /* orig-video-points */
 183         };
 184 #endif
 185 #endif
 186         mips_reboot_setup();
 187 }