x86: fix bogus KERN_ALERT on oops
[wrt350n-kernel.git] / arch / mips / pci / fixup-jmr3927.c
blobe974394be7bc271b4e18e35130e3328ed1a73c7e
1 /*
3 * BRIEF MODULE DESCRIPTION
4 * Board specific pci fixups.
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 #include <linux/types.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
34 #include <asm/jmr3927/jmr3927.h>
36 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
38 unsigned char irq = pin;
40 /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
41 if (dev->vendor == PCI_VENDOR_ID_EFAR &&
42 dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
43 return irq;
44 /* IRQ rotation (PICMG) */
45 irq--; /* 0-3 */
46 if (dev->bus->parent == NULL &&
47 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
48 /* PCI CardSlot (IDSEL=A23, DevNu=12) */
49 /* PCIA => PCIC (IDSEL=A23) */
50 /* NOTE: JMR3927 JP1 must be set to OPEN */
51 irq = (irq + 2) % 4;
52 } else if (dev->bus->parent == NULL &&
53 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
54 /* PCI CardSlot (IDSEL=A22, DevNu=11) */
55 /* PCIA => PCIA (IDSEL=A22) */
56 /* NOTE: JMR3927 JP1 must be set to OPEN */
57 irq = (irq + 0) % 4;
58 } else {
59 /* PCI Backplane */
60 irq = (irq + 3 + slot) % 4;
62 irq++; /* 1-4 */
64 switch (irq) {
65 case 1:
66 irq = JMR3927_IRQ_IOC_PCIA;
67 break;
68 case 2:
69 // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;
70 irq = JMR3927_IRQ_IOC_PCID;
71 break;
72 case 3:
73 irq = JMR3927_IRQ_IOC_PCIC;
74 break;
75 case 4:
76 // wrong for backplane irq = JMR3927_IRQ_IOC_PCID;
77 irq = JMR3927_IRQ_IOC_PCIB;
78 break;
81 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
82 if (dev->bus->parent == NULL &&
83 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
84 irq = JMR3927_IRQ_ETHER0;
85 return irq;
88 /* Do platform specific device initialization at pci_enable_device() time */
89 int pcibios_plat_dev_init(struct pci_dev *dev)
91 return 0;