arch/powerpc/boot/treeboot-walnut.c

   1 /*
   2  * Old U-boot compatibility for Walnut
   3  *
   4  * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
   5  *
   6  * Copyright 2007 IBM Corporation
   7  *   Based on cuboot-83xx.c, which is:
   8  * Copyright (c) 2007 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published
  12  * by the Free Software Foundation.
  13  */
  14
  15 #include "ops.h"
  16 #include "stdio.h"
  17 #include "dcr.h"
  18 #include "4xx.h"
  19 #include "io.h"
  20
  21 BSS_STACK(4096);
  22
  23 void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
  24 {
  25         u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
  26         u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
  27         u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
  28         u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
  29         u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
  30
  31         fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
  32         fbdv = (pllmr & 0x1e000000) >> 25;
  33         cbdv = ((pllmr & 0x00060000) >> 17) + 1;
  34         opdv = ((pllmr & 0x00018000) >> 15) + 1;
  35         epdv = ((pllmr & 0x00001800) >> 13) + 2;
  36         udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
  37
  38         m = fwdv * fbdv * cbdv;
  39
  40         cpu = sysclk * m / fwdv;
  41         plb = cpu / cbdv;
  42         opb = plb / opdv;
  43         ebc = plb / epdv;
  44
  45         if (cpc0_cr0 & 0x80) {
  46                 /* uart0 uses the external clock */
  47                 uart0 = ser_clk;
  48         } else {
  49                 uart0 = cpu / udiv;
  50         }
  51
  52         if (cpc0_cr0 & 0x40) {
  53                 /* uart1 uses the external clock */
  54                 uart1 = ser_clk;
  55         } else {
  56                 uart1 = cpu / udiv;
  57         }
  58
  59         /* setup the timebase clock to tick at the cpu frequency */
  60         cpc0_cr1 = cpc0_cr1 & ~0x00800000;
  61         mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
  62         tb = cpu;
  63
  64         dt_fixup_cpu_clocks(cpu, tb, 0);
  65         dt_fixup_clock("/plb", plb);
  66         dt_fixup_clock("/plb/opb", opb);
  67         dt_fixup_clock("/plb/ebc", ebc);
  68         dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
  69         dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
  70 }
  71
  72 static void walnut_flashsel_fixup(void)
  73 {
  74         void *devp, *sram;
  75         u32 reg_flash[3] = {0x0, 0x0, 0x80000};
  76         u32 reg_sram[3] = {0x0, 0x0, 0x80000};
  77         u8 *fpga;
  78         u8 fpga_brds1 = 0x0;
  79
  80         devp = finddevice("/plb/ebc/fpga");
  81         if (!devp)
  82                 fatal("Couldn't locate FPGA node\n\r");
  83
  84         if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
  85                 fatal("no virtual-reg property\n\r");
  86
  87         fpga_brds1 = in_8(fpga);
  88
  89         devp = finddevice("/plb/ebc/flash");
  90         if (!devp)
  91                 fatal("Couldn't locate flash node\n\r");
  92
  93         if (getprop(devp, "reg", reg_flash, sizeof(reg_flash)) != sizeof(reg_flash))
  94                 fatal("flash reg property has unexpected size\n\r");
  95
  96         sram = finddevice("/plb/ebc/sram");
  97         if (!sram)
  98                 fatal("Couldn't locate sram node\n\r");
  99
 100         if (getprop(sram, "reg", reg_sram, sizeof(reg_sram)) != sizeof(reg_sram))
 101                 fatal("sram reg property has unexpected size\n\r");
 102
 103         if (fpga_brds1 & 0x1) {
 104                 reg_flash[1] ^= 0x80000;
 105                 reg_sram[1] ^= 0x80000;
 106         }
 107
 108         setprop(devp, "reg", reg_flash, sizeof(reg_flash));
 109         setprop(sram, "reg", reg_sram, sizeof(reg_sram));
 110 }
 111
 112 #define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b
 113 static void walnut_fixups(void)
 114 {
 115         ibm4xx_fixup_memsize();
 116         ibm405gp_fixup_clocks(33330000, 0xa8c000);
 117         ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
 118         ibm4xx_fixup_ebc_ranges("/plb/ebc");
 119         walnut_flashsel_fixup();
 120         dt_fixup_mac_addresses((u8 *) WALNUT_OPENBIOS_MAC_OFF);
 121 }
 122
 123 void platform_init(void)
 124 {
 125         unsigned long end_of_ram = 0x2000000;
 126         unsigned long avail_ram = end_of_ram - (unsigned long) _end;
 127
 128         simple_alloc_init(_end, avail_ram, 32, 32);
 129         platform_ops.fixups = walnut_fixups;
 130         platform_ops.exit = ibm40x_dbcr_reset;
 131         ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
 132         serial_console_init();
 133 }