x86: implement gbpages support in change_page_attr()
[wrt350n-kernel.git] / sound / pci / echoaudio / darla20_dsp.c
blob4159e3bc186f359ab3076dff75ce14c9f02b870b
1 /***************************************************************************
3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4 All rights reserved
5 www.echoaudio.com
7 This file is part of Echo Digital Audio's generic driver library.
9 Echo Digital Audio's generic driver library is free software;
10 you can redistribute it and/or modify it under the terms of
11 the GNU General Public License as published by the Free Software
12 Foundation.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
24 *************************************************************************
26 Translation from C++ and adaptation for use in ALSA-Driver
27 were made by Giuliano Pochini <pochini@shiny.it>
29 ****************************************************************************/
32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
34 int err;
36 DE_INIT(("init_hw() - Darla20\n"));
37 snd_assert((subdevice_id & 0xfff0) == DARLA20, return -ENODEV);
39 if ((err = init_dsp_comm_page(chip))) {
40 DE_INIT(("init_hw - could not initialize DSP comm page\n"));
41 return err;
44 chip->device_id = device_id;
45 chip->subdevice_id = subdevice_id;
46 chip->bad_board = TRUE;
47 chip->dsp_code_to_load = &card_fw[FW_DARLA20_DSP];
48 chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
49 chip->clock_state = GD_CLOCK_UNDEF;
50 /* Since this card has no ASIC, mark it as loaded so everything
51 works OK */
52 chip->asic_loaded = TRUE;
53 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
55 if ((err = load_firmware(chip)) < 0)
56 return err;
57 chip->bad_board = FALSE;
59 if ((err = init_line_levels(chip)) < 0)
60 return err;
62 DE_INIT(("init_hw done\n"));
63 return err;
68 /* The Darla20 has no external clock sources */
69 static u32 detect_input_clocks(const struct echoaudio *chip)
71 return ECHO_CLOCK_BIT_INTERNAL;
76 /* The Darla20 has no ASIC. Just do nothing */
77 static int load_asic(struct echoaudio *chip)
79 return 0;
84 static int set_sample_rate(struct echoaudio *chip, u32 rate)
86 u8 clock_state, spdif_status;
88 if (wait_handshake(chip))
89 return -EIO;
91 switch (rate) {
92 case 44100:
93 clock_state = GD_CLOCK_44;
94 spdif_status = GD_SPDIF_STATUS_44;
95 break;
96 case 48000:
97 clock_state = GD_CLOCK_48;
98 spdif_status = GD_SPDIF_STATUS_48;
99 break;
100 default:
101 clock_state = GD_CLOCK_NOCHANGE;
102 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
103 break;
106 if (chip->clock_state == clock_state)
107 clock_state = GD_CLOCK_NOCHANGE;
108 if (spdif_status == chip->spdif_status)
109 spdif_status = GD_SPDIF_STATUS_NOCHANGE;
111 chip->comm_page->sample_rate = cpu_to_le32(rate);
112 chip->comm_page->gd_clock_state = clock_state;
113 chip->comm_page->gd_spdif_status = spdif_status;
114 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
116 /* Save the new audio state if it changed */
117 if (clock_state != GD_CLOCK_NOCHANGE)
118 chip->clock_state = clock_state;
119 if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
120 chip->spdif_status = spdif_status;
121 chip->sample_rate = rate;
123 clear_handshake(chip);
124 return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);