3 Broadcom BCM43xx wireless driver
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
31 #ifndef BCM43xx_MAIN_H_
32 #define BCM43xx_MAIN_H_
36 #ifdef CONFIG_BCM947XX
37 #define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
39 static inline void e_aton(char *str
, char *dest
)
42 u16
*d
= (u16
*) dest
;
45 dest
[i
++] = (char) simple_strtoul(str
, NULL
, 16);
47 if (!*str
++ || i
== 6)
50 for (i
= 0; i
< 3; i
++)
51 d
[i
] = cpu_to_be16(d
[i
]);
56 #define _bcm43xx_declare_plcp_hdr(size) \
57 struct bcm43xx_plcp_hdr##size { \
61 } __attribute__((__packed__)); \
62 } __attribute__((__packed__))
64 /* struct bcm43xx_plcp_hdr4 */
65 _bcm43xx_declare_plcp_hdr(4);
66 /* struct bcm430c_plcp_hdr6 */
67 _bcm43xx_declare_plcp_hdr(6);
69 #undef _bcm43xx_declare_plcp_hdr
72 #define P4D_BYT3S(magic, nr_bytes) u8 __p4dding##magic[nr_bytes]
73 #define P4D_BYTES(line, nr_bytes) P4D_BYT3S(line, nr_bytes)
74 /* Magic helper macro to pad structures. Ignore those above. It's magic. */
75 #define PAD_BYTES(nr_bytes) P4D_BYTES( __LINE__ , (nr_bytes))
78 /* Device specific TX header. To be prepended to TX frames. */
79 struct bcm43xx_txhdr
{
87 unsigned char wep_iv
[10];
88 unsigned char unknown_wsec_tkip_data
[3]; //FIXME
90 unsigned char mac1
[6];
92 struct bcm43xx_plcp_hdr4 rts_cts_fallback_plcp
;
93 u16 rts_cts_dur_fallback
;
94 struct bcm43xx_plcp_hdr4 fallback_plcp
;
98 u16 unknown_scb_stuff
; //FIXME
99 struct bcm43xx_plcp_hdr6 rts_cts_plcp
;
100 u16 rts_cts_frame_type
;
102 unsigned char rts_cts_mac1
[6];
103 unsigned char rts_cts_mac2
[6];
105 struct bcm43xx_plcp_hdr6 plcp
;
106 } __attribute__((__packed__
));
108 unsigned char raw
[82];
109 } __attribute__((__packed__
));
110 } __attribute__((__packed__
));
114 void FASTCALL(bcm43xx_generate_txhdr(struct bcm43xx_private
*bcm
,
115 struct bcm43xx_txhdr
*txhdr
,
116 const unsigned char *fragment_data
,
117 const unsigned int fragment_len
,
118 const int is_first_fragment
,
121 /* RX header as received from the hardware. */
122 struct bcm43xx_rxhdr
{
123 /* Frame Length. Must be generated explicitely in PIO mode. */
135 /* Lower 16bits of the TSF at the time the frame started. */
138 } __attribute__((__packed__
));
140 #define BCM43xx_RXHDR_FLAGS1_OFDM (1 << 0)
141 /*#define BCM43xx_RXHDR_FLAGS1_SIGNAL??? (1 << 3) FIXME */
142 #define BCM43xx_RXHDR_FLAGS1_SHORTPREAMBLE (1 << 7)
143 #define BCM43xx_RXHDR_FLAGS1_2053RSSIADJ (1 << 14)
145 #define BCM43xx_RXHDR_FLAGS2_INVALIDFRAME (1 << 0)
146 #define BCM43xx_RXHDR_FLAGS2_TYPE2FRAME (1 << 2)
147 /*FIXME: WEP related flags */
149 #define BCM43xx_RXHDR_FLAGS3_2050RSSIADJ (1 << 10)
151 /* Transmit Status as received from the hardware. */
152 struct bcm43xx_hwxmitstatus
{
160 __le16 unknown
; //FIXME
161 } __attribute__((__packed__
));
163 /* Transmit Status in CPU byteorder. */
164 struct bcm43xx_xmitstatus
{
173 #define BCM43xx_TXSTAT_FLAG_ACK 0x01
174 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x02
175 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x04
176 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x08
177 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x10
178 #define BCM43xx_TXSTAT_FLAG_IGNORE 0x20
179 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x40
180 //TODO #define BCM43xx_TXSTAT_FLAG_??? 0x80
182 struct bcm43xx_xmitstatus_queue
{
183 struct list_head list
;
184 struct bcm43xx_hwxmitstatus status
;
188 /* Lightweight function to convert a frequency (in Mhz) to a channel number. */
190 u8
bcm43xx_freq_to_channel(struct bcm43xx_private
*bcm
,
195 if (bcm
->current_core
->phy
->type
== BCM43xx_PHYTYPE_A
) {
196 channel
= (freq
- 5000) / 5;
201 channel
= (freq
- 2407) / 5;
207 /* Lightweight function to convert a channel number to a frequency (in Mhz). */
209 int bcm43xx_channel_to_freq(struct bcm43xx_private
*bcm
,
214 if (bcm
->current_core
->phy
->type
== BCM43xx_PHYTYPE_A
) {
215 freq
= 5000 + (5 * channel
);
220 freq
= 2407 + (5 * channel
);
226 /* Lightweight function to check if a channel number is valid.
227 * Note that this does _NOT_ check for geographical restrictions!
230 int bcm43xx_is_valid_channel(struct bcm43xx_private
*bcm
,
233 if (bcm
->current_core
->phy
->type
== BCM43xx_PHYTYPE_A
) {
237 if (channel
>= 1 && channel
<= 14)
244 void bcm43xx_tsf_read(struct bcm43xx_private
*bcm
, u64
*tsf
);
245 void bcm43xx_tsf_write(struct bcm43xx_private
*bcm
, u64 tsf
);
247 int FASTCALL(bcm43xx_rx(struct bcm43xx_private
*bcm
,
249 struct bcm43xx_rxhdr
*rxhdr
));
251 void bcm43xx_set_iwmode(struct bcm43xx_private
*bcm
,
254 u32
bcm43xx_shm_read32(struct bcm43xx_private
*bcm
,
255 u16 routing
, u16 offset
);
256 u16
bcm43xx_shm_read16(struct bcm43xx_private
*bcm
,
257 u16 routing
, u16 offset
);
258 void bcm43xx_shm_write32(struct bcm43xx_private
*bcm
,
259 u16 routing
, u16 offset
,
261 void bcm43xx_shm_write16(struct bcm43xx_private
*bcm
,
262 u16 routing
, u16 offset
,
265 void bcm43xx_dummy_transmission(struct bcm43xx_private
*bcm
);
267 int bcm43xx_switch_core(struct bcm43xx_private
*bcm
, struct bcm43xx_coreinfo
*new_core
);
269 void bcm43xx_wireless_core_reset(struct bcm43xx_private
*bcm
, int connect_phy
);
271 int bcm43xx_pci_read_config_16(struct pci_dev
*pdev
, u16 offset
, u16
*val
);
272 int bcm43xx_pci_read_config_32(struct pci_dev
*pdev
, u16 offset
, u32
*val
);
273 int bcm43xx_pci_write_config_16(struct pci_dev
*pdev
, int offset
, u16 val
);
274 int bcm43xx_pci_write_config_32(struct pci_dev
*pdev
, int offset
, u32 val
);
276 void bcm43xx_mac_suspend(struct bcm43xx_private
*bcm
);
277 void bcm43xx_mac_enable(struct bcm43xx_private
*bcm
);
279 u8
bcm43xx_sprom_crc(const u16
*sprom
);
281 void bcm43xx_controller_restart(struct bcm43xx_private
*bcm
, const char *reason
);
283 #endif /* BCM43xx_MAIN_H_ */