arch/powerpc/platforms/86xx/mpc86xx_hpcn.c

   1 /*
   2  * MPC86xx HPCN board specific routines
   3  *
   4  * Recode: ZHANG WEI <wei.zhang@freescale.com>
   5  * Initial author: Xianghua Xiao <x.xiao@freescale.com>
   6  *
   7  * Copyright 2006 Freescale Semiconductor Inc.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 #include <linux/stddef.h>
  16 #include <linux/kernel.h>
  17 #include <linux/pci.h>
  18 #include <linux/kdev_t.h>
  19 #include <linux/delay.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/of_platform.h>
  22
  23 #include <asm/system.h>
  24 #include <asm/time.h>
  25 #include <asm/machdep.h>
  26 #include <asm/pci-bridge.h>
  27 #include <asm/mpc86xx.h>
  28 #include <asm/prom.h>
  29 #include <mm/mmu_decl.h>
  30 #include <asm/udbg.h>
  31 #include <asm/i8259.h>
  32
  33 #include <asm/mpic.h>
  34
  35 #include <sysdev/fsl_pci.h>
  36 #include <sysdev/fsl_soc.h>
  37
  38 #include "mpc86xx.h"
  39
  40 #undef DEBUG
  41
  42 #ifdef DEBUG
  43 #define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
  44 #else
  45 #define DBG(fmt...) do { } while(0)
  46 #endif
  47
  48 #ifdef CONFIG_PCI
  49 static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  50 {
  51         unsigned int cascade_irq = i8259_irq();
  52         if (cascade_irq != NO_IRQ)
  53                 generic_handle_irq(cascade_irq);
  54         desc->chip->eoi(irq);
  55 }
  56 #endif  /* CONFIG_PCI */
  57
  58 void __init
  59 mpc86xx_hpcn_init_irq(void)
  60 {
  61         struct mpic *mpic1;
  62         struct device_node *np;
  63         struct resource res;
  64 #ifdef CONFIG_PCI
  65         struct device_node *cascade_node = NULL;
  66         int cascade_irq;
  67 #endif
  68
  69         /* Determine PIC address. */
  70         np = of_find_node_by_type(NULL, "open-pic");
  71         if (np == NULL)
  72                 return;
  73         of_address_to_resource(np, 0, &res);
  74
  75         /* Alloc mpic structure and per isu has 16 INT entries. */
  76         mpic1 = mpic_alloc(np, res.start,
  77                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  78                         0, 256, " MPIC     ");
  79         BUG_ON(mpic1 == NULL);
  80
  81         mpic_init(mpic1);
  82
  83 #ifdef CONFIG_PCI
  84         /* Initialize i8259 controller */
  85         for_each_node_by_type(np, "interrupt-controller")
  86                 if (of_device_is_compatible(np, "chrp,iic")) {
  87                         cascade_node = np;
  88                         break;
  89                 }
  90         if (cascade_node == NULL) {
  91                 printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
  92                 return;
  93         }
  94
  95         cascade_irq = irq_of_parse_and_map(cascade_node, 0);
  96         if (cascade_irq == NO_IRQ) {
  97                 printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
  98                 return;
  99         }
 100         DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
 101
 102         i8259_init(cascade_node, 0);
 103         of_node_put(cascade_node);
 104
 105         set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
 106 #endif
 107 }
 108
 109 #ifdef CONFIG_PCI
 110 extern int uses_fsl_uli_m1575;
 111 extern int uli_exclude_device(struct pci_controller *hose,
 112                                 u_char bus, u_char devfn);
 113
 114 static int mpc86xx_exclude_device(struct pci_controller *hose,
 115                                    u_char bus, u_char devfn)
 116 {
 117         struct device_node* node;
 118         struct resource rsrc;
 119
 120         node = hose->dn;
 121         of_address_to_resource(node, 0, &rsrc);
 122
 123         if ((rsrc.start & 0xfffff) == 0x8000) {
 124                 return uli_exclude_device(hose, bus, devfn);
 125         }
 126
 127         return PCIBIOS_SUCCESSFUL;
 128 }
 129 #endif /* CONFIG_PCI */
 130
 131
 132 static void __init
 133 mpc86xx_hpcn_setup_arch(void)
 134 {
 135 #ifdef CONFIG_PCI
 136         struct device_node *np;
 137 #endif
 138
 139         if (ppc_md.progress)
 140                 ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
 141
 142 #ifdef CONFIG_PCI
 143         for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
 144                 struct resource rsrc;
 145                 of_address_to_resource(np, 0, &rsrc);
 146                 if ((rsrc.start & 0xfffff) == 0x8000)
 147                         fsl_add_bridge(np, 1);
 148                 else
 149                         fsl_add_bridge(np, 0);
 150         }
 151
 152         uses_fsl_uli_m1575 = 1;
 153         ppc_md.pci_exclude_device = mpc86xx_exclude_device;
 154
 155 #endif
 156
 157         printk("MPC86xx HPCN board from Freescale Semiconductor\n");
 158
 159 #ifdef CONFIG_SMP
 160         mpc86xx_smp_init();
 161 #endif
 162 }
 163
 164
 165 void
 166 mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
 167 {
 168         struct device_node *root;
 169         uint memsize = total_memory;
 170         const char *model = "";
 171         uint svid = mfspr(SPRN_SVR);
 172
 173         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 174
 175         root = of_find_node_by_path("/");
 176         if (root)
 177                 model = of_get_property(root, "model", NULL);
 178         seq_printf(m, "Machine\t\t: %s\n", model);
 179         of_node_put(root);
 180
 181         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 182         seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
 183 }
 184
 185
 186 /*
 187  * Called very early, device-tree isn't unflattened
 188  */
 189 static int __init mpc86xx_hpcn_probe(void)
 190 {
 191         unsigned long root = of_get_flat_dt_root();
 192
 193         if (of_flat_dt_is_compatible(root, "mpc86xx"))
 194                 return 1;       /* Looks good */
 195
 196         return 0;
 197 }
 198
 199 long __init
 200 mpc86xx_time_init(void)
 201 {
 202         unsigned int temp;
 203
 204         /* Set the time base to zero */
 205         mtspr(SPRN_TBWL, 0);
 206         mtspr(SPRN_TBWU, 0);
 207
 208         temp = mfspr(SPRN_HID0);
 209         temp |= HID0_TBEN;
 210         mtspr(SPRN_HID0, temp);
 211         asm volatile("isync");
 212
 213         return 0;
 214 }
 215
 216 static __initdata struct of_device_id of_bus_ids[] = {
 217         { .compatible = "simple-bus", },
 218         {},
 219 };
 220
 221 static int __init declare_of_platform_devices(void)
 222 {
 223         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 224
 225         return 0;
 226 }
 227 machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
 228
 229 define_machine(mpc86xx_hpcn) {
 230         .name                   = "MPC86xx HPCN",
 231         .probe                  = mpc86xx_hpcn_probe,
 232         .setup_arch             = mpc86xx_hpcn_setup_arch,
 233         .init_IRQ               = mpc86xx_hpcn_init_irq,
 234         .show_cpuinfo           = mpc86xx_hpcn_show_cpuinfo,
 235         .get_irq                = mpic_get_irq,
 236         .restart                = fsl_rstcr_restart,
 237         .time_init              = mpc86xx_time_init,
 238         .calibrate_decr         = generic_calibrate_decr,
 239         .progress               = udbg_progress,
 240 #ifdef CONFIG_PCI
 241         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 242 #endif
 243 };