1 /* semaphore.c: Sparc64 semaphore implementation.
3 * This is basically the PPC semaphore scheme ported to use
4 * the sparc64 atomic instructions, so see the PPC code for
8 #include <linux/sched.h>
9 #include <linux/errno.h>
10 #include <linux/init.h>
13 * Atomically update sem->count.
14 * This does the equivalent of the following:
16 * old_count = sem->count;
17 * tmp = MAX(old_count, 0) + incr;
21 static inline int __sem_update_count(struct semaphore
*sem
, int incr
)
25 __asm__
__volatile__("\n"
26 " ! __sem_update_count old_count(%0) tmp(%1) incr(%4) &sem->count(%3)\n"
30 " movl %%icc, 0, %1\n"
34 " membar #StoreLoad | #StoreStore\n"
37 : "=&r" (old_count
), "=&r" (tmp
), "=m" (sem
->count
)
38 : "r" (&sem
->count
), "r" (incr
), "m" (sem
->count
)
44 static void __up(struct semaphore
*sem
)
46 __sem_update_count(sem
, 1);
50 void up(struct semaphore
*sem
)
52 /* This atomically does:
53 * old_val = sem->count;
54 * new_val = sem->count + 1;
55 * sem->count = new_val;
59 * The (old_val < 0) test is equivalent to
60 * the more straightforward (new_val <= 0),
61 * but it is easier to test the former because
62 * of how the CAS instruction works.
65 __asm__
__volatile__("\n"
67 " membar #StoreLoad | #LoadLoad\n"
68 "1: lduw [%0], %%g1\n"
69 " add %%g1, 1, %%g7\n"
70 " cas [%0], %%g1, %%g7\n"
73 " addcc %%g7, 1, %%g0\n"
74 " membar #StoreLoad | #StoreStore\n"
80 " save %%sp, -160, %%sp\n"
86 : : "r" (sem
), "i" (__up
)
87 : "g1", "g2", "g3", "g7", "memory", "cc");
90 static void __sched
__down(struct semaphore
* sem
)
92 struct task_struct
*tsk
= current
;
93 DECLARE_WAITQUEUE(wait
, tsk
);
95 tsk
->state
= TASK_UNINTERRUPTIBLE
;
96 add_wait_queue_exclusive(&sem
->wait
, &wait
);
98 while (__sem_update_count(sem
, -1) <= 0) {
100 tsk
->state
= TASK_UNINTERRUPTIBLE
;
102 remove_wait_queue(&sem
->wait
, &wait
);
103 tsk
->state
= TASK_RUNNING
;
108 void __sched
down(struct semaphore
*sem
)
111 /* This atomically does:
112 * old_val = sem->count;
113 * new_val = sem->count - 1;
114 * sem->count = new_val;
118 * The (old_val < 1) test is equivalent to
119 * the more straightforward (new_val < 0),
120 * but it is easier to test the former because
121 * of how the CAS instruction works.
124 __asm__
__volatile__("\n"
126 "1: lduw [%0], %%g1\n"
127 " sub %%g1, 1, %%g7\n"
128 " cas [%0], %%g1, %%g7\n"
130 " bne,pn %%icc, 1b\n"
132 " membar #StoreLoad | #StoreStore\n"
138 " save %%sp, -160, %%sp\n"
144 : : "r" (sem
), "i" (__down
)
145 : "g1", "g2", "g3", "g7", "memory", "cc");
148 int down_trylock(struct semaphore
*sem
)
152 /* This atomically does:
153 * old_val = sem->count;
154 * new_val = sem->count - 1;
158 * sem->count = new_val;
162 * The (old_val < 1) test is equivalent to
163 * the more straightforward (new_val < 0),
164 * but it is easier to test the former because
165 * of how the CAS instruction works.
168 __asm__
__volatile__("\n"
169 " ! down_trylock sem(%1) ret(%0)\n"
170 "1: lduw [%1], %%g1\n"
171 " sub %%g1, 1, %%g7\n"
175 " cas [%1], %%g1, %%g7\n"
177 " bne,pn %%icc, 1b\n"
179 " membar #StoreLoad | #StoreStore\n"
183 : "g1", "g7", "memory", "cc");
188 static int __sched
__down_interruptible(struct semaphore
* sem
)
191 struct task_struct
*tsk
= current
;
192 DECLARE_WAITQUEUE(wait
, tsk
);
194 tsk
->state
= TASK_INTERRUPTIBLE
;
195 add_wait_queue_exclusive(&sem
->wait
, &wait
);
197 while (__sem_update_count(sem
, -1) <= 0) {
198 if (signal_pending(current
)) {
199 __sem_update_count(sem
, 0);
204 tsk
->state
= TASK_INTERRUPTIBLE
;
206 tsk
->state
= TASK_RUNNING
;
207 remove_wait_queue(&sem
->wait
, &wait
);
212 int __sched
down_interruptible(struct semaphore
*sem
)
217 /* This atomically does:
218 * old_val = sem->count;
219 * new_val = sem->count - 1;
220 * sem->count = new_val;
222 * ret = __down_interruptible(sem);
224 * The (old_val < 1) test is equivalent to
225 * the more straightforward (new_val < 0),
226 * but it is easier to test the former because
227 * of how the CAS instruction works.
230 __asm__
__volatile__("\n"
231 " ! down_interruptible sem(%2) ret(%0)\n"
232 "1: lduw [%2], %%g1\n"
233 " sub %%g1, 1, %%g7\n"
234 " cas [%2], %%g1, %%g7\n"
236 " bne,pn %%icc, 1b\n"
238 " membar #StoreLoad | #StoreStore\n"
244 " save %%sp, -160, %%sp\n"
251 : "0" (ret
), "r" (sem
), "i" (__down_interruptible
)
252 : "g1", "g2", "g3", "g7", "memory", "cc");