1 /* $Id: fault.c,v 1.59 2002/02/09 19:49:31 davem Exp $
2 * arch/sparc64/mm/fault.c: Page fault handlers for the 64-bit Sparc.
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
10 #include <linux/string.h>
11 #include <linux/types.h>
12 #include <linux/sched.h>
13 #include <linux/ptrace.h>
14 #include <linux/mman.h>
15 #include <linux/signal.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kprobes.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kdebug.h>
25 #include <asm/pgtable.h>
26 #include <asm/openprom.h>
27 #include <asm/oplib.h>
28 #include <asm/uaccess.h>
31 #include <asm/sections.h>
32 #include <asm/mmu_context.h>
35 static inline int notify_page_fault(struct pt_regs
*regs
)
39 /* kprobe_running() needs smp_processor_id() */
40 if (!user_mode(regs
)) {
42 if (kprobe_running() && kprobe_fault_handler(regs
, 0))
49 static inline int notify_page_fault(struct pt_regs
*regs
)
56 * To debug kernel to catch accesses to certain virtual/physical addresses.
57 * Mode = 0 selects physical watchpoints, mode = 1 selects virtual watchpoints.
58 * flags = VM_READ watches memread accesses, flags = VM_WRITE watches memwrite accesses.
59 * Caller passes in a 64bit aligned addr, with mask set to the bytes that need to be
60 * watched. This is only useful on a single cpu machine for now. After the watchpoint
61 * is detected, the process causing it will be killed, thus preventing an infinite loop.
63 void set_brkpt(unsigned long addr
, unsigned char mask
, int flags
, int mode
)
65 unsigned long lsubits
;
67 __asm__
__volatile__("ldxa [%%g0] %1, %0"
69 : "i" (ASI_LSU_CONTROL
));
70 lsubits
&= ~(LSU_CONTROL_PM
| LSU_CONTROL_VM
|
71 LSU_CONTROL_PR
| LSU_CONTROL_VR
|
72 LSU_CONTROL_PW
| LSU_CONTROL_VW
);
74 __asm__
__volatile__("stxa %0, [%1] %2\n\t"
77 : "r" (addr
), "r" (mode
? VIRT_WATCHPOINT
: PHYS_WATCHPOINT
),
80 lsubits
|= ((unsigned long)mask
<< (mode
? 25 : 33));
82 lsubits
|= (mode
? LSU_CONTROL_VR
: LSU_CONTROL_PR
);
84 lsubits
|= (mode
? LSU_CONTROL_VW
: LSU_CONTROL_PW
);
85 __asm__
__volatile__("stxa %0, [%%g0] %1\n\t"
88 : "r" (lsubits
), "i" (ASI_LSU_CONTROL
)
92 static void __kprobes
unhandled_fault(unsigned long address
,
93 struct task_struct
*tsk
,
96 if ((unsigned long) address
< PAGE_SIZE
) {
97 printk(KERN_ALERT
"Unable to handle kernel NULL "
98 "pointer dereference\n");
100 printk(KERN_ALERT
"Unable to handle kernel paging request "
101 "at virtual address %016lx\n", (unsigned long)address
);
103 printk(KERN_ALERT
"tsk->{mm,active_mm}->context = %016lx\n",
105 CTX_HWBITS(tsk
->mm
->context
) :
106 CTX_HWBITS(tsk
->active_mm
->context
)));
107 printk(KERN_ALERT
"tsk->{mm,active_mm}->pgd = %016lx\n",
108 (tsk
->mm
? (unsigned long) tsk
->mm
->pgd
:
109 (unsigned long) tsk
->active_mm
->pgd
));
110 die_if_kernel("Oops", regs
);
113 static void bad_kernel_pc(struct pt_regs
*regs
, unsigned long vaddr
)
115 printk(KERN_CRIT
"OOPS: Bogus kernel PC [%016lx] in fault handler\n",
117 printk(KERN_CRIT
"OOPS: RPC [%016lx]\n", regs
->u_regs
[15]);
118 print_symbol("RPC: <%s>\n", regs
->u_regs
[15]);
119 printk(KERN_CRIT
"OOPS: Fault was to vaddr[%lx]\n", vaddr
);
121 unhandled_fault(regs
->tpc
, current
, regs
);
125 * We now make sure that mmap_sem is held in all paths that call
126 * this. Additionally, to prevent kswapd from ripping ptes from
127 * under us, raise interrupts around the time that we look at the
128 * pte, kswapd will have to wait to get his smp ipi response from
129 * us. vmtruncate likewise. This saves us having to get pte lock.
131 static unsigned int get_user_insn(unsigned long tpc
)
133 pgd_t
*pgdp
= pgd_offset(current
->mm
, tpc
);
139 unsigned long pstate
;
143 pudp
= pud_offset(pgdp
, tpc
);
146 pmdp
= pmd_offset(pudp
, tpc
);
150 /* This disables preemption for us as well. */
151 __asm__
__volatile__("rdpr %%pstate, %0" : "=r" (pstate
));
152 __asm__
__volatile__("wrpr %0, %1, %%pstate"
153 : : "r" (pstate
), "i" (PSTATE_IE
));
154 ptep
= pte_offset_map(pmdp
, tpc
);
156 if (!pte_present(pte
))
159 pa
= (pte_pfn(pte
) << PAGE_SHIFT
);
160 pa
+= (tpc
& ~PAGE_MASK
);
162 /* Use phys bypass so we don't pollute dtlb/dcache. */
163 __asm__
__volatile__("lduwa [%1] %2, %0"
165 : "r" (pa
), "i" (ASI_PHYS_USE_EC
));
169 __asm__
__volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate
));
174 extern unsigned long compute_effective_address(struct pt_regs
*, unsigned int, unsigned int);
176 static void do_fault_siginfo(int code
, int sig
, struct pt_regs
*regs
,
177 unsigned int insn
, int fault_code
)
184 if (fault_code
& FAULT_CODE_ITLB
)
185 info
.si_addr
= (void __user
*) regs
->tpc
;
187 info
.si_addr
= (void __user
*)
188 compute_effective_address(regs
, insn
, 0);
190 force_sig_info(sig
, &info
, current
);
193 extern int handle_ldf_stq(u32
, struct pt_regs
*);
194 extern int handle_ld_nf(u32
, struct pt_regs
*);
196 static unsigned int get_fault_insn(struct pt_regs
*regs
, unsigned int insn
)
199 if (!regs
->tpc
|| (regs
->tpc
& 0x3))
201 if (regs
->tstate
& TSTATE_PRIV
) {
202 insn
= *(unsigned int *) regs
->tpc
;
204 insn
= get_user_insn(regs
->tpc
);
210 static void do_kernel_fault(struct pt_regs
*regs
, int si_code
, int fault_code
,
211 unsigned int insn
, unsigned long address
)
213 unsigned char asi
= ASI_P
;
215 if ((!insn
) && (regs
->tstate
& TSTATE_PRIV
))
218 /* If user insn could be read (thus insn is zero), that
219 * is fine. We will just gun down the process with a signal
223 if (!(fault_code
& (FAULT_CODE_WRITE
|FAULT_CODE_ITLB
)) &&
224 (insn
& 0xc0800000) == 0xc0800000) {
226 asi
= (regs
->tstate
>> 24);
229 if ((asi
& 0xf2) == 0x82) {
230 if (insn
& 0x1000000) {
231 handle_ldf_stq(insn
, regs
);
233 /* This was a non-faulting load. Just clear the
234 * destination register(s) and continue with the next
237 handle_ld_nf(insn
, regs
);
243 /* Is this in ex_table? */
244 if (regs
->tstate
& TSTATE_PRIV
) {
245 const struct exception_table_entry
*entry
;
247 if (asi
== ASI_P
&& (insn
& 0xc0800000) == 0xc0800000) {
249 asi
= (regs
->tstate
>> 24);
254 /* Look in asi.h: All _S asis have LS bit set */
256 (entry
= search_exception_tables(regs
->tpc
))) {
257 regs
->tpc
= entry
->fixup
;
258 regs
->tnpc
= regs
->tpc
+ 4;
262 /* The si_code was set to make clear whether
263 * this was a SEGV_MAPERR or SEGV_ACCERR fault.
265 do_fault_siginfo(si_code
, SIGSEGV
, regs
, insn
, fault_code
);
270 unhandled_fault (address
, current
, regs
);
273 asmlinkage
void __kprobes
do_sparc64_fault(struct pt_regs
*regs
)
275 struct mm_struct
*mm
= current
->mm
;
276 struct vm_area_struct
*vma
;
277 unsigned int insn
= 0;
278 int si_code
, fault_code
, fault
;
279 unsigned long address
, mm_rss
;
281 fault_code
= get_thread_fault_code();
283 if (notify_page_fault(regs
))
286 si_code
= SEGV_MAPERR
;
287 address
= current_thread_info()->fault_address
;
289 if ((fault_code
& FAULT_CODE_ITLB
) &&
290 (fault_code
& FAULT_CODE_DTLB
))
293 if (regs
->tstate
& TSTATE_PRIV
) {
294 unsigned long tpc
= regs
->tpc
;
296 /* Sanity check the PC. */
297 if ((tpc
>= KERNBASE
&& tpc
< (unsigned long) _etext
) ||
298 (tpc
>= MODULES_VADDR
&& tpc
< MODULES_END
)) {
299 /* Valid, no problems... */
301 bad_kernel_pc(regs
, address
);
307 * If we're in an interrupt or have no user
308 * context, we must not take the fault..
310 if (in_atomic() || !mm
)
313 if (test_thread_flag(TIF_32BIT
)) {
314 if (!(regs
->tstate
& TSTATE_PRIV
))
315 regs
->tpc
&= 0xffffffff;
316 address
&= 0xffffffff;
319 if (!down_read_trylock(&mm
->mmap_sem
)) {
320 if ((regs
->tstate
& TSTATE_PRIV
) &&
321 !search_exception_tables(regs
->tpc
)) {
322 insn
= get_fault_insn(regs
, insn
);
323 goto handle_kernel_fault
;
325 down_read(&mm
->mmap_sem
);
328 vma
= find_vma(mm
, address
);
332 /* Pure DTLB misses do not tell us whether the fault causing
333 * load/store/atomic was a write or not, it only says that there
334 * was no match. So in such a case we (carefully) read the
335 * instruction to try and figure this out. It's an optimization
336 * so it's ok if we can't do this.
338 * Special hack, window spill/fill knows the exact fault type.
341 (FAULT_CODE_DTLB
| FAULT_CODE_WRITE
| FAULT_CODE_WINFIXUP
)) == FAULT_CODE_DTLB
) &&
342 (vma
->vm_flags
& VM_WRITE
) != 0) {
343 insn
= get_fault_insn(regs
, 0);
346 /* All loads, stores and atomics have bits 30 and 31 both set
347 * in the instruction. Bit 21 is set in all stores, but we
348 * have to avoid prefetches which also have bit 21 set.
350 if ((insn
& 0xc0200000) == 0xc0200000 &&
351 (insn
& 0x01780000) != 0x01680000) {
352 /* Don't bother updating thread struct value,
353 * because update_mmu_cache only cares which tlb
354 * the access came from.
356 fault_code
|= FAULT_CODE_WRITE
;
361 if (vma
->vm_start
<= address
)
363 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
365 if (!(fault_code
& FAULT_CODE_WRITE
)) {
366 /* Non-faulting loads shouldn't expand stack. */
367 insn
= get_fault_insn(regs
, insn
);
368 if ((insn
& 0xc0800000) == 0xc0800000) {
372 asi
= (regs
->tstate
>> 24);
375 if ((asi
& 0xf2) == 0x82)
379 if (expand_stack(vma
, address
))
382 * Ok, we have a good vm_area for this memory access, so
386 si_code
= SEGV_ACCERR
;
388 /* If we took a ITLB miss on a non-executable page, catch
391 if ((fault_code
& FAULT_CODE_ITLB
) && !(vma
->vm_flags
& VM_EXEC
)) {
392 BUG_ON(address
!= regs
->tpc
);
393 BUG_ON(regs
->tstate
& TSTATE_PRIV
);
397 if (fault_code
& FAULT_CODE_WRITE
) {
398 if (!(vma
->vm_flags
& VM_WRITE
))
401 /* Spitfire has an icache which does not snoop
402 * processor stores. Later processors do...
404 if (tlb_type
== spitfire
&&
405 (vma
->vm_flags
& VM_EXEC
) != 0 &&
406 vma
->vm_file
!= NULL
)
407 set_thread_fault_code(fault_code
|
408 FAULT_CODE_BLKCOMMIT
);
410 /* Allow reads even for write-only mappings */
411 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
415 fault
= handle_mm_fault(mm
, vma
, address
, (fault_code
& FAULT_CODE_WRITE
));
416 if (unlikely(fault
& VM_FAULT_ERROR
)) {
417 if (fault
& VM_FAULT_OOM
)
419 else if (fault
& VM_FAULT_SIGBUS
)
423 if (fault
& VM_FAULT_MAJOR
)
428 up_read(&mm
->mmap_sem
);
430 mm_rss
= get_mm_rss(mm
);
431 #ifdef CONFIG_HUGETLB_PAGE
432 mm_rss
-= (mm
->context
.huge_pte_count
* (HPAGE_SIZE
/ PAGE_SIZE
));
434 if (unlikely(mm_rss
>
435 mm
->context
.tsb_block
[MM_TSB_BASE
].tsb_rss_limit
))
436 tsb_grow(mm
, MM_TSB_BASE
, mm_rss
);
437 #ifdef CONFIG_HUGETLB_PAGE
438 mm_rss
= mm
->context
.huge_pte_count
;
439 if (unlikely(mm_rss
>
440 mm
->context
.tsb_block
[MM_TSB_HUGE
].tsb_rss_limit
))
441 tsb_grow(mm
, MM_TSB_HUGE
, mm_rss
);
446 * Something tried to access memory that isn't in our memory map..
447 * Fix it, but check if it's kernel or user first..
450 insn
= get_fault_insn(regs
, insn
);
451 up_read(&mm
->mmap_sem
);
454 do_kernel_fault(regs
, si_code
, fault_code
, insn
, address
);
458 * We ran out of memory, or some other thing happened to us that made
459 * us unable to handle the page fault gracefully.
462 insn
= get_fault_insn(regs
, insn
);
463 up_read(&mm
->mmap_sem
);
464 printk("VM: killing process %s\n", current
->comm
);
465 if (!(regs
->tstate
& TSTATE_PRIV
))
466 do_group_exit(SIGKILL
);
467 goto handle_kernel_fault
;
470 insn
= get_fault_insn(regs
, 0);
471 goto handle_kernel_fault
;
474 insn
= get_fault_insn(regs
, insn
);
475 up_read(&mm
->mmap_sem
);
478 * Send a sigbus, regardless of whether we were in kernel
481 do_fault_siginfo(BUS_ADRERR
, SIGBUS
, regs
, insn
, fault_code
);
483 /* Kernel mode? Handle exceptions or die */
484 if (regs
->tstate
& TSTATE_PRIV
)
485 goto handle_kernel_fault
;