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iwlwifi: 802.11n comply HT self configuration flow with mac80211 framework
[wrt350n-kernel.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
blob2c706395e0a4d280ffd3e4c43c30fd429d79ed25
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-4965.h"
50 #include "iwl-helpers.h"
51
52 #ifdef CONFIG_IWL4965_DEBUG
53 u32 iwl4965_debug_level;
54 #endif
55
56 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
57 struct iwl4965_tx_queue *txq);
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /* module parameters */
66 static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
67 static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl4965_param_disable; /* def: enable radio */
69 static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl4965_param_hwcrypto; /* def: using software encryption */
71 static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
81 #ifdef CONFIG_IWL4965_DEBUG
82 #define VD "d"
83 #else
84 #define VD
85 #endif
86
87 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
88 #define VS "s"
89 #else
90 #define VS
91 #endif
92
93 #define IWLWIFI_VERSION "1.2.22k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95 #define DRV_VERSION IWLWIFI_VERSION
96
97 /* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101 #define IWL4965_UCODE_API "-1"
102
103 MODULE_DESCRIPTION(DRV_DESCRIPTION);
104 MODULE_VERSION(DRV_VERSION);
105 MODULE_AUTHOR(DRV_COPYRIGHT);
106 MODULE_LICENSE("GPL");
107
108 __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109 {
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116 }
117
118 static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, int mode)
120 {
121 int i;
122
123 for (i = 0; i < 3; i++)
124 if (priv->modes[i].mode == mode)
125 return &priv->modes[i];
126
127 return NULL;
128 }
129
130 static int iwl4965_is_empty_essid(const char *essid, int essid_len)
131 {
132 /* Single white space is for Linksys APs */
133 if (essid_len == 1 && essid[0] == ' ')
134 return 1;
135
136 /* Otherwise, if the entire essid is 0, we assume it is hidden */
137 while (essid_len) {
138 essid_len--;
139 if (essid[essid_len] != '\0')
140 return 0;
141 }
142
143 return 1;
144 }
145
146 static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
147 {
148 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
149 const char *s = essid;
150 char *d = escaped;
151
152 if (iwl4965_is_empty_essid(essid, essid_len)) {
153 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
154 return escaped;
155 }
156
157 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
158 while (essid_len--) {
159 if (*s == '\0') {
160 *d++ = '\\';
161 *d++ = '0';
162 s++;
163 } else
164 *d++ = *s++;
165 }
166 *d = '\0';
167 return escaped;
168 }
169
170 static void iwl4965_print_hex_dump(int level, void *p, u32 len)
171 {
172 #ifdef CONFIG_IWL4965_DEBUG
173 if (!(iwl4965_debug_level & level))
174 return;
175
176 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
177 p, len, 1);
178 #endif
179 }
180
181 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
182 * DMA services
183 *
184 * Theory of operation
185 *
186 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
187 * of buffer descriptors, each of which points to one or more data buffers for
188 * the device to read from or fill. Driver and device exchange status of each
189 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
190 * entries in each circular buffer, to protect against confusing empty and full
191 * queue states.
192 *
193 * The device reads or writes the data in the queues via the device's several
194 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
195 *
196 * For Tx queue, there are low mark and high mark limits. If, after queuing
197 * the packet for Tx, free space become < low mark, Tx queue stopped. When
198 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
199 * Tx queue resumed.
200 *
201 * The 4965 operates with up to 17 queues: One receive queue, one transmit
202 * queue (#4) for sending commands to the device firmware, and 15 other
203 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
204 *
205 * See more detailed info in iwl-4965-hw.h.
206 ***************************************************/
207
208 static int iwl4965_queue_space(const struct iwl4965_queue *q)
209 {
210 int s = q->read_ptr - q->write_ptr;
211
212 if (q->read_ptr > q->write_ptr)
213 s -= q->n_bd;
214
215 if (s <= 0)
216 s += q->n_window;
217 /* keep some reserve to not confuse empty and full situations */
218 s -= 2;
219 if (s < 0)
220 s = 0;
221 return s;
222 }
223
224 /**
225 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
226 * @index -- current index
227 * @n_bd -- total number of entries in queue (must be power of 2)
228 */
229 static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
230 {
231 return ++index & (n_bd - 1);
232 }
233
234 /**
235 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
236 * @index -- current index
237 * @n_bd -- total number of entries in queue (must be power of 2)
238 */
239 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
240 {
241 return --index & (n_bd - 1);
242 }
243
244 static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
245 {
246 return q->write_ptr > q->read_ptr ?
247 (i >= q->read_ptr && i < q->write_ptr) :
248 !(i < q->read_ptr && i >= q->write_ptr);
249 }
250
251 static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
252 {
253 /* This is for scan command, the big buffer at end of command array */
254 if (is_huge)
255 return q->n_window; /* must be power of 2 */
256
257 /* Otherwise, use normal size buffers */
258 return index & (q->n_window - 1);
259 }
260
261 /**
262 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
263 */
264 static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
265 int count, int slots_num, u32 id)
266 {
267 q->n_bd = count;
268 q->n_window = slots_num;
269 q->id = id;
270
271 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
272 * and iwl4965_queue_dec_wrap are broken. */
273 BUG_ON(!is_power_of_2(count));
274
275 /* slots_num must be power-of-two size, otherwise
276 * get_cmd_index is broken. */
277 BUG_ON(!is_power_of_2(slots_num));
278
279 q->low_mark = q->n_window / 4;
280 if (q->low_mark < 4)
281 q->low_mark = 4;
282
283 q->high_mark = q->n_window / 8;
284 if (q->high_mark < 2)
285 q->high_mark = 2;
286
287 q->write_ptr = q->read_ptr = 0;
288
289 return 0;
290 }
291
292 /**
293 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
294 */
295 static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
296 struct iwl4965_tx_queue *txq, u32 id)
297 {
298 struct pci_dev *dev = priv->pci_dev;
299
300 /* Driver private data, only for Tx (not command) queues,
301 * not shared with device. */
302 if (id != IWL_CMD_QUEUE_NUM) {
303 txq->txb = kmalloc(sizeof(txq->txb[0]) *
304 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
305 if (!txq->txb) {
306 IWL_ERROR("kmalloc for auxiliary BD "
307 "structures failed\n");
308 goto error;
309 }
310 } else
311 txq->txb = NULL;
312
313 /* Circular buffer of transmit frame descriptors (TFDs),
314 * shared with device */
315 txq->bd = pci_alloc_consistent(dev,
316 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
317 &txq->q.dma_addr);
318
319 if (!txq->bd) {
320 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
321 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
322 goto error;
323 }
324 txq->q.id = id;
325
326 return 0;
327
328 error:
329 if (txq->txb) {
330 kfree(txq->txb);
331 txq->txb = NULL;
332 }
333
334 return -ENOMEM;
335 }
336
337 /**
338 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
339 */
340 int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
341 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
342 {
343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345 int rc = 0;
346
347 /*
348 * Alloc buffer array for commands (Tx or other types of commands).
349 * For the command queue (#4), allocate command space + one big
350 * command for scan, since scan command is very huge; the system will
351 * not have two scans at the same time, so only one is needed.
352 * For data Tx queues (all other queues), no super-size command
353 * space is needed.
354 */
355 len = sizeof(struct iwl4965_cmd) * slots_num;
356 if (txq_id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
359 if (!txq->cmd)
360 return -ENOMEM;
361
362 /* Alloc driver data array and TFD circular buffer */
363 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
364 if (rc) {
365 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
366
367 return -ENOMEM;
368 }
369 txq->need_update = 0;
370
371 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
372 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
373 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
374
375 /* Initialize queue's high/low-water marks, and head/tail indexes */
376 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
377
378 /* Tell device where to find queue */
379 iwl4965_hw_tx_queue_init(priv, txq);
380
381 return 0;
382 }
383
384 /**
385 * iwl4965_tx_queue_free - Deallocate DMA queue.
386 * @txq: Transmit queue to deallocate.
387 *
388 * Empty queue by removing and destroying all BD's.
389 * Free all buffers.
390 * 0-fill, but do not free "txq" descriptor structure.
391 */
392 void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
393 {
394 struct iwl4965_queue *q = &txq->q;
395 struct pci_dev *dev = priv->pci_dev;
396 int len;
397
398 if (q->n_bd == 0)
399 return;
400
401 /* first, empty all BD's */
402 for (; q->write_ptr != q->read_ptr;
403 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
404 iwl4965_hw_txq_free_tfd(priv, txq);
405
406 len = sizeof(struct iwl4965_cmd) * q->n_window;
407 if (q->id == IWL_CMD_QUEUE_NUM)
408 len += IWL_MAX_SCAN_SIZE;
409
410 /* De-alloc array of command/tx buffers */
411 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
412
413 /* De-alloc circular buffer of TFDs */
414 if (txq->q.n_bd)
415 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
416 txq->q.n_bd, txq->bd, txq->q.dma_addr);
417
418 /* De-alloc array of per-TFD driver data */
419 if (txq->txb) {
420 kfree(txq->txb);
421 txq->txb = NULL;
422 }
423
424 /* 0-fill queue descriptor structure */
425 memset(txq, 0, sizeof(*txq));
426 }
427
428 const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
429
430 /*************** STATION TABLE MANAGEMENT ****
431 * mac80211 should be examined to determine if sta_info is duplicating
432 * the functionality provided here
433 */
434
435 /**************************************************************/
436
437 #if 0 /* temporary disable till we add real remove station */
438 /**
439 * iwl4965_remove_station - Remove driver's knowledge of station.
440 *
441 * NOTE: This does not remove station from device's station table.
442 */
443 static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
444 {
445 int index = IWL_INVALID_STATION;
446 int i;
447 unsigned long flags;
448
449 spin_lock_irqsave(&priv->sta_lock, flags);
450
451 if (is_ap)
452 index = IWL_AP_ID;
453 else if (is_broadcast_ether_addr(addr))
454 index = priv->hw_setting.bcast_sta_id;
455 else
456 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
457 if (priv->stations[i].used &&
458 !compare_ether_addr(priv->stations[i].sta.sta.addr,
459 addr)) {
460 index = i;
461 break;
462 }
463
464 if (unlikely(index == IWL_INVALID_STATION))
465 goto out;
466
467 if (priv->stations[index].used) {
468 priv->stations[index].used = 0;
469 priv->num_stations--;
470 }
471
472 BUG_ON(priv->num_stations < 0);
473
474 out:
475 spin_unlock_irqrestore(&priv->sta_lock, flags);
476 return 0;
477 }
478 #endif
479
480 /**
481 * iwl4965_clear_stations_table - Clear the driver's station table
482 *
483 * NOTE: This does not clear or otherwise alter the device's station table.
484 */
485 static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
486 {
487 unsigned long flags;
488
489 spin_lock_irqsave(&priv->sta_lock, flags);
490
491 priv->num_stations = 0;
492 memset(priv->stations, 0, sizeof(priv->stations));
493
494 spin_unlock_irqrestore(&priv->sta_lock, flags);
495 }
496
497 /**
498 * iwl4965_add_station_flags - Add station to tables in driver and device
499 */
500 u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags)
501 {
502 int i;
503 int index = IWL_INVALID_STATION;
504 struct iwl4965_station_entry *station;
505 unsigned long flags_spin;
506 DECLARE_MAC_BUF(mac);
507
508 spin_lock_irqsave(&priv->sta_lock, flags_spin);
509 if (is_ap)
510 index = IWL_AP_ID;
511 else if (is_broadcast_ether_addr(addr))
512 index = priv->hw_setting.bcast_sta_id;
513 else
514 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
515 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
516 addr)) {
517 index = i;
518 break;
519 }
520
521 if (!priv->stations[i].used &&
522 index == IWL_INVALID_STATION)
523 index = i;
524 }
525
526
527 /* These two conditions have the same outcome, but keep them separate
528 since they have different meanings */
529 if (unlikely(index == IWL_INVALID_STATION)) {
530 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
531 return index;
532 }
533
534 if (priv->stations[index].used &&
535 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
536 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
537 return index;
538 }
539
540
541 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
542 station = &priv->stations[index];
543 station->used = 1;
544 priv->num_stations++;
545
546 /* Set up the REPLY_ADD_STA command to send to device */
547 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
548 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
549 station->sta.mode = 0;
550 station->sta.sta.sta_id = index;
551 station->sta.station_flags = 0;
552
553 #ifdef CONFIG_IWL4965_HT
554 /* BCAST station and IBSS stations do not work in HT mode */
555 if (index != priv->hw_setting.bcast_sta_id &&
556 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
557 iwl4965_set_ht_add_station(priv, index);
558 #endif /*CONFIG_IWL4965_HT*/
559
560 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
561
562 /* Add station to device's station table */
563 iwl4965_send_add_station(priv, &station->sta, flags);
564 return index;
565
566 }
567
568 /*************** DRIVER STATUS FUNCTIONS *****/
569
570 static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
571 {
572 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
573 * set but EXIT_PENDING is not */
574 return test_bit(STATUS_READY, &priv->status) &&
575 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
576 !test_bit(STATUS_EXIT_PENDING, &priv->status);
577 }
578
579 static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
580 {
581 return test_bit(STATUS_ALIVE, &priv->status);
582 }
583
584 static inline int iwl4965_is_init(struct iwl4965_priv *priv)
585 {
586 return test_bit(STATUS_INIT, &priv->status);
587 }
588
589 static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
590 {
591 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
592 test_bit(STATUS_RF_KILL_SW, &priv->status);
593 }
594
595 static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
596 {
597
598 if (iwl4965_is_rfkill(priv))
599 return 0;
600
601 return iwl4965_is_ready(priv);
602 }
603
604 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
605
606 #define IWL_CMD(x) case x : return #x
607
608 static const char *get_cmd_string(u8 cmd)
609 {
610 switch (cmd) {
611 IWL_CMD(REPLY_ALIVE);
612 IWL_CMD(REPLY_ERROR);
613 IWL_CMD(REPLY_RXON);
614 IWL_CMD(REPLY_RXON_ASSOC);
615 IWL_CMD(REPLY_QOS_PARAM);
616 IWL_CMD(REPLY_RXON_TIMING);
617 IWL_CMD(REPLY_ADD_STA);
618 IWL_CMD(REPLY_REMOVE_STA);
619 IWL_CMD(REPLY_REMOVE_ALL_STA);
620 IWL_CMD(REPLY_TX);
621 IWL_CMD(REPLY_RATE_SCALE);
622 IWL_CMD(REPLY_LEDS_CMD);
623 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
624 IWL_CMD(RADAR_NOTIFICATION);
625 IWL_CMD(REPLY_QUIET_CMD);
626 IWL_CMD(REPLY_CHANNEL_SWITCH);
627 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
628 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
629 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
630 IWL_CMD(POWER_TABLE_CMD);
631 IWL_CMD(PM_SLEEP_NOTIFICATION);
632 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
633 IWL_CMD(REPLY_SCAN_CMD);
634 IWL_CMD(REPLY_SCAN_ABORT_CMD);
635 IWL_CMD(SCAN_START_NOTIFICATION);
636 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
637 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
638 IWL_CMD(BEACON_NOTIFICATION);
639 IWL_CMD(REPLY_TX_BEACON);
640 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
641 IWL_CMD(QUIET_NOTIFICATION);
642 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
643 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
644 IWL_CMD(REPLY_BT_CONFIG);
645 IWL_CMD(REPLY_STATISTICS_CMD);
646 IWL_CMD(STATISTICS_NOTIFICATION);
647 IWL_CMD(REPLY_CARD_STATE_CMD);
648 IWL_CMD(CARD_STATE_NOTIFICATION);
649 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
650 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
651 IWL_CMD(SENSITIVITY_CMD);
652 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
653 IWL_CMD(REPLY_RX_PHY_CMD);
654 IWL_CMD(REPLY_RX_MPDU_CMD);
655 IWL_CMD(REPLY_4965_RX);
656 IWL_CMD(REPLY_COMPRESSED_BA);
657 default:
658 return "UNKNOWN";
659
660 }
661 }
662
663 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
664
665 /**
666 * iwl4965_enqueue_hcmd - enqueue a uCode command
667 * @priv: device private data point
668 * @cmd: a point to the ucode command structure
669 *
670 * The function returns < 0 values to indicate the operation is
671 * failed. On success, it turns the index (> 0) of command in the
672 * command queue.
673 */
674 static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
675 {
676 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
677 struct iwl4965_queue *q = &txq->q;
678 struct iwl4965_tfd_frame *tfd;
679 u32 *control_flags;
680 struct iwl4965_cmd *out_cmd;
681 u32 idx;
682 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
683 dma_addr_t phys_addr;
684 int ret;
685 unsigned long flags;
686
687 /* If any of the command structures end up being larger than
688 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
689 * we will need to increase the size of the TFD entries */
690 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
691 !(cmd->meta.flags & CMD_SIZE_HUGE));
692
693 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
694 IWL_ERROR("No space for Tx\n");
695 return -ENOSPC;
696 }
697
698 spin_lock_irqsave(&priv->hcmd_lock, flags);
699
700 tfd = &txq->bd[q->write_ptr];
701 memset(tfd, 0, sizeof(*tfd));
702
703 control_flags = (u32 *) tfd;
704
705 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
706 out_cmd = &txq->cmd[idx];
707
708 out_cmd->hdr.cmd = cmd->id;
709 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
710 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
711
712 /* At this point, the out_cmd now has all of the incoming cmd
713 * information */
714
715 out_cmd->hdr.flags = 0;
716 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
717 INDEX_TO_SEQ(q->write_ptr));
718 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
719 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
720
721 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
722 offsetof(struct iwl4965_cmd, hdr);
723 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
724
725 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
726 "%d bytes at %d[%d]:%d\n",
727 get_cmd_string(out_cmd->hdr.cmd),
728 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
729 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
730
731 txq->need_update = 1;
732
733 /* Set up entry in queue's byte count circular buffer */
734 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
735
736 /* Increment and update queue's write index */
737 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
738 iwl4965_tx_queue_update_write_ptr(priv, txq);
739
740 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
741 return ret ? ret : idx;
742 }
743
744 static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
745 {
746 int ret;
747
748 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
749
750 /* An asynchronous command can not expect an SKB to be set. */
751 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
752
753 /* An asynchronous command MUST have a callback. */
754 BUG_ON(!cmd->meta.u.callback);
755
756 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
757 return -EBUSY;
758
759 ret = iwl4965_enqueue_hcmd(priv, cmd);
760 if (ret < 0) {
761 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
762 get_cmd_string(cmd->id), ret);
763 return ret;
764 }
765 return 0;
766 }
767
768 static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
769 {
770 int cmd_idx;
771 int ret;
772 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
773
774 BUG_ON(cmd->meta.flags & CMD_ASYNC);
775
776 /* A synchronous command can not have a callback set. */
777 BUG_ON(cmd->meta.u.callback != NULL);
778
779 if (atomic_xchg(&entry, 1)) {
780 IWL_ERROR("Error sending %s: Already sending a host command\n",
781 get_cmd_string(cmd->id));
782 return -EBUSY;
783 }
784
785 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
786
787 if (cmd->meta.flags & CMD_WANT_SKB)
788 cmd->meta.source = &cmd->meta;
789
790 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
791 if (cmd_idx < 0) {
792 ret = cmd_idx;
793 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
794 get_cmd_string(cmd->id), ret);
795 goto out;
796 }
797
798 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
799 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
800 HOST_COMPLETE_TIMEOUT);
801 if (!ret) {
802 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
803 IWL_ERROR("Error sending %s: time out after %dms.\n",
804 get_cmd_string(cmd->id),
805 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
806
807 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
808 ret = -ETIMEDOUT;
809 goto cancel;
810 }
811 }
812
813 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
814 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
815 get_cmd_string(cmd->id));
816 ret = -ECANCELED;
817 goto fail;
818 }
819 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
820 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
821 get_cmd_string(cmd->id));
822 ret = -EIO;
823 goto fail;
824 }
825 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
826 IWL_ERROR("Error: Response NULL in '%s'\n",
827 get_cmd_string(cmd->id));
828 ret = -EIO;
829 goto out;
830 }
831
832 ret = 0;
833 goto out;
834
835 cancel:
836 if (cmd->meta.flags & CMD_WANT_SKB) {
837 struct iwl4965_cmd *qcmd;
838
839 /* Cancel the CMD_WANT_SKB flag for the cmd in the
840 * TX cmd queue. Otherwise in case the cmd comes
841 * in later, it will possibly set an invalid
842 * address (cmd->meta.source). */
843 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
844 qcmd->meta.flags &= ~CMD_WANT_SKB;
845 }
846 fail:
847 if (cmd->meta.u.skb) {
848 dev_kfree_skb_any(cmd->meta.u.skb);
849 cmd->meta.u.skb = NULL;
850 }
851 out:
852 atomic_set(&entry, 0);
853 return ret;
854 }
855
856 int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
857 {
858 if (cmd->meta.flags & CMD_ASYNC)
859 return iwl4965_send_cmd_async(priv, cmd);
860
861 return iwl4965_send_cmd_sync(priv, cmd);
862 }
863
864 int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
865 {
866 struct iwl4965_host_cmd cmd = {
867 .id = id,
868 .len = len,
869 .data = data,
870 };
871
872 return iwl4965_send_cmd_sync(priv, &cmd);
873 }
874
875 static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
876 {
877 struct iwl4965_host_cmd cmd = {
878 .id = id,
879 .len = sizeof(val),
880 .data = &val,
881 };
882
883 return iwl4965_send_cmd_sync(priv, &cmd);
884 }
885
886 int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
887 {
888 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
889 }
890
891 /**
892 * iwl4965_rxon_add_station - add station into station table.
893 *
894 * there is only one AP station with id= IWL_AP_ID
895 * NOTE: mutex must be held before calling this fnction
896 */
897 static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
898 const u8 *addr, int is_ap)
899 {
900 u8 sta_id;
901
902 /* Add station to device's station table */
903 sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0);
904
905 /* Set up default rate scaling table in device's station table */
906 iwl4965_add_station(priv, addr, is_ap);
907
908 return sta_id;
909 }
910
911 /**
912 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
913 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
914 * @channel: Any channel valid for the requested phymode
915
916 * In addition to setting the staging RXON, priv->phymode is also set.
917 *
918 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
919 * in the staging RXON flag structure based on the phymode
920 */
921 static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
922 u16 channel)
923 {
924 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
925 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
926 channel, phymode);
927 return -EINVAL;
928 }
929
930 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
931 (priv->phymode == phymode))
932 return 0;
933
934 priv->staging_rxon.channel = cpu_to_le16(channel);
935 if (phymode == MODE_IEEE80211A)
936 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
937 else
938 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
939
940 priv->phymode = phymode;
941
942 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
943
944 return 0;
945 }
946
947 /**
948 * iwl4965_check_rxon_cmd - validate RXON structure is valid
949 *
950 * NOTE: This is really only useful during development and can eventually
951 * be #ifdef'd out once the driver is stable and folks aren't actively
952 * making changes
953 */
954 static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
955 {
956 int error = 0;
957 int counter = 1;
958
959 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
960 error |= le32_to_cpu(rxon->flags &
961 (RXON_FLG_TGJ_NARROW_BAND_MSK |
962 RXON_FLG_RADAR_DETECT_MSK));
963 if (error)
964 IWL_WARNING("check 24G fields %d | %d\n",
965 counter++, error);
966 } else {
967 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
968 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
969 if (error)
970 IWL_WARNING("check 52 fields %d | %d\n",
971 counter++, error);
972 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
973 if (error)
974 IWL_WARNING("check 52 CCK %d | %d\n",
975 counter++, error);
976 }
977 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
978 if (error)
979 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
980
981 /* make sure basic rates 6Mbps and 1Mbps are supported */
982 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
983 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
984 if (error)
985 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
986
987 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
988 if (error)
989 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
990
991 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
992 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
993 if (error)
994 IWL_WARNING("check CCK and short slot %d | %d\n",
995 counter++, error);
996
997 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
998 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
999 if (error)
1000 IWL_WARNING("check CCK & auto detect %d | %d\n",
1001 counter++, error);
1002
1003 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1004 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1005 if (error)
1006 IWL_WARNING("check TGG and auto detect %d | %d\n",
1007 counter++, error);
1008
1009 if (error)
1010 IWL_WARNING("Tuning to channel %d\n",
1011 le16_to_cpu(rxon->channel));
1012
1013 if (error) {
1014 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
1015 return -1;
1016 }
1017 return 0;
1018 }
1019
1020 /**
1021 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1022 * @priv: staging_rxon is compared to active_rxon
1023 *
1024 * If the RXON structure is changing enough to require a new tune,
1025 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1026 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1027 */
1028 static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
1029 {
1030
1031 /* These items are only settable from the full RXON command */
1032 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1033 compare_ether_addr(priv->staging_rxon.bssid_addr,
1034 priv->active_rxon.bssid_addr) ||
1035 compare_ether_addr(priv->staging_rxon.node_addr,
1036 priv->active_rxon.node_addr) ||
1037 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1038 priv->active_rxon.wlap_bssid_addr) ||
1039 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1040 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1041 (priv->staging_rxon.air_propagation !=
1042 priv->active_rxon.air_propagation) ||
1043 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1044 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1045 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1046 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1047 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1048 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1049 return 1;
1050
1051 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1052 * be updated with the RXON_ASSOC command -- however only some
1053 * flag transitions are allowed using RXON_ASSOC */
1054
1055 /* Check if we are not switching bands */
1056 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1057 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1058 return 1;
1059
1060 /* Check if we are switching association toggle */
1061 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1062 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1063 return 1;
1064
1065 return 0;
1066 }
1067
1068 static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
1069 {
1070 int rc = 0;
1071 struct iwl4965_rx_packet *res = NULL;
1072 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1073 struct iwl4965_host_cmd cmd = {
1074 .id = REPLY_RXON_ASSOC,
1075 .len = sizeof(rxon_assoc),
1076 .meta.flags = CMD_WANT_SKB,
1077 .data = &rxon_assoc,
1078 };
1079 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1080 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1081
1082 if ((rxon1->flags == rxon2->flags) &&
1083 (rxon1->filter_flags == rxon2->filter_flags) &&
1084 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1085 (rxon1->ofdm_ht_single_stream_basic_rates ==
1086 rxon2->ofdm_ht_single_stream_basic_rates) &&
1087 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1088 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1089 (rxon1->rx_chain == rxon2->rx_chain) &&
1090 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1091 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1092 return 0;
1093 }
1094
1095 rxon_assoc.flags = priv->staging_rxon.flags;
1096 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1097 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1098 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1099 rxon_assoc.reserved = 0;
1100 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1101 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1102 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1103 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1104 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1105
1106 rc = iwl4965_send_cmd_sync(priv, &cmd);
1107 if (rc)
1108 return rc;
1109
1110 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1111 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1112 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1113 rc = -EIO;
1114 }
1115
1116 priv->alloc_rxb_skb--;
1117 dev_kfree_skb_any(cmd.meta.u.skb);
1118
1119 return rc;
1120 }
1121
1122 /**
1123 * iwl4965_commit_rxon - commit staging_rxon to hardware
1124 *
1125 * The RXON command in staging_rxon is committed to the hardware and
1126 * the active_rxon structure is updated with the new data. This
1127 * function correctly transitions out of the RXON_ASSOC_MSK state if
1128 * a HW tune is required based on the RXON structure changes.
1129 */
1130 static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
1131 {
1132 /* cast away the const for active_rxon in this function */
1133 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1134 DECLARE_MAC_BUF(mac);
1135 int rc = 0;
1136
1137 if (!iwl4965_is_alive(priv))
1138 return -1;
1139
1140 /* always get timestamp with Rx frame */
1141 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1142
1143 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
1144 if (rc) {
1145 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1146 return -EINVAL;
1147 }
1148
1149 /* If we don't need to send a full RXON, we can use
1150 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
1151 * and other flags for the current radio configuration. */
1152 if (!iwl4965_full_rxon_required(priv)) {
1153 rc = iwl4965_send_rxon_assoc(priv);
1154 if (rc) {
1155 IWL_ERROR("Error setting RXON_ASSOC "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
1159
1160 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1161
1162 return 0;
1163 }
1164
1165 /* station table will be cleared */
1166 priv->assoc_station_added = 0;
1167
1168 #ifdef CONFIG_IWL4965_SENSITIVITY
1169 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1170 if (!priv->error_recovering)
1171 priv->start_calib = 0;
1172
1173 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1174 #endif /* CONFIG_IWL4965_SENSITIVITY */
1175
1176 /* If we are currently associated and the new config requires
1177 * an RXON_ASSOC and the new config wants the associated mask enabled,
1178 * we must clear the associated from the active configuration
1179 * before we apply the new config */
1180 if (iwl4965_is_associated(priv) &&
1181 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1182 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1183 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1184
1185 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1186 sizeof(struct iwl4965_rxon_cmd),
1187 &priv->active_rxon);
1188
1189 /* If the mask clearing failed then we set
1190 * active_rxon back to what it was previously */
1191 if (rc) {
1192 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1193 IWL_ERROR("Error clearing ASSOC_MSK on current "
1194 "configuration (%d).\n", rc);
1195 return rc;
1196 }
1197 }
1198
1199 IWL_DEBUG_INFO("Sending RXON\n"
1200 "* with%s RXON_FILTER_ASSOC_MSK\n"
1201 "* channel = %d\n"
1202 "* bssid = %s\n",
1203 ((priv->staging_rxon.filter_flags &
1204 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1205 le16_to_cpu(priv->staging_rxon.channel),
1206 print_mac(mac, priv->staging_rxon.bssid_addr));
1207
1208 /* Apply the new configuration */
1209 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1210 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
1211 if (rc) {
1212 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1213 return rc;
1214 }
1215
1216 iwl4965_clear_stations_table(priv);
1217
1218 #ifdef CONFIG_IWL4965_SENSITIVITY
1219 if (!priv->error_recovering)
1220 priv->start_calib = 0;
1221
1222 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1223 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1224 #endif /* CONFIG_IWL4965_SENSITIVITY */
1225
1226 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1227
1228 /* If we issue a new RXON command which required a tune then we must
1229 * send a new TXPOWER command or we won't be able to Tx any frames */
1230 rc = iwl4965_hw_reg_send_txpower(priv);
1231 if (rc) {
1232 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1233 return rc;
1234 }
1235
1236 /* Add the broadcast address so we can send broadcast frames */
1237 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
1238 IWL_INVALID_STATION) {
1239 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1240 return -EIO;
1241 }
1242
1243 /* If we have set the ASSOC_MSK and we are in BSS mode then
1244 * add the IWL_AP_ID to the station rate table */
1245 if (iwl4965_is_associated(priv) &&
1246 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
1247 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
1248 == IWL_INVALID_STATION) {
1249 IWL_ERROR("Error adding AP address for transmit.\n");
1250 return -EIO;
1251 }
1252 priv->assoc_station_added = 1;
1253 }
1254
1255 return 0;
1256 }
1257
1258 static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
1259 {
1260 struct iwl4965_bt_cmd bt_cmd = {
1261 .flags = 3,
1262 .lead_time = 0xAA,
1263 .max_kill = 1,
1264 .kill_ack_mask = 0,
1265 .kill_cts_mask = 0,
1266 };
1267
1268 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1269 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
1270 }
1271
1272 static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
1273 {
1274 int rc = 0;
1275 struct iwl4965_rx_packet *res;
1276 struct iwl4965_host_cmd cmd = {
1277 .id = REPLY_SCAN_ABORT_CMD,
1278 .meta.flags = CMD_WANT_SKB,
1279 };
1280
1281 /* If there isn't a scan actively going on in the hardware
1282 * then we are in between scan bands and not actually
1283 * actively scanning, so don't send the abort command */
1284 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1285 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1286 return 0;
1287 }
1288
1289 rc = iwl4965_send_cmd_sync(priv, &cmd);
1290 if (rc) {
1291 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1292 return rc;
1293 }
1294
1295 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1296 if (res->u.status != CAN_ABORT_STATUS) {
1297 /* The scan abort will return 1 for success or
1298 * 2 for "failure". A failure condition can be
1299 * due to simply not being in an active scan which
1300 * can occur if we send the scan abort before we
1301 * the microcode has notified us that a scan is
1302 * completed. */
1303 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1304 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1305 clear_bit(STATUS_SCAN_HW, &priv->status);
1306 }
1307
1308 dev_kfree_skb_any(cmd.meta.u.skb);
1309
1310 return rc;
1311 }
1312
1313 static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1314 struct iwl4965_cmd *cmd,
1315 struct sk_buff *skb)
1316 {
1317 return 1;
1318 }
1319
1320 /*
1321 * CARD_STATE_CMD
1322 *
1323 * Use: Sets the device's internal card state to enable, disable, or halt
1324 *
1325 * When in the 'enable' state the card operates as normal.
1326 * When in the 'disable' state, the card enters into a low power mode.
1327 * When in the 'halt' state, the card is shut down and must be fully
1328 * restarted to come back on.
1329 */
1330 static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
1331 {
1332 struct iwl4965_host_cmd cmd = {
1333 .id = REPLY_CARD_STATE_CMD,
1334 .len = sizeof(u32),
1335 .data = &flags,
1336 .meta.flags = meta_flag,
1337 };
1338
1339 if (meta_flag & CMD_ASYNC)
1340 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
1341
1342 return iwl4965_send_cmd(priv, &cmd);
1343 }
1344
1345 static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1346 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1347 {
1348 struct iwl4965_rx_packet *res = NULL;
1349
1350 if (!skb) {
1351 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1352 return 1;
1353 }
1354
1355 res = (struct iwl4965_rx_packet *)skb->data;
1356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 return 1;
1360 }
1361
1362 switch (res->u.add_sta.status) {
1363 case ADD_STA_SUCCESS_MSK:
1364 break;
1365 default:
1366 break;
1367 }
1368
1369 /* We didn't cache the SKB; let the caller free it */
1370 return 1;
1371 }
1372
1373 int iwl4965_send_add_station(struct iwl4965_priv *priv,
1374 struct iwl4965_addsta_cmd *sta, u8 flags)
1375 {
1376 struct iwl4965_rx_packet *res = NULL;
1377 int rc = 0;
1378 struct iwl4965_host_cmd cmd = {
1379 .id = REPLY_ADD_STA,
1380 .len = sizeof(struct iwl4965_addsta_cmd),
1381 .meta.flags = flags,
1382 .data = sta,
1383 };
1384
1385 if (flags & CMD_ASYNC)
1386 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
1387 else
1388 cmd.meta.flags |= CMD_WANT_SKB;
1389
1390 rc = iwl4965_send_cmd(priv, &cmd);
1391
1392 if (rc || (flags & CMD_ASYNC))
1393 return rc;
1394
1395 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1396 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1397 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1398 res->hdr.flags);
1399 rc = -EIO;
1400 }
1401
1402 if (rc == 0) {
1403 switch (res->u.add_sta.status) {
1404 case ADD_STA_SUCCESS_MSK:
1405 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1406 break;
1407 default:
1408 rc = -EIO;
1409 IWL_WARNING("REPLY_ADD_STA failed\n");
1410 break;
1411 }
1412 }
1413
1414 priv->alloc_rxb_skb--;
1415 dev_kfree_skb_any(cmd.meta.u.skb);
1416
1417 return rc;
1418 }
1419
1420 static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
1421 struct ieee80211_key_conf *keyconf,
1422 u8 sta_id)
1423 {
1424 unsigned long flags;
1425 __le16 key_flags = 0;
1426
1427 switch (keyconf->alg) {
1428 case ALG_CCMP:
1429 key_flags |= STA_KEY_FLG_CCMP;
1430 key_flags |= cpu_to_le16(
1431 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1432 key_flags &= ~STA_KEY_FLG_INVALID;
1433 break;
1434 case ALG_TKIP:
1435 case ALG_WEP:
1436 default:
1437 return -EINVAL;
1438 }
1439 spin_lock_irqsave(&priv->sta_lock, flags);
1440 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1441 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1442 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1443 keyconf->keylen);
1444
1445 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1446 keyconf->keylen);
1447 priv->stations[sta_id].sta.key.key_flags = key_flags;
1448 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1449 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1450
1451 spin_unlock_irqrestore(&priv->sta_lock, flags);
1452
1453 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1454 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1455 return 0;
1456 }
1457
1458 static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
1459 {
1460 unsigned long flags;
1461
1462 spin_lock_irqsave(&priv->sta_lock, flags);
1463 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1464 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
1465 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1466 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1467 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1468 spin_unlock_irqrestore(&priv->sta_lock, flags);
1469
1470 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1471 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1472 return 0;
1473 }
1474
1475 static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
1476 {
1477 struct list_head *element;
1478
1479 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1480 priv->frames_count);
1481
1482 while (!list_empty(&priv->free_frames)) {
1483 element = priv->free_frames.next;
1484 list_del(element);
1485 kfree(list_entry(element, struct iwl4965_frame, list));
1486 priv->frames_count--;
1487 }
1488
1489 if (priv->frames_count) {
1490 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1491 priv->frames_count);
1492 priv->frames_count = 0;
1493 }
1494 }
1495
1496 static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
1497 {
1498 struct iwl4965_frame *frame;
1499 struct list_head *element;
1500 if (list_empty(&priv->free_frames)) {
1501 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1502 if (!frame) {
1503 IWL_ERROR("Could not allocate frame!\n");
1504 return NULL;
1505 }
1506
1507 priv->frames_count++;
1508 return frame;
1509 }
1510
1511 element = priv->free_frames.next;
1512 list_del(element);
1513 return list_entry(element, struct iwl4965_frame, list);
1514 }
1515
1516 static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
1517 {
1518 memset(frame, 0, sizeof(*frame));
1519 list_add(&frame->list, &priv->free_frames);
1520 }
1521
1522 unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
1523 struct ieee80211_hdr *hdr,
1524 const u8 *dest, int left)
1525 {
1526
1527 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
1528 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1529 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1530 return 0;
1531
1532 if (priv->ibss_beacon->len > left)
1533 return 0;
1534
1535 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1536
1537 return priv->ibss_beacon->len;
1538 }
1539
1540 int iwl4965_rate_index_from_plcp(int plcp)
1541 {
1542 int i = 0;
1543
1544 /* 4965 HT rate format */
1545 if (plcp & RATE_MCS_HT_MSK) {
1546 i = (plcp & 0xff);
1547
1548 if (i >= IWL_RATE_MIMO_6M_PLCP)
1549 i = i - IWL_RATE_MIMO_6M_PLCP;
1550
1551 i += IWL_FIRST_OFDM_RATE;
1552 /* skip 9M not supported in ht*/
1553 if (i >= IWL_RATE_9M_INDEX)
1554 i += 1;
1555 if ((i >= IWL_FIRST_OFDM_RATE) &&
1556 (i <= IWL_LAST_OFDM_RATE))
1557 return i;
1558
1559 /* 4965 legacy rate format, search for match in table */
1560 } else {
1561 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1562 if (iwl4965_rates[i].plcp == (plcp &0xFF))
1563 return i;
1564 }
1565 return -1;
1566 }
1567
1568 static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
1569 {
1570 u8 i;
1571
1572 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1573 i = iwl4965_rates[i].next_ieee) {
1574 if (rate_mask & (1 << i))
1575 return iwl4965_rates[i].plcp;
1576 }
1577
1578 return IWL_RATE_INVALID;
1579 }
1580
1581 static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
1582 {
1583 struct iwl4965_frame *frame;
1584 unsigned int frame_size;
1585 int rc;
1586 u8 rate;
1587
1588 frame = iwl4965_get_free_frame(priv);
1589
1590 if (!frame) {
1591 IWL_ERROR("Could not obtain free frame buffer for beacon "
1592 "command.\n");
1593 return -ENOMEM;
1594 }
1595
1596 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1597 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
1598 0xFF0);
1599 if (rate == IWL_INVALID_RATE)
1600 rate = IWL_RATE_6M_PLCP;
1601 } else {
1602 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1603 if (rate == IWL_INVALID_RATE)
1604 rate = IWL_RATE_1M_PLCP;
1605 }
1606
1607 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
1608
1609 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1610 &frame->u.cmd[0]);
1611
1612 iwl4965_free_frame(priv, frame);
1613
1614 return rc;
1615 }
1616
1617 /******************************************************************************
1618 *
1619 * EEPROM related functions
1620 *
1621 ******************************************************************************/
1622
1623 static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
1624 {
1625 memcpy(mac, priv->eeprom.mac_address, 6);
1626 }
1627
1628 /**
1629 * iwl4965_eeprom_init - read EEPROM contents
1630 *
1631 * Load the EEPROM contents from adapter into priv->eeprom
1632 *
1633 * NOTE: This routine uses the non-debug IO access functions.
1634 */
1635 int iwl4965_eeprom_init(struct iwl4965_priv *priv)
1636 {
1637 u16 *e = (u16 *)&priv->eeprom;
1638 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
1639 u32 r;
1640 int sz = sizeof(priv->eeprom);
1641 int rc;
1642 int i;
1643 u16 addr;
1644
1645 /* The EEPROM structure has several padding buffers within it
1646 * and when adding new EEPROM maps is subject to programmer errors
1647 * which may be very difficult to identify without explicitly
1648 * checking the resulting size of the eeprom map. */
1649 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1650
1651 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1652 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1653 return -ENOENT;
1654 }
1655
1656 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1657 rc = iwl4965_eeprom_acquire_semaphore(priv);
1658 if (rc < 0) {
1659 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1660 return -ENOENT;
1661 }
1662
1663 /* eeprom is an array of 16bit values */
1664 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1665 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1666 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1667
1668 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1669 i += IWL_EEPROM_ACCESS_DELAY) {
1670 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
1671 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1672 break;
1673 udelay(IWL_EEPROM_ACCESS_DELAY);
1674 }
1675
1676 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1677 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1678 rc = -ETIMEDOUT;
1679 goto done;
1680 }
1681 e[addr / 2] = le16_to_cpu(r >> 16);
1682 }
1683 rc = 0;
1684
1685 done:
1686 iwl4965_eeprom_release_semaphore(priv);
1687 return rc;
1688 }
1689
1690 /******************************************************************************
1691 *
1692 * Misc. internal state and helper functions
1693 *
1694 ******************************************************************************/
1695 #ifdef CONFIG_IWL4965_DEBUG
1696
1697 /**
1698 * iwl4965_report_frame - dump frame to syslog during debug sessions
1699 *
1700 * You may hack this function to show different aspects of received frames,
1701 * including selective frame dumps.
1702 * group100 parameter selects whether to show 1 out of 100 good frames.
1703 *
1704 * TODO: This was originally written for 3945, need to audit for
1705 * proper operation with 4965.
1706 */
1707 void iwl4965_report_frame(struct iwl4965_priv *priv,
1708 struct iwl4965_rx_packet *pkt,
1709 struct ieee80211_hdr *header, int group100)
1710 {
1711 u32 to_us;
1712 u32 print_summary = 0;
1713 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1714 u32 hundred = 0;
1715 u32 dataframe = 0;
1716 u16 fc;
1717 u16 seq_ctl;
1718 u16 channel;
1719 u16 phy_flags;
1720 int rate_sym;
1721 u16 length;
1722 u16 status;
1723 u16 bcn_tmr;
1724 u32 tsf_low;
1725 u64 tsf;
1726 u8 rssi;
1727 u8 agc;
1728 u16 sig_avg;
1729 u16 noise_diff;
1730 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1731 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1732 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
1733 u8 *data = IWL_RX_DATA(pkt);
1734
1735 /* MAC header */
1736 fc = le16_to_cpu(header->frame_control);
1737 seq_ctl = le16_to_cpu(header->seq_ctrl);
1738
1739 /* metadata */
1740 channel = le16_to_cpu(rx_hdr->channel);
1741 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1742 rate_sym = rx_hdr->rate;
1743 length = le16_to_cpu(rx_hdr->len);
1744
1745 /* end-of-frame status and timestamp */
1746 status = le32_to_cpu(rx_end->status);
1747 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1748 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1749 tsf = le64_to_cpu(rx_end->timestamp);
1750
1751 /* signal statistics */
1752 rssi = rx_stats->rssi;
1753 agc = rx_stats->agc;
1754 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1755 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1756
1757 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1758
1759 /* if data frame is to us and all is good,
1760 * (optionally) print summary for only 1 out of every 100 */
1761 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1762 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1763 dataframe = 1;
1764 if (!group100)
1765 print_summary = 1; /* print each frame */
1766 else if (priv->framecnt_to_us < 100) {
1767 priv->framecnt_to_us++;
1768 print_summary = 0;
1769 } else {
1770 priv->framecnt_to_us = 0;
1771 print_summary = 1;
1772 hundred = 1;
1773 }
1774 } else {
1775 /* print summary for all other frames */
1776 print_summary = 1;
1777 }
1778
1779 if (print_summary) {
1780 char *title;
1781 u32 rate;
1782
1783 if (hundred)
1784 title = "100Frames";
1785 else if (fc & IEEE80211_FCTL_RETRY)
1786 title = "Retry";
1787 else if (ieee80211_is_assoc_response(fc))
1788 title = "AscRsp";
1789 else if (ieee80211_is_reassoc_response(fc))
1790 title = "RasRsp";
1791 else if (ieee80211_is_probe_response(fc)) {
1792 title = "PrbRsp";
1793 print_dump = 1; /* dump frame contents */
1794 } else if (ieee80211_is_beacon(fc)) {
1795 title = "Beacon";
1796 print_dump = 1; /* dump frame contents */
1797 } else if (ieee80211_is_atim(fc))
1798 title = "ATIM";
1799 else if (ieee80211_is_auth(fc))
1800 title = "Auth";
1801 else if (ieee80211_is_deauth(fc))
1802 title = "DeAuth";
1803 else if (ieee80211_is_disassoc(fc))
1804 title = "DisAssoc";
1805 else
1806 title = "Frame";
1807
1808 rate = iwl4965_rate_index_from_plcp(rate_sym);
1809 if (rate == -1)
1810 rate = 0;
1811 else
1812 rate = iwl4965_rates[rate].ieee / 2;
1813
1814 /* print frame summary.
1815 * MAC addresses show just the last byte (for brevity),
1816 * but you can hack it to show more, if you'd like to. */
1817 if (dataframe)
1818 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1819 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1820 title, fc, header->addr1[5],
1821 length, rssi, channel, rate);
1822 else {
1823 /* src/dst addresses assume managed mode */
1824 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1825 "src=0x%02x, rssi=%u, tim=%lu usec, "
1826 "phy=0x%02x, chnl=%d\n",
1827 title, fc, header->addr1[5],
1828 header->addr3[5], rssi,
1829 tsf_low - priv->scan_start_tsf,
1830 phy_flags, channel);
1831 }
1832 }
1833 if (print_dump)
1834 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
1835 }
1836 #endif
1837
1838 static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
1839 {
1840 if (priv->hw_setting.shared_virt)
1841 pci_free_consistent(priv->pci_dev,
1842 sizeof(struct iwl4965_shared),
1843 priv->hw_setting.shared_virt,
1844 priv->hw_setting.shared_phys);
1845 }
1846
1847 /**
1848 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
1849 *
1850 * return : set the bit for each supported rate insert in ie
1851 */
1852 static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1853 u16 basic_rate, int *left)
1854 {
1855 u16 ret_rates = 0, bit;
1856 int i;
1857 u8 *cnt = ie;
1858 u8 *rates = ie + 1;
1859
1860 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1861 if (bit & supported_rate) {
1862 ret_rates |= bit;
1863 rates[*cnt] = iwl4965_rates[i].ieee |
1864 ((bit & basic_rate) ? 0x80 : 0x00);
1865 (*cnt)++;
1866 (*left)--;
1867 if ((*left <= 0) ||
1868 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1869 break;
1870 }
1871 }
1872
1873 return ret_rates;
1874 }
1875
1876 #ifdef CONFIG_IWL4965_HT
1877 void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
1878 struct ieee80211_ht_cap *ht_cap,
1879 u8 use_current_config);
1880 #endif
1881
1882 /**
1883 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
1884 */
1885 static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
1886 struct ieee80211_mgmt *frame,
1887 int left, int is_direct)
1888 {
1889 int len = 0;
1890 u8 *pos = NULL;
1891 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
1892 #ifdef CONFIG_IWL4965_HT
1893 struct ieee80211_hw_mode *mode;
1894 #endif /* CONFIG_IWL4965_HT */
1895
1896 /* Make sure there is enough space for the probe request,
1897 * two mandatory IEs and the data */
1898 left -= 24;
1899 if (left < 0)
1900 return 0;
1901 len += 24;
1902
1903 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1904 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
1905 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1906 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
1907 frame->seq_ctrl = 0;
1908
1909 /* fill in our indirect SSID IE */
1910 /* ...next IE... */
1911
1912 left -= 2;
1913 if (left < 0)
1914 return 0;
1915 len += 2;
1916 pos = &(frame->u.probe_req.variable[0]);
1917 *pos++ = WLAN_EID_SSID;
1918 *pos++ = 0;
1919
1920 /* fill in our direct SSID IE... */
1921 if (is_direct) {
1922 /* ...next IE... */
1923 left -= 2 + priv->essid_len;
1924 if (left < 0)
1925 return 0;
1926 /* ... fill it in... */
1927 *pos++ = WLAN_EID_SSID;
1928 *pos++ = priv->essid_len;
1929 memcpy(pos, priv->essid, priv->essid_len);
1930 pos += priv->essid_len;
1931 len += 2 + priv->essid_len;
1932 }
1933
1934 /* fill in supported rate */
1935 /* ...next IE... */
1936 left -= 2;
1937 if (left < 0)
1938 return 0;
1939
1940 /* ... fill it in... */
1941 *pos++ = WLAN_EID_SUPP_RATES;
1942 *pos = 0;
1943
1944 /* exclude 60M rate */
1945 active_rates = priv->rates_mask;
1946 active_rates &= ~IWL_RATE_60M_MASK;
1947
1948 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
1949
1950 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1951 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
1952 active_rate_basic, &left);
1953 active_rates &= ~ret_rates;
1954
1955 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
1956 active_rate_basic, &left);
1957 active_rates &= ~ret_rates;
1958
1959 len += 2 + *pos;
1960 pos += (*pos) + 1;
1961 if (active_rates == 0)
1962 goto fill_end;
1963
1964 /* fill in supported extended rate */
1965 /* ...next IE... */
1966 left -= 2;
1967 if (left < 0)
1968 return 0;
1969 /* ... fill it in... */
1970 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1971 *pos = 0;
1972 iwl4965_supported_rate_to_ie(pos, active_rates,
1973 active_rate_basic, &left);
1974 if (*pos > 0)
1975 len += 2 + *pos;
1976
1977 #ifdef CONFIG_IWL4965_HT
1978 mode = priv->hw->conf.mode;
1979 if (mode->ht_info.ht_supported) {
1980 pos += (*pos) + 1;
1981 *pos++ = WLAN_EID_HT_CAPABILITY;
1982 *pos++ = sizeof(struct ieee80211_ht_cap);
1983 iwl4965_set_ht_capab(priv->hw,
1984 (struct ieee80211_ht_cap *)pos, 0);
1985 len += 2 + sizeof(struct ieee80211_ht_cap);
1986 }
1987 #endif /*CONFIG_IWL4965_HT */
1988
1989 fill_end:
1990 return (u16)len;
1991 }
1992
1993 /*
1994 * QoS support
1995 */
1996 #ifdef CONFIG_IWL4965_QOS
1997 static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
1998 struct iwl4965_qosparam_cmd *qos)
1999 {
2000
2001 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2002 sizeof(struct iwl4965_qosparam_cmd), qos);
2003 }
2004
2005 static void iwl4965_reset_qos(struct iwl4965_priv *priv)
2006 {
2007 u16 cw_min = 15;
2008 u16 cw_max = 1023;
2009 u8 aifs = 2;
2010 u8 is_legacy = 0;
2011 unsigned long flags;
2012 int i;
2013
2014 spin_lock_irqsave(&priv->lock, flags);
2015 priv->qos_data.qos_active = 0;
2016
2017 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2018 if (priv->qos_data.qos_enable)
2019 priv->qos_data.qos_active = 1;
2020 if (!(priv->active_rate & 0xfff0)) {
2021 cw_min = 31;
2022 is_legacy = 1;
2023 }
2024 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2025 if (priv->qos_data.qos_enable)
2026 priv->qos_data.qos_active = 1;
2027 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2028 cw_min = 31;
2029 is_legacy = 1;
2030 }
2031
2032 if (priv->qos_data.qos_active)
2033 aifs = 3;
2034
2035 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2036 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2037 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2038 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2039 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2040
2041 if (priv->qos_data.qos_active) {
2042 i = 1;
2043 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2044 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2045 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2046 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2047 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2048
2049 i = 2;
2050 priv->qos_data.def_qos_parm.ac[i].cw_min =
2051 cpu_to_le16((cw_min + 1) / 2 - 1);
2052 priv->qos_data.def_qos_parm.ac[i].cw_max =
2053 cpu_to_le16(cw_max);
2054 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2055 if (is_legacy)
2056 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2057 cpu_to_le16(6016);
2058 else
2059 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2060 cpu_to_le16(3008);
2061 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2062
2063 i = 3;
2064 priv->qos_data.def_qos_parm.ac[i].cw_min =
2065 cpu_to_le16((cw_min + 1) / 4 - 1);
2066 priv->qos_data.def_qos_parm.ac[i].cw_max =
2067 cpu_to_le16((cw_max + 1) / 2 - 1);
2068 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2069 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2070 if (is_legacy)
2071 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2072 cpu_to_le16(3264);
2073 else
2074 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2075 cpu_to_le16(1504);
2076 } else {
2077 for (i = 1; i < 4; i++) {
2078 priv->qos_data.def_qos_parm.ac[i].cw_min =
2079 cpu_to_le16(cw_min);
2080 priv->qos_data.def_qos_parm.ac[i].cw_max =
2081 cpu_to_le16(cw_max);
2082 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2083 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2084 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2085 }
2086 }
2087 IWL_DEBUG_QOS("set QoS to default \n");
2088
2089 spin_unlock_irqrestore(&priv->lock, flags);
2090 }
2091
2092 static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
2093 {
2094 unsigned long flags;
2095
2096 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2097 return;
2098
2099 if (!priv->qos_data.qos_enable)
2100 return;
2101
2102 spin_lock_irqsave(&priv->lock, flags);
2103 priv->qos_data.def_qos_parm.qos_flags = 0;
2104
2105 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2106 !priv->qos_data.qos_cap.q_AP.txop_request)
2107 priv->qos_data.def_qos_parm.qos_flags |=
2108 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2109 if (priv->qos_data.qos_active)
2110 priv->qos_data.def_qos_parm.qos_flags |=
2111 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2112
2113 #ifdef CONFIG_IWL4965_HT
2114 if (priv->current_ht_config.is_ht)
2115 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
2116 #endif /* CONFIG_IWL4965_HT */
2117
2118 spin_unlock_irqrestore(&priv->lock, flags);
2119
2120 if (force || iwl4965_is_associated(priv)) {
2121 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2122 priv->qos_data.qos_active,
2123 priv->qos_data.def_qos_parm.qos_flags);
2124
2125 iwl4965_send_qos_params_command(priv,
2126 &(priv->qos_data.def_qos_parm));
2127 }
2128 }
2129
2130 #endif /* CONFIG_IWL4965_QOS */
2131 /*
2132 * Power management (not Tx power!) functions
2133 */
2134 #define MSEC_TO_USEC 1024
2135
2136 #define NOSLP __constant_cpu_to_le16(0), 0, 0
2137 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2138 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2139 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2140 __constant_cpu_to_le32(X1), \
2141 __constant_cpu_to_le32(X2), \
2142 __constant_cpu_to_le32(X3), \
2143 __constant_cpu_to_le32(X4)}
2144
2145
2146 /* default power management (not Tx power) table values */
2147 /* for tim 0-10 */
2148 static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
2149 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2150 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2151 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2152 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2153 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2154 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2155 };
2156
2157 /* for tim > 10 */
2158 static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
2159 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2160 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2161 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2162 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2163 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2164 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2165 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2166 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2167 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2168 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2169 };
2170
2171 int iwl4965_power_init_handle(struct iwl4965_priv *priv)
2172 {
2173 int rc = 0, i;
2174 struct iwl4965_power_mgr *pow_data;
2175 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
2176 u16 pci_pm;
2177
2178 IWL_DEBUG_POWER("Initialize power \n");
2179
2180 pow_data = &(priv->power_data);
2181
2182 memset(pow_data, 0, sizeof(*pow_data));
2183
2184 pow_data->active_index = IWL_POWER_RANGE_0;
2185 pow_data->dtim_val = 0xffff;
2186
2187 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2188 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2189
2190 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2191 if (rc != 0)
2192 return 0;
2193 else {
2194 struct iwl4965_powertable_cmd *cmd;
2195
2196 IWL_DEBUG_POWER("adjust power command flags\n");
2197
2198 for (i = 0; i < IWL_POWER_AC; i++) {
2199 cmd = &pow_data->pwr_range_0[i].cmd;
2200
2201 if (pci_pm & 0x1)
2202 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2203 else
2204 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2205 }
2206 }
2207 return rc;
2208 }
2209
2210 static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2211 struct iwl4965_powertable_cmd *cmd, u32 mode)
2212 {
2213 int rc = 0, i;
2214 u8 skip;
2215 u32 max_sleep = 0;
2216 struct iwl4965_power_vec_entry *range;
2217 u8 period = 0;
2218 struct iwl4965_power_mgr *pow_data;
2219
2220 if (mode > IWL_POWER_INDEX_5) {
2221 IWL_DEBUG_POWER("Error invalid power mode \n");
2222 return -1;
2223 }
2224 pow_data = &(priv->power_data);
2225
2226 if (pow_data->active_index == IWL_POWER_RANGE_0)
2227 range = &pow_data->pwr_range_0[0];
2228 else
2229 range = &pow_data->pwr_range_1[1];
2230
2231 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
2232
2233 #ifdef IWL_MAC80211_DISABLE
2234 if (priv->assoc_network != NULL) {
2235 unsigned long flags;
2236
2237 period = priv->assoc_network->tim.tim_period;
2238 }
2239 #endif /*IWL_MAC80211_DISABLE */
2240 skip = range[mode].no_dtim;
2241
2242 if (period == 0) {
2243 period = 1;
2244 skip = 0;
2245 }
2246
2247 if (skip == 0) {
2248 max_sleep = period;
2249 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2250 } else {
2251 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2252 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2253 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2254 }
2255
2256 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2257 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2258 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2259 }
2260
2261 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2262 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2263 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2264 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2265 le32_to_cpu(cmd->sleep_interval[0]),
2266 le32_to_cpu(cmd->sleep_interval[1]),
2267 le32_to_cpu(cmd->sleep_interval[2]),
2268 le32_to_cpu(cmd->sleep_interval[3]),
2269 le32_to_cpu(cmd->sleep_interval[4]));
2270
2271 return rc;
2272 }
2273
2274 static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
2275 {
2276 u32 uninitialized_var(final_mode);
2277 int rc;
2278 struct iwl4965_powertable_cmd cmd;
2279
2280 /* If on battery, set to 3,
2281 * if plugged into AC power, set to CAM ("continuously aware mode"),
2282 * else user level */
2283 switch (mode) {
2284 case IWL_POWER_BATTERY:
2285 final_mode = IWL_POWER_INDEX_3;
2286 break;
2287 case IWL_POWER_AC:
2288 final_mode = IWL_POWER_MODE_CAM;
2289 break;
2290 default:
2291 final_mode = mode;
2292 break;
2293 }
2294
2295 cmd.keep_alive_beacons = 0;
2296
2297 iwl4965_update_power_cmd(priv, &cmd, final_mode);
2298
2299 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2300
2301 if (final_mode == IWL_POWER_MODE_CAM)
2302 clear_bit(STATUS_POWER_PMI, &priv->status);
2303 else
2304 set_bit(STATUS_POWER_PMI, &priv->status);
2305
2306 return rc;
2307 }
2308
2309 int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2310 {
2311 /* Filter incoming packets to determine if they are targeted toward
2312 * this network, discarding packets coming from ourselves */
2313 switch (priv->iw_mode) {
2314 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2315 /* packets from our adapter are dropped (echo) */
2316 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2317 return 0;
2318 /* {broad,multi}cast packets to our IBSS go through */
2319 if (is_multicast_ether_addr(header->addr1))
2320 return !compare_ether_addr(header->addr3, priv->bssid);
2321 /* packets to our adapter go through */
2322 return !compare_ether_addr(header->addr1, priv->mac_addr);
2323 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2324 /* packets from our adapter are dropped (echo) */
2325 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2326 return 0;
2327 /* {broad,multi}cast packets to our BSS go through */
2328 if (is_multicast_ether_addr(header->addr1))
2329 return !compare_ether_addr(header->addr2, priv->bssid);
2330 /* packets to our adapter go through */
2331 return !compare_ether_addr(header->addr1, priv->mac_addr);
2332 }
2333
2334 return 1;
2335 }
2336
2337 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2338
2339 static const char *iwl4965_get_tx_fail_reason(u32 status)
2340 {
2341 switch (status & TX_STATUS_MSK) {
2342 case TX_STATUS_SUCCESS:
2343 return "SUCCESS";
2344 TX_STATUS_ENTRY(SHORT_LIMIT);
2345 TX_STATUS_ENTRY(LONG_LIMIT);
2346 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2347 TX_STATUS_ENTRY(MGMNT_ABORT);
2348 TX_STATUS_ENTRY(NEXT_FRAG);
2349 TX_STATUS_ENTRY(LIFE_EXPIRE);
2350 TX_STATUS_ENTRY(DEST_PS);
2351 TX_STATUS_ENTRY(ABORTED);
2352 TX_STATUS_ENTRY(BT_RETRY);
2353 TX_STATUS_ENTRY(STA_INVALID);
2354 TX_STATUS_ENTRY(FRAG_DROPPED);
2355 TX_STATUS_ENTRY(TID_DISABLE);
2356 TX_STATUS_ENTRY(FRAME_FLUSHED);
2357 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2358 TX_STATUS_ENTRY(TX_LOCKED);
2359 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2360 }
2361
2362 return "UNKNOWN";
2363 }
2364
2365 /**
2366 * iwl4965_scan_cancel - Cancel any currently executing HW scan
2367 *
2368 * NOTE: priv->mutex is not required before calling this function
2369 */
2370 static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
2371 {
2372 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2373 clear_bit(STATUS_SCANNING, &priv->status);
2374 return 0;
2375 }
2376
2377 if (test_bit(STATUS_SCANNING, &priv->status)) {
2378 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2379 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2380 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2381 queue_work(priv->workqueue, &priv->abort_scan);
2382
2383 } else
2384 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2385
2386 return test_bit(STATUS_SCANNING, &priv->status);
2387 }
2388
2389 return 0;
2390 }
2391
2392 /**
2393 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
2394 * @ms: amount of time to wait (in milliseconds) for scan to abort
2395 *
2396 * NOTE: priv->mutex must be held before calling this function
2397 */
2398 static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
2399 {
2400 unsigned long now = jiffies;
2401 int ret;
2402
2403 ret = iwl4965_scan_cancel(priv);
2404 if (ret && ms) {
2405 mutex_unlock(&priv->mutex);
2406 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2407 test_bit(STATUS_SCANNING, &priv->status))
2408 msleep(1);
2409 mutex_lock(&priv->mutex);
2410
2411 return test_bit(STATUS_SCANNING, &priv->status);
2412 }
2413
2414 return ret;
2415 }
2416
2417 static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
2418 {
2419 /* Reset ieee stats */
2420
2421 /* We don't reset the net_device_stats (ieee->stats) on
2422 * re-association */
2423
2424 priv->last_seq_num = -1;
2425 priv->last_frag_num = -1;
2426 priv->last_packet_time = 0;
2427
2428 iwl4965_scan_cancel(priv);
2429 }
2430
2431 #define MAX_UCODE_BEACON_INTERVAL 4096
2432 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2433
2434 static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
2435 {
2436 u16 new_val = 0;
2437 u16 beacon_factor = 0;
2438
2439 beacon_factor =
2440 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2441 / MAX_UCODE_BEACON_INTERVAL;
2442 new_val = beacon_val / beacon_factor;
2443
2444 return cpu_to_le16(new_val);
2445 }
2446
2447 static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
2448 {
2449 u64 interval_tm_unit;
2450 u64 tsf, result;
2451 unsigned long flags;
2452 struct ieee80211_conf *conf = NULL;
2453 u16 beacon_int = 0;
2454
2455 conf = ieee80211_get_hw_conf(priv->hw);
2456
2457 spin_lock_irqsave(&priv->lock, flags);
2458 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2459 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2460
2461 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2462
2463 tsf = priv->timestamp1;
2464 tsf = ((tsf << 32) | priv->timestamp0);
2465
2466 beacon_int = priv->beacon_int;
2467 spin_unlock_irqrestore(&priv->lock, flags);
2468
2469 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2470 if (beacon_int == 0) {
2471 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2472 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2473 } else {
2474 priv->rxon_timing.beacon_interval =
2475 cpu_to_le16(beacon_int);
2476 priv->rxon_timing.beacon_interval =
2477 iwl4965_adjust_beacon_interval(
2478 le16_to_cpu(priv->rxon_timing.beacon_interval));
2479 }
2480
2481 priv->rxon_timing.atim_window = 0;
2482 } else {
2483 priv->rxon_timing.beacon_interval =
2484 iwl4965_adjust_beacon_interval(conf->beacon_int);
2485 /* TODO: we need to get atim_window from upper stack
2486 * for now we set to 0 */
2487 priv->rxon_timing.atim_window = 0;
2488 }
2489
2490 interval_tm_unit =
2491 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2492 result = do_div(tsf, interval_tm_unit);
2493 priv->rxon_timing.beacon_init_val =
2494 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2495
2496 IWL_DEBUG_ASSOC
2497 ("beacon interval %d beacon timer %d beacon tim %d\n",
2498 le16_to_cpu(priv->rxon_timing.beacon_interval),
2499 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2500 le16_to_cpu(priv->rxon_timing.atim_window));
2501 }
2502
2503 static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
2504 {
2505 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2506 IWL_ERROR("APs don't scan.\n");
2507 return 0;
2508 }
2509
2510 if (!iwl4965_is_ready_rf(priv)) {
2511 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2512 return -EIO;
2513 }
2514
2515 if (test_bit(STATUS_SCANNING, &priv->status)) {
2516 IWL_DEBUG_SCAN("Scan already in progress.\n");
2517 return -EAGAIN;
2518 }
2519
2520 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2521 IWL_DEBUG_SCAN("Scan request while abort pending. "
2522 "Queuing.\n");
2523 return -EAGAIN;
2524 }
2525
2526 IWL_DEBUG_INFO("Starting scan...\n");
2527 priv->scan_bands = 2;
2528 set_bit(STATUS_SCANNING, &priv->status);
2529 priv->scan_start = jiffies;
2530 priv->scan_pass_start = priv->scan_start;
2531
2532 queue_work(priv->workqueue, &priv->request_scan);
2533
2534 return 0;
2535 }
2536
2537 static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
2538 {
2539 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
2540
2541 if (hw_decrypt)
2542 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2543 else
2544 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2545
2546 return 0;
2547 }
2548
2549 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
2550 {
2551 if (phymode == MODE_IEEE80211A) {
2552 priv->staging_rxon.flags &=
2553 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2554 | RXON_FLG_CCK_MSK);
2555 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2556 } else {
2557 /* Copied from iwl4965_bg_post_associate() */
2558 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2559 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2560 else
2561 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2562
2563 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2564 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2565
2566 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2567 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2568 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2569 }
2570 }
2571
2572 /*
2573 * initialize rxon structure with default values from eeprom
2574 */
2575 static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
2576 {
2577 const struct iwl4965_channel_info *ch_info;
2578
2579 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2580
2581 switch (priv->iw_mode) {
2582 case IEEE80211_IF_TYPE_AP:
2583 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2584 break;
2585
2586 case IEEE80211_IF_TYPE_STA:
2587 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2588 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2589 break;
2590
2591 case IEEE80211_IF_TYPE_IBSS:
2592 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2593 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2594 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2595 RXON_FILTER_ACCEPT_GRP_MSK;
2596 break;
2597
2598 case IEEE80211_IF_TYPE_MNTR:
2599 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2600 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2601 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2602 break;
2603 }
2604
2605 #if 0
2606 /* TODO: Figure out when short_preamble would be set and cache from
2607 * that */
2608 if (!hw_to_local(priv->hw)->short_preamble)
2609 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2610 else
2611 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2612 #endif
2613
2614 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
2615 le16_to_cpu(priv->staging_rxon.channel));
2616
2617 if (!ch_info)
2618 ch_info = &priv->channel_info[0];
2619
2620 /*
2621 * in some case A channels are all non IBSS
2622 * in this case force B/G channel
2623 */
2624 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2625 !(is_channel_ibss(ch_info)))
2626 ch_info = &priv->channel_info[0];
2627
2628 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2629 if (is_channel_a_band(ch_info))
2630 priv->phymode = MODE_IEEE80211A;
2631 else
2632 priv->phymode = MODE_IEEE80211G;
2633
2634 iwl4965_set_flags_for_phymode(priv, priv->phymode);
2635
2636 priv->staging_rxon.ofdm_basic_rates =
2637 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2638 priv->staging_rxon.cck_basic_rates =
2639 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2640
2641 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2642 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2643 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2644 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2645 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2646 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2647 iwl4965_set_rxon_chain(priv);
2648 }
2649
2650 static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
2651 {
2652 if (mode == IEEE80211_IF_TYPE_IBSS) {
2653 const struct iwl4965_channel_info *ch_info;
2654
2655 ch_info = iwl4965_get_channel_info(priv,
2656 priv->phymode,
2657 le16_to_cpu(priv->staging_rxon.channel));
2658
2659 if (!ch_info || !is_channel_ibss(ch_info)) {
2660 IWL_ERROR("channel %d not IBSS channel\n",
2661 le16_to_cpu(priv->staging_rxon.channel));
2662 return -EINVAL;
2663 }
2664 }
2665
2666 priv->iw_mode = mode;
2667
2668 iwl4965_connection_init_rx_config(priv);
2669 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2670
2671 iwl4965_clear_stations_table(priv);
2672
2673 /* dont commit rxon if rf-kill is on*/
2674 if (!iwl4965_is_ready_rf(priv))
2675 return -EAGAIN;
2676
2677 cancel_delayed_work(&priv->scan_check);
2678 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2679 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2680 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2681 return -EAGAIN;
2682 }
2683
2684 iwl4965_commit_rxon(priv);
2685
2686 return 0;
2687 }
2688
2689 static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
2690 struct ieee80211_tx_control *ctl,
2691 struct iwl4965_cmd *cmd,
2692 struct sk_buff *skb_frag,
2693 int last_frag)
2694 {
2695 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2696
2697 switch (keyinfo->alg) {
2698 case ALG_CCMP:
2699 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2700 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2701 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2702 break;
2703
2704 case ALG_TKIP:
2705 #if 0
2706 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2707
2708 if (last_frag)
2709 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2710 8);
2711 else
2712 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2713 #endif
2714 break;
2715
2716 case ALG_WEP:
2717 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2718 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2719
2720 if (keyinfo->keylen == 13)
2721 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2722
2723 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2724
2725 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2726 "with key %d\n", ctl->key_idx);
2727 break;
2728
2729 default:
2730 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2731 break;
2732 }
2733 }
2734
2735 /*
2736 * handle build REPLY_TX command notification.
2737 */
2738 static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2739 struct iwl4965_cmd *cmd,
2740 struct ieee80211_tx_control *ctrl,
2741 struct ieee80211_hdr *hdr,
2742 int is_unicast, u8 std_id)
2743 {
2744 __le16 *qc;
2745 u16 fc = le16_to_cpu(hdr->frame_control);
2746 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2747
2748 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2749 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2750 tx_flags |= TX_CMD_FLG_ACK_MSK;
2751 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2752 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2753 if (ieee80211_is_probe_response(fc) &&
2754 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2755 tx_flags |= TX_CMD_FLG_TSF_MSK;
2756 } else {
2757 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2758 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2759 }
2760
2761 cmd->cmd.tx.sta_id = std_id;
2762 if (ieee80211_get_morefrag(hdr))
2763 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2764
2765 qc = ieee80211_get_qos_ctrl(hdr);
2766 if (qc) {
2767 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2768 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2769 } else
2770 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2771
2772 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2773 tx_flags |= TX_CMD_FLG_RTS_MSK;
2774 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2775 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2776 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2777 tx_flags |= TX_CMD_FLG_CTS_MSK;
2778 }
2779
2780 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2781 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2782
2783 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2784 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2785 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2786 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2787 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2788 else
2789 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2790 } else
2791 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2792
2793 cmd->cmd.tx.driver_txop = 0;
2794 cmd->cmd.tx.tx_flags = tx_flags;
2795 cmd->cmd.tx.next_frame_len = 0;
2796 }
2797
2798 /**
2799 * iwl4965_get_sta_id - Find station's index within station table
2800 *
2801 * If new IBSS station, create new entry in station table
2802 */
2803 static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2804 struct ieee80211_hdr *hdr)
2805 {
2806 int sta_id;
2807 u16 fc = le16_to_cpu(hdr->frame_control);
2808 DECLARE_MAC_BUF(mac);
2809
2810 /* If this frame is broadcast or management, use broadcast station id */
2811 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2812 is_multicast_ether_addr(hdr->addr1))
2813 return priv->hw_setting.bcast_sta_id;
2814
2815 switch (priv->iw_mode) {
2816
2817 /* If we are a client station in a BSS network, use the special
2818 * AP station entry (that's the only station we communicate with) */
2819 case IEEE80211_IF_TYPE_STA:
2820 return IWL_AP_ID;
2821
2822 /* If we are an AP, then find the station, or use BCAST */
2823 case IEEE80211_IF_TYPE_AP:
2824 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2825 if (sta_id != IWL_INVALID_STATION)
2826 return sta_id;
2827 return priv->hw_setting.bcast_sta_id;
2828
2829 /* If this frame is going out to an IBSS network, find the station,
2830 * or create a new station table entry */
2831 case IEEE80211_IF_TYPE_IBSS:
2832 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2833 if (sta_id != IWL_INVALID_STATION)
2834 return sta_id;
2835
2836 /* Create new station table entry */
2837 sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC);
2838
2839 if (sta_id != IWL_INVALID_STATION)
2840 return sta_id;
2841
2842 IWL_DEBUG_DROP("Station %s not in station map. "
2843 "Defaulting to broadcast...\n",
2844 print_mac(mac, hdr->addr1));
2845 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2846 return priv->hw_setting.bcast_sta_id;
2847
2848 default:
2849 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2850 return priv->hw_setting.bcast_sta_id;
2851 }
2852 }
2853
2854 /*
2855 * start REPLY_TX command process
2856 */
2857 static int iwl4965_tx_skb(struct iwl4965_priv *priv,
2858 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2859 {
2860 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2861 struct iwl4965_tfd_frame *tfd;
2862 u32 *control_flags;
2863 int txq_id = ctl->queue;
2864 struct iwl4965_tx_queue *txq = NULL;
2865 struct iwl4965_queue *q = NULL;
2866 dma_addr_t phys_addr;
2867 dma_addr_t txcmd_phys;
2868 struct iwl4965_cmd *out_cmd = NULL;
2869 u16 len, idx, len_org;
2870 u8 id, hdr_len, unicast;
2871 u8 sta_id;
2872 u16 seq_number = 0;
2873 u16 fc;
2874 __le16 *qc;
2875 u8 wait_write_ptr = 0;
2876 unsigned long flags;
2877 int rc;
2878
2879 spin_lock_irqsave(&priv->lock, flags);
2880 if (iwl4965_is_rfkill(priv)) {
2881 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2882 goto drop_unlock;
2883 }
2884
2885 if (!priv->interface_id) {
2886 IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2887 goto drop_unlock;
2888 }
2889
2890 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2891 IWL_ERROR("ERROR: No TX rate available.\n");
2892 goto drop_unlock;
2893 }
2894
2895 unicast = !is_multicast_ether_addr(hdr->addr1);
2896 id = 0;
2897
2898 fc = le16_to_cpu(hdr->frame_control);
2899
2900 #ifdef CONFIG_IWL4965_DEBUG
2901 if (ieee80211_is_auth(fc))
2902 IWL_DEBUG_TX("Sending AUTH frame\n");
2903 else if (ieee80211_is_assoc_request(fc))
2904 IWL_DEBUG_TX("Sending ASSOC frame\n");
2905 else if (ieee80211_is_reassoc_request(fc))
2906 IWL_DEBUG_TX("Sending REASSOC frame\n");
2907 #endif
2908
2909 /* drop all data frame if we are not associated */
2910 if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
2911 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2912 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
2913 goto drop_unlock;
2914 }
2915
2916 spin_unlock_irqrestore(&priv->lock, flags);
2917
2918 hdr_len = ieee80211_get_hdrlen(fc);
2919
2920 /* Find (or create) index into station table for destination station */
2921 sta_id = iwl4965_get_sta_id(priv, hdr);
2922 if (sta_id == IWL_INVALID_STATION) {
2923 DECLARE_MAC_BUF(mac);
2924
2925 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2926 print_mac(mac, hdr->addr1));
2927 goto drop;
2928 }
2929
2930 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2931
2932 qc = ieee80211_get_qos_ctrl(hdr);
2933 if (qc) {
2934 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2935 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2936 IEEE80211_SCTL_SEQ;
2937 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2938 (hdr->seq_ctrl &
2939 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2940 seq_number += 0x10;
2941 #ifdef CONFIG_IWL4965_HT
2942 #ifdef CONFIG_IWL4965_HT_AGG
2943 /* aggregation is on for this <sta,tid> */
2944 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2945 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
2946 #endif /* CONFIG_IWL4965_HT_AGG */
2947 #endif /* CONFIG_IWL4965_HT */
2948 }
2949
2950 /* Descriptor for chosen Tx queue */
2951 txq = &priv->txq[txq_id];
2952 q = &txq->q;
2953
2954 spin_lock_irqsave(&priv->lock, flags);
2955
2956 /* Set up first empty TFD within this queue's circular TFD buffer */
2957 tfd = &txq->bd[q->write_ptr];
2958 memset(tfd, 0, sizeof(*tfd));
2959 control_flags = (u32 *) tfd;
2960 idx = get_cmd_index(q, q->write_ptr, 0);
2961
2962 /* Set up driver data for this TFD */
2963 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
2964 txq->txb[q->write_ptr].skb[0] = skb;
2965 memcpy(&(txq->txb[q->write_ptr].status.control),
2966 ctl, sizeof(struct ieee80211_tx_control));
2967
2968 /* Set up first empty entry in queue's array of Tx/cmd buffers */
2969 out_cmd = &txq->cmd[idx];
2970 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2971 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2972
2973 /*
2974 * Set up the Tx-command (not MAC!) header.
2975 * Store the chosen Tx queue and TFD index within the sequence field;
2976 * after Tx, uCode's Tx response will return this value so driver can
2977 * locate the frame within the tx queue and do post-tx processing.
2978 */
2979 out_cmd->hdr.cmd = REPLY_TX;
2980 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2981 INDEX_TO_SEQ(q->write_ptr)));
2982
2983 /* Copy MAC header from skb into command buffer */
2984 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2985
2986 /*
2987 * Use the first empty entry in this queue's command buffer array
2988 * to contain the Tx command and MAC header concatenated together
2989 * (payload data will be in another buffer).
2990 * Size of this varies, due to varying MAC header length.
2991 * If end is not dword aligned, we'll have 2 extra bytes at the end
2992 * of the MAC header (device reads on dword boundaries).
2993 * We'll tell device about this padding later.
2994 */
2995 len = priv->hw_setting.tx_cmd_len +
2996 sizeof(struct iwl4965_cmd_header) + hdr_len;
2997
2998 len_org = len;
2999 len = (len + 3) & ~3;
3000
3001 if (len_org != len)
3002 len_org = 1;
3003 else
3004 len_org = 0;
3005
3006 /* Physical address of this Tx command's header (not MAC header!),
3007 * within command buffer array. */
3008 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3009 offsetof(struct iwl4965_cmd, hdr);
3010
3011 /* Add buffer containing Tx command and MAC(!) header to TFD's
3012 * first entry */
3013 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
3014
3015 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
3016 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
3017
3018 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3019 * if any (802.11 null frames have no payload). */
3020 len = skb->len - hdr_len;
3021 if (len) {
3022 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3023 len, PCI_DMA_TODEVICE);
3024 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
3025 }
3026
3027 /* Tell 4965 about any 2-byte padding after MAC header */
3028 if (len_org)
3029 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3030
3031 /* Total # bytes to be transmitted */
3032 len = (u16)skb->len;
3033 out_cmd->cmd.tx.len = cpu_to_le16(len);
3034
3035 /* TODO need this for burst mode later on */
3036 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
3037
3038 /* set is_hcca to 0; it probably will never be implemented */
3039 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
3040
3041 iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
3042 hdr, hdr_len, ctl, NULL);
3043
3044 if (!ieee80211_get_morefrag(hdr)) {
3045 txq->need_update = 1;
3046 if (qc) {
3047 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3048 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3049 }
3050 } else {
3051 wait_write_ptr = 1;
3052 txq->need_update = 0;
3053 }
3054
3055 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
3056 sizeof(out_cmd->cmd.tx));
3057
3058 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
3059 ieee80211_get_hdrlen(fc));
3060
3061 /* Set up entry for this TFD in Tx byte-count array */
3062 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3063
3064 /* Tell device the write index *just past* this latest filled TFD */
3065 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3066 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
3067 spin_unlock_irqrestore(&priv->lock, flags);
3068
3069 if (rc)
3070 return rc;
3071
3072 if ((iwl4965_queue_space(q) < q->high_mark)
3073 && priv->mac80211_registered) {
3074 if (wait_write_ptr) {
3075 spin_lock_irqsave(&priv->lock, flags);
3076 txq->need_update = 1;
3077 iwl4965_tx_queue_update_write_ptr(priv, txq);
3078 spin_unlock_irqrestore(&priv->lock, flags);
3079 }
3080
3081 ieee80211_stop_queue(priv->hw, ctl->queue);
3082 }
3083
3084 return 0;
3085
3086 drop_unlock:
3087 spin_unlock_irqrestore(&priv->lock, flags);
3088 drop:
3089 return -1;
3090 }
3091
3092 static void iwl4965_set_rate(struct iwl4965_priv *priv)
3093 {
3094 const struct ieee80211_hw_mode *hw = NULL;
3095 struct ieee80211_rate *rate;
3096 int i;
3097
3098 hw = iwl4965_get_hw_mode(priv, priv->phymode);
3099 if (!hw) {
3100 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3101 return;
3102 }
3103
3104 priv->active_rate = 0;
3105 priv->active_rate_basic = 0;
3106
3107 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3108 hw->mode == MODE_IEEE80211A ?
3109 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3110
3111 for (i = 0; i < hw->num_rates; i++) {
3112 rate = &(hw->rates[i]);
3113 if ((rate->val < IWL_RATE_COUNT) &&
3114 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3115 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3116 rate->val, iwl4965_rates[rate->val].plcp,
3117 (rate->flags & IEEE80211_RATE_BASIC) ?
3118 "*" : "");
3119 priv->active_rate |= (1 << rate->val);
3120 if (rate->flags & IEEE80211_RATE_BASIC)
3121 priv->active_rate_basic |= (1 << rate->val);
3122 } else
3123 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3124 rate->val, iwl4965_rates[rate->val].plcp);
3125 }
3126
3127 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3128 priv->active_rate, priv->active_rate_basic);
3129
3130 /*
3131 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3132 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3133 * OFDM
3134 */
3135 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3136 priv->staging_rxon.cck_basic_rates =
3137 ((priv->active_rate_basic &
3138 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3139 else
3140 priv->staging_rxon.cck_basic_rates =
3141 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3142
3143 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3144 priv->staging_rxon.ofdm_basic_rates =
3145 ((priv->active_rate_basic &
3146 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3147 IWL_FIRST_OFDM_RATE) & 0xFF;
3148 else
3149 priv->staging_rxon.ofdm_basic_rates =
3150 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3151 }
3152
3153 static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
3154 {
3155 unsigned long flags;
3156
3157 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3158 return;
3159
3160 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3161 disable_radio ? "OFF" : "ON");
3162
3163 if (disable_radio) {
3164 iwl4965_scan_cancel(priv);
3165 /* FIXME: This is a workaround for AP */
3166 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3167 spin_lock_irqsave(&priv->lock, flags);
3168 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3169 CSR_UCODE_SW_BIT_RFKILL);
3170 spin_unlock_irqrestore(&priv->lock, flags);
3171 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3172 set_bit(STATUS_RF_KILL_SW, &priv->status);
3173 }
3174 return;
3175 }
3176
3177 spin_lock_irqsave(&priv->lock, flags);
3178 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3179
3180 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3181 spin_unlock_irqrestore(&priv->lock, flags);
3182
3183 /* wake up ucode */
3184 msleep(10);
3185
3186 spin_lock_irqsave(&priv->lock, flags);
3187 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3188 if (!iwl4965_grab_nic_access(priv))
3189 iwl4965_release_nic_access(priv);
3190 spin_unlock_irqrestore(&priv->lock, flags);
3191
3192 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3193 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3194 "disabled by HW switch\n");
3195 return;
3196 }
3197
3198 queue_work(priv->workqueue, &priv->restart);
3199 return;
3200 }
3201
3202 void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
3203 u32 decrypt_res, struct ieee80211_rx_status *stats)
3204 {
3205 u16 fc =
3206 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3207
3208 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3209 return;
3210
3211 if (!(fc & IEEE80211_FCTL_PROTECTED))
3212 return;
3213
3214 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3215 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3216 case RX_RES_STATUS_SEC_TYPE_TKIP:
3217 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3218 RX_RES_STATUS_BAD_ICV_MIC)
3219 stats->flag |= RX_FLAG_MMIC_ERROR;
3220 case RX_RES_STATUS_SEC_TYPE_WEP:
3221 case RX_RES_STATUS_SEC_TYPE_CCMP:
3222 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3223 RX_RES_STATUS_DECRYPT_OK) {
3224 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3225 stats->flag |= RX_FLAG_DECRYPTED;
3226 }
3227 break;
3228
3229 default:
3230 break;
3231 }
3232 }
3233
3234 void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
3235 struct iwl4965_rx_mem_buffer *rxb,
3236 void *data, short len,
3237 struct ieee80211_rx_status *stats,
3238 u16 phy_flags)
3239 {
3240 struct iwl4965_rt_rx_hdr *iwl4965_rt;
3241
3242 /* First cache any information we need before we overwrite
3243 * the information provided in the skb from the hardware */
3244 s8 signal = stats->ssi;
3245 s8 noise = 0;
3246 int rate = stats->rate;
3247 u64 tsf = stats->mactime;
3248 __le16 phy_flags_hw = cpu_to_le16(phy_flags);
3249
3250 /* We received data from the HW, so stop the watchdog */
3251 if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) {
3252 IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3253 return;
3254 }
3255
3256 /* copy the frame data to write after where the radiotap header goes */
3257 iwl4965_rt = (void *)rxb->skb->data;
3258 memmove(iwl4965_rt->payload, data, len);
3259
3260 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3261 iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
3262
3263 /* total header + data */
3264 iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
3265
3266 /* Set the size of the skb to the size of the frame */
3267 skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
3268
3269 /* Big bitfield of all the fields we provide in radiotap */
3270 iwl4965_rt->rt_hdr.it_present =
3271 cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3272 (1 << IEEE80211_RADIOTAP_FLAGS) |
3273 (1 << IEEE80211_RADIOTAP_RATE) |
3274 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3275 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3276 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3277 (1 << IEEE80211_RADIOTAP_ANTENNA));
3278
3279 /* Zero the flags, we'll add to them as we go */
3280 iwl4965_rt->rt_flags = 0;
3281
3282 iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
3283
3284 /* Convert to dBm */
3285 iwl4965_rt->rt_dbmsignal = signal;
3286 iwl4965_rt->rt_dbmnoise = noise;
3287
3288 /* Convert the channel frequency and set the flags */
3289 iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
3290 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3291 iwl4965_rt->rt_chbitmask =
3292 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3293 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3294 iwl4965_rt->rt_chbitmask =
3295 cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3296 else /* 802.11g */
3297 iwl4965_rt->rt_chbitmask =
3298 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3299
3300 rate = iwl4965_rate_index_from_plcp(rate);
3301 if (rate == -1)
3302 iwl4965_rt->rt_rate = 0;
3303 else
3304 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
3305
3306 /* antenna number */
3307 iwl4965_rt->rt_antenna =
3308 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3309
3310 /* set the preamble flag if we have it */
3311 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3312 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3313
3314 IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3315
3316 stats->flag |= RX_FLAG_RADIOTAP;
3317 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3318 rxb->skb = NULL;
3319 }
3320
3321
3322 #define IWL_PACKET_RETRY_TIME HZ
3323
3324 int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
3325 {
3326 u16 sc = le16_to_cpu(header->seq_ctrl);
3327 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3328 u16 frag = sc & IEEE80211_SCTL_FRAG;
3329 u16 *last_seq, *last_frag;
3330 unsigned long *last_time;
3331
3332 switch (priv->iw_mode) {
3333 case IEEE80211_IF_TYPE_IBSS:{
3334 struct list_head *p;
3335 struct iwl4965_ibss_seq *entry = NULL;
3336 u8 *mac = header->addr2;
3337 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3338
3339 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3340 entry = list_entry(p, struct iwl4965_ibss_seq, list);
3341 if (!compare_ether_addr(entry->mac, mac))
3342 break;
3343 }
3344 if (p == &priv->ibss_mac_hash[index]) {
3345 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3346 if (!entry) {
3347 IWL_ERROR("Cannot malloc new mac entry\n");
3348 return 0;
3349 }
3350 memcpy(entry->mac, mac, ETH_ALEN);
3351 entry->seq_num = seq;
3352 entry->frag_num = frag;
3353 entry->packet_time = jiffies;
3354 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3355 return 0;
3356 }
3357 last_seq = &entry->seq_num;
3358 last_frag = &entry->frag_num;
3359 last_time = &entry->packet_time;
3360 break;
3361 }
3362 case IEEE80211_IF_TYPE_STA:
3363 last_seq = &priv->last_seq_num;
3364 last_frag = &priv->last_frag_num;
3365 last_time = &priv->last_packet_time;
3366 break;
3367 default:
3368 return 0;
3369 }
3370 if ((*last_seq == seq) &&
3371 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3372 if (*last_frag == frag)
3373 goto drop;
3374 if (*last_frag + 1 != frag)
3375 /* out-of-order fragment */
3376 goto drop;
3377 } else
3378 *last_seq = seq;
3379
3380 *last_frag = frag;
3381 *last_time = jiffies;
3382 return 0;
3383
3384 drop:
3385 return 1;
3386 }
3387
3388 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3389
3390 #include "iwl-spectrum.h"
3391
3392 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3393 #define BEACON_TIME_MASK_HIGH 0xFF000000
3394 #define TIME_UNIT 1024
3395
3396 /*
3397 * extended beacon time format
3398 * time in usec will be changed into a 32-bit value in 8:24 format
3399 * the high 1 byte is the beacon counts
3400 * the lower 3 bytes is the time in usec within one beacon interval
3401 */
3402
3403 static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
3404 {
3405 u32 quot;
3406 u32 rem;
3407 u32 interval = beacon_interval * 1024;
3408
3409 if (!interval || !usec)
3410 return 0;
3411
3412 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3413 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3414
3415 return (quot << 24) + rem;
3416 }
3417
3418 /* base is usually what we get from ucode with each received frame,
3419 * the same as HW timer counter counting down
3420 */
3421
3422 static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3423 {
3424 u32 base_low = base & BEACON_TIME_MASK_LOW;
3425 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3426 u32 interval = beacon_interval * TIME_UNIT;
3427 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3428 (addon & BEACON_TIME_MASK_HIGH);
3429
3430 if (base_low > addon_low)
3431 res += base_low - addon_low;
3432 else if (base_low < addon_low) {
3433 res += interval + base_low - addon_low;
3434 res += (1 << 24);
3435 } else
3436 res += (1 << 24);
3437
3438 return cpu_to_le32(res);
3439 }
3440
3441 static int iwl4965_get_measurement(struct iwl4965_priv *priv,
3442 struct ieee80211_measurement_params *params,
3443 u8 type)
3444 {
3445 struct iwl4965_spectrum_cmd spectrum;
3446 struct iwl4965_rx_packet *res;
3447 struct iwl4965_host_cmd cmd = {
3448 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3449 .data = (void *)&spectrum,
3450 .meta.flags = CMD_WANT_SKB,
3451 };
3452 u32 add_time = le64_to_cpu(params->start_time);
3453 int rc;
3454 int spectrum_resp_status;
3455 int duration = le16_to_cpu(params->duration);
3456
3457 if (iwl4965_is_associated(priv))
3458 add_time =
3459 iwl4965_usecs_to_beacons(
3460 le64_to_cpu(params->start_time) - priv->last_tsf,
3461 le16_to_cpu(priv->rxon_timing.beacon_interval));
3462
3463 memset(&spectrum, 0, sizeof(spectrum));
3464
3465 spectrum.channel_count = cpu_to_le16(1);
3466 spectrum.flags =
3467 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3468 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3469 cmd.len = sizeof(spectrum);
3470 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3471
3472 if (iwl4965_is_associated(priv))
3473 spectrum.start_time =
3474 iwl4965_add_beacon_time(priv->last_beacon_time,
3475 add_time,
3476 le16_to_cpu(priv->rxon_timing.beacon_interval));
3477 else
3478 spectrum.start_time = 0;
3479
3480 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3481 spectrum.channels[0].channel = params->channel;
3482 spectrum.channels[0].type = type;
3483 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3484 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3485 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3486
3487 rc = iwl4965_send_cmd_sync(priv, &cmd);
3488 if (rc)
3489 return rc;
3490
3491 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
3492 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3493 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3494 rc = -EIO;
3495 }
3496
3497 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3498 switch (spectrum_resp_status) {
3499 case 0: /* Command will be handled */
3500 if (res->u.spectrum.id != 0xff) {
3501 IWL_DEBUG_INFO
3502 ("Replaced existing measurement: %d\n",
3503 res->u.spectrum.id);
3504 priv->measurement_status &= ~MEASUREMENT_READY;
3505 }
3506 priv->measurement_status |= MEASUREMENT_ACTIVE;
3507 rc = 0;
3508 break;
3509
3510 case 1: /* Command will not be handled */
3511 rc = -EAGAIN;
3512 break;
3513 }
3514
3515 dev_kfree_skb_any(cmd.meta.u.skb);
3516
3517 return rc;
3518 }
3519 #endif
3520
3521 static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3522 struct iwl4965_tx_info *tx_sta)
3523 {
3524
3525 tx_sta->status.ack_signal = 0;
3526 tx_sta->status.excessive_retries = 0;
3527 tx_sta->status.queue_length = 0;
3528 tx_sta->status.queue_number = 0;
3529
3530 if (in_interrupt())
3531 ieee80211_tx_status_irqsafe(priv->hw,
3532 tx_sta->skb[0], &(tx_sta->status));
3533 else
3534 ieee80211_tx_status(priv->hw,
3535 tx_sta->skb[0], &(tx_sta->status));
3536
3537 tx_sta->skb[0] = NULL;
3538 }
3539
3540 /**
3541 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3542 *
3543 * When FW advances 'R' index, all entries between old and new 'R' index
3544 * need to be reclaimed. As result, some free space forms. If there is
3545 * enough free space (> low mark), wake the stack that feeds us.
3546 */
3547 int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
3548 {
3549 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3550 struct iwl4965_queue *q = &txq->q;
3551 int nfreed = 0;
3552
3553 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3554 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3555 "is out of range [0-%d] %d %d.\n", txq_id,
3556 index, q->n_bd, q->write_ptr, q->read_ptr);
3557 return 0;
3558 }
3559
3560 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
3561 q->read_ptr != index;
3562 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3563 if (txq_id != IWL_CMD_QUEUE_NUM) {
3564 iwl4965_txstatus_to_ieee(priv,
3565 &(txq->txb[txq->q.read_ptr]));
3566 iwl4965_hw_txq_free_tfd(priv, txq);
3567 } else if (nfreed > 1) {
3568 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3569 q->write_ptr, q->read_ptr);
3570 queue_work(priv->workqueue, &priv->restart);
3571 }
3572 nfreed++;
3573 }
3574
3575 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3576 (txq_id != IWL_CMD_QUEUE_NUM) &&
3577 priv->mac80211_registered)
3578 ieee80211_wake_queue(priv->hw, txq_id);
3579
3580
3581 return nfreed;
3582 }
3583
3584 static int iwl4965_is_tx_success(u32 status)
3585 {
3586 status &= TX_STATUS_MSK;
3587 return (status == TX_STATUS_SUCCESS)
3588 || (status == TX_STATUS_DIRECT_DONE);
3589 }
3590
3591 /******************************************************************************
3592 *
3593 * Generic RX handler implementations
3594 *
3595 ******************************************************************************/
3596 #ifdef CONFIG_IWL4965_HT
3597 #ifdef CONFIG_IWL4965_HT_AGG
3598
3599 static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
3600 struct ieee80211_hdr *hdr)
3601 {
3602 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3603 return IWL_AP_ID;
3604 else {
3605 u8 *da = ieee80211_get_DA(hdr);
3606 return iwl4965_hw_find_station(priv, da);
3607 }
3608 }
3609
3610 static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3611 struct iwl4965_priv *priv, int txq_id, int idx)
3612 {
3613 if (priv->txq[txq_id].txb[idx].skb[0])
3614 return (struct ieee80211_hdr *)priv->txq[txq_id].
3615 txb[idx].skb[0]->data;
3616 return NULL;
3617 }
3618
3619 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3620 {
3621 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3622 tx_resp->frame_count);
3623 return le32_to_cpu(*scd_ssn) & MAX_SN;
3624
3625 }
3626
3627 /**
3628 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3629 */
3630 static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3631 struct iwl4965_ht_agg *agg,
3632 struct iwl4965_tx_resp *tx_resp,
3633 u16 start_idx)
3634 {
3635 u32 status;
3636 __le32 *frame_status = &tx_resp->status;
3637 struct ieee80211_tx_status *tx_status = NULL;
3638 struct ieee80211_hdr *hdr = NULL;
3639 int i, sh;
3640 int txq_id, idx;
3641 u16 seq;
3642
3643 if (agg->wait_for_ba)
3644 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3645
3646 agg->frame_count = tx_resp->frame_count;
3647 agg->start_idx = start_idx;
3648 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3649 agg->bitmap0 = agg->bitmap1 = 0;
3650
3651 /* # frames attempted by Tx command */
3652 if (agg->frame_count == 1) {
3653 /* Only one frame was attempted; no block-ack will arrive */
3654 struct iwl4965_tx_queue *txq ;
3655 status = le32_to_cpu(frame_status[0]);
3656
3657 txq_id = agg->txq_id;
3658 txq = &priv->txq[txq_id];
3659 /* FIXME: code repetition */
3660 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3661 agg->frame_count, agg->start_idx);
3662
3663 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
3664 tx_status->retry_count = tx_resp->failure_frame;
3665 tx_status->queue_number = status & 0xff;
3666 tx_status->queue_length = tx_resp->bt_kill_count;
3667 tx_status->queue_length |= tx_resp->failure_rts;
3668
3669 tx_status->flags = iwl4965_is_tx_success(status)?
3670 IEEE80211_TX_STATUS_ACK : 0;
3671 tx_status->control.tx_rate =
3672 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3673 /* FIXME: code repetition end */
3674
3675 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3676 status & 0xff, tx_resp->failure_frame);
3677 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3678 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3679
3680 agg->wait_for_ba = 0;
3681 } else {
3682 /* Two or more frames were attempted; expect block-ack */
3683 u64 bitmap = 0;
3684 int start = agg->start_idx;
3685
3686 /* Construct bit-map of pending frames within Tx window */
3687 for (i = 0; i < agg->frame_count; i++) {
3688 u16 sc;
3689 status = le32_to_cpu(frame_status[i]);
3690 seq = status >> 16;
3691 idx = SEQ_TO_INDEX(seq);
3692 txq_id = SEQ_TO_QUEUE(seq);
3693
3694 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3695 AGG_TX_STATE_ABORT_MSK))
3696 continue;
3697
3698 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3699 agg->frame_count, txq_id, idx);
3700
3701 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
3702
3703 sc = le16_to_cpu(hdr->seq_ctrl);
3704 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3705 IWL_ERROR("BUG_ON idx doesn't match seq control"
3706 " idx=%d, seq_idx=%d, seq=%d\n",
3707 idx, SEQ_TO_SN(sc),
3708 hdr->seq_ctrl);
3709 return -1;
3710 }
3711
3712 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3713 i, idx, SEQ_TO_SN(sc));
3714
3715 sh = idx - start;
3716 if (sh > 64) {
3717 sh = (start - idx) + 0xff;
3718 bitmap = bitmap << sh;
3719 sh = 0;
3720 start = idx;
3721 } else if (sh < -64)
3722 sh = 0xff - (start - idx);
3723 else if (sh < 0) {
3724 sh = start - idx;
3725 start = idx;
3726 bitmap = bitmap << sh;
3727 sh = 0;
3728 }
3729 bitmap |= (1 << sh);
3730 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3731 start, (u32)(bitmap & 0xFFFFFFFF));
3732 }
3733
3734 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3735 agg->bitmap1 = bitmap >> 32;
3736 agg->start_idx = start;
3737 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3738 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3739 agg->frame_count, agg->start_idx,
3740 agg->bitmap0);
3741
3742 if (bitmap)
3743 agg->wait_for_ba = 1;
3744 }
3745 return 0;
3746 }
3747 #endif
3748 #endif
3749
3750 /**
3751 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3752 */
3753 static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3754 struct iwl4965_rx_mem_buffer *rxb)
3755 {
3756 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3757 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3758 int txq_id = SEQ_TO_QUEUE(sequence);
3759 int index = SEQ_TO_INDEX(sequence);
3760 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3761 struct ieee80211_tx_status *tx_status;
3762 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3763 u32 status = le32_to_cpu(tx_resp->status);
3764 #ifdef CONFIG_IWL4965_HT
3765 #ifdef CONFIG_IWL4965_HT_AGG
3766 int tid, sta_id;
3767 #endif
3768 #endif
3769
3770 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3771 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3772 "is out of range [0-%d] %d %d\n", txq_id,
3773 index, txq->q.n_bd, txq->q.write_ptr,
3774 txq->q.read_ptr);
3775 return;
3776 }
3777
3778 #ifdef CONFIG_IWL4965_HT
3779 #ifdef CONFIG_IWL4965_HT_AGG
3780 if (txq->sched_retry) {
3781 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3782 struct ieee80211_hdr *hdr =
3783 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3784 struct iwl4965_ht_agg *agg = NULL;
3785 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3786
3787 if (qc == NULL) {
3788 IWL_ERROR("BUG_ON qc is null!!!!\n");
3789 return;
3790 }
3791
3792 tid = le16_to_cpu(*qc) & 0xf;
3793
3794 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3795 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3796 IWL_ERROR("Station not known for\n");
3797 return;
3798 }
3799
3800 agg = &priv->stations[sta_id].tid[tid].agg;
3801
3802 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3803
3804 if ((tx_resp->frame_count == 1) &&
3805 !iwl4965_is_tx_success(status)) {
3806 /* TODO: send BAR */
3807 }
3808
3809 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
3810 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3811 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3812 "%d index %d\n", scd_ssn , index);
3813 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3814 }
3815 } else {
3816 #endif /* CONFIG_IWL4965_HT_AGG */
3817 #endif /* CONFIG_IWL4965_HT */
3818 tx_status = &(txq->txb[txq->q.read_ptr].status);
3819
3820 tx_status->retry_count = tx_resp->failure_frame;
3821 tx_status->queue_number = status;
3822 tx_status->queue_length = tx_resp->bt_kill_count;
3823 tx_status->queue_length |= tx_resp->failure_rts;
3824
3825 tx_status->flags =
3826 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3827
3828 tx_status->control.tx_rate =
3829 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3830
3831 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
3832 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
3833 status, le32_to_cpu(tx_resp->rate_n_flags),
3834 tx_resp->failure_frame);
3835
3836 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3837 if (index != -1)
3838 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3839 #ifdef CONFIG_IWL4965_HT
3840 #ifdef CONFIG_IWL4965_HT_AGG
3841 }
3842 #endif /* CONFIG_IWL4965_HT_AGG */
3843 #endif /* CONFIG_IWL4965_HT */
3844
3845 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3846 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3847 }
3848
3849
3850 static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3851 struct iwl4965_rx_mem_buffer *rxb)
3852 {
3853 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3854 struct iwl4965_alive_resp *palive;
3855 struct delayed_work *pwork;
3856
3857 palive = &pkt->u.alive_frame;
3858
3859 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3860 "0x%01X 0x%01X\n",
3861 palive->is_valid, palive->ver_type,
3862 palive->ver_subtype);
3863
3864 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3865 IWL_DEBUG_INFO("Initialization Alive received.\n");
3866 memcpy(&priv->card_alive_init,
3867 &pkt->u.alive_frame,
3868 sizeof(struct iwl4965_init_alive_resp));
3869 pwork = &priv->init_alive_start;
3870 } else {
3871 IWL_DEBUG_INFO("Runtime Alive received.\n");
3872 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3873 sizeof(struct iwl4965_alive_resp));
3874 pwork = &priv->alive_start;
3875 }
3876
3877 /* We delay the ALIVE response by 5ms to
3878 * give the HW RF Kill time to activate... */
3879 if (palive->is_valid == UCODE_VALID_OK)
3880 queue_delayed_work(priv->workqueue, pwork,
3881 msecs_to_jiffies(5));
3882 else
3883 IWL_WARNING("uCode did not respond OK.\n");
3884 }
3885
3886 static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3887 struct iwl4965_rx_mem_buffer *rxb)
3888 {
3889 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3890
3891 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3892 return;
3893 }
3894
3895 static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3896 struct iwl4965_rx_mem_buffer *rxb)
3897 {
3898 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3899
3900 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3901 "seq 0x%04X ser 0x%08X\n",
3902 le32_to_cpu(pkt->u.err_resp.error_type),
3903 get_cmd_string(pkt->u.err_resp.cmd_id),
3904 pkt->u.err_resp.cmd_id,
3905 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3906 le32_to_cpu(pkt->u.err_resp.error_info));
3907 }
3908
3909 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3910
3911 static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3912 {
3913 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3914 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3915 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
3916 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3917 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3918 rxon->channel = csa->channel;
3919 priv->staging_rxon.channel = csa->channel;
3920 }
3921
3922 static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3923 struct iwl4965_rx_mem_buffer *rxb)
3924 {
3925 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3926 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3927 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
3928
3929 if (!report->state) {
3930 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3931 "Spectrum Measure Notification: Start\n");
3932 return;
3933 }
3934
3935 memcpy(&priv->measure_report, report, sizeof(*report));
3936 priv->measurement_status |= MEASUREMENT_READY;
3937 #endif
3938 }
3939
3940 static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3941 struct iwl4965_rx_mem_buffer *rxb)
3942 {
3943 #ifdef CONFIG_IWL4965_DEBUG
3944 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3945 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
3946 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3947 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3948 #endif
3949 }
3950
3951 static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3952 struct iwl4965_rx_mem_buffer *rxb)
3953 {
3954 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3955 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3956 "notification for %s:\n",
3957 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3958 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3959 }
3960
3961 static void iwl4965_bg_beacon_update(struct work_struct *work)
3962 {
3963 struct iwl4965_priv *priv =
3964 container_of(work, struct iwl4965_priv, beacon_update);
3965 struct sk_buff *beacon;
3966
3967 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3968 beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3969
3970 if (!beacon) {
3971 IWL_ERROR("update beacon failed\n");
3972 return;
3973 }
3974
3975 mutex_lock(&priv->mutex);
3976 /* new beacon skb is allocated every time; dispose previous.*/
3977 if (priv->ibss_beacon)
3978 dev_kfree_skb(priv->ibss_beacon);
3979
3980 priv->ibss_beacon = beacon;
3981 mutex_unlock(&priv->mutex);
3982
3983 iwl4965_send_beacon_cmd(priv);
3984 }
3985
3986 static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3987 struct iwl4965_rx_mem_buffer *rxb)
3988 {
3989 #ifdef CONFIG_IWL4965_DEBUG
3990 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3991 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3992 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3993
3994 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3995 "tsf %d %d rate %d\n",
3996 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3997 beacon->beacon_notify_hdr.failure_frame,
3998 le32_to_cpu(beacon->ibss_mgr_status),
3999 le32_to_cpu(beacon->high_tsf),
4000 le32_to_cpu(beacon->low_tsf), rate);
4001 #endif
4002
4003 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
4004 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
4005 queue_work(priv->workqueue, &priv->beacon_update);
4006 }
4007
4008 /* Service response to REPLY_SCAN_CMD (0x80) */
4009 static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
4010 struct iwl4965_rx_mem_buffer *rxb)
4011 {
4012 #ifdef CONFIG_IWL4965_DEBUG
4013 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4014 struct iwl4965_scanreq_notification *notif =
4015 (struct iwl4965_scanreq_notification *)pkt->u.raw;
4016
4017 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
4018 #endif
4019 }
4020
4021 /* Service SCAN_START_NOTIFICATION (0x82) */
4022 static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
4023 struct iwl4965_rx_mem_buffer *rxb)
4024 {
4025 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4026 struct iwl4965_scanstart_notification *notif =
4027 (struct iwl4965_scanstart_notification *)pkt->u.raw;
4028 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
4029 IWL_DEBUG_SCAN("Scan start: "
4030 "%d [802.11%s] "
4031 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
4032 notif->channel,
4033 notif->band ? "bg" : "a",
4034 notif->tsf_high,
4035 notif->tsf_low, notif->status, notif->beacon_timer);
4036 }
4037
4038 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
4039 static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
4040 struct iwl4965_rx_mem_buffer *rxb)
4041 {
4042 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4043 struct iwl4965_scanresults_notification *notif =
4044 (struct iwl4965_scanresults_notification *)pkt->u.raw;
4045
4046 IWL_DEBUG_SCAN("Scan ch.res: "
4047 "%d [802.11%s] "
4048 "(TSF: 0x%08X:%08X) - %d "
4049 "elapsed=%lu usec (%dms since last)\n",
4050 notif->channel,
4051 notif->band ? "bg" : "a",
4052 le32_to_cpu(notif->tsf_high),
4053 le32_to_cpu(notif->tsf_low),
4054 le32_to_cpu(notif->statistics[0]),
4055 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
4056 jiffies_to_msecs(elapsed_jiffies
4057 (priv->last_scan_jiffies, jiffies)));
4058
4059 priv->last_scan_jiffies = jiffies;
4060 priv->next_scan_jiffies = 0;
4061 }
4062
4063 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4064 static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4065 struct iwl4965_rx_mem_buffer *rxb)
4066 {
4067 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4068 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
4069
4070 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4071 scan_notif->scanned_channels,
4072 scan_notif->tsf_low,
4073 scan_notif->tsf_high, scan_notif->status);
4074
4075 /* The HW is no longer scanning */
4076 clear_bit(STATUS_SCAN_HW, &priv->status);
4077
4078 /* The scan completion notification came in, so kill that timer... */
4079 cancel_delayed_work(&priv->scan_check);
4080
4081 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4082 (priv->scan_bands == 2) ? "2.4" : "5.2",
4083 jiffies_to_msecs(elapsed_jiffies
4084 (priv->scan_pass_start, jiffies)));
4085
4086 /* Remove this scanned band from the list
4087 * of pending bands to scan */
4088 priv->scan_bands--;
4089
4090 /* If a request to abort was given, or the scan did not succeed
4091 * then we reset the scan state machine and terminate,
4092 * re-queuing another scan if one has been requested */
4093 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4094 IWL_DEBUG_INFO("Aborted scan completed.\n");
4095 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4096 } else {
4097 /* If there are more bands on this scan pass reschedule */
4098 if (priv->scan_bands > 0)
4099 goto reschedule;
4100 }
4101
4102 priv->last_scan_jiffies = jiffies;
4103 priv->next_scan_jiffies = 0;
4104 IWL_DEBUG_INFO("Setting scan to off\n");
4105
4106 clear_bit(STATUS_SCANNING, &priv->status);
4107
4108 IWL_DEBUG_INFO("Scan took %dms\n",
4109 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4110
4111 queue_work(priv->workqueue, &priv->scan_completed);
4112
4113 return;
4114
4115 reschedule:
4116 priv->scan_pass_start = jiffies;
4117 queue_work(priv->workqueue, &priv->request_scan);
4118 }
4119
4120 /* Handle notification from uCode that card's power state is changing
4121 * due to software, hardware, or critical temperature RFKILL */
4122 static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4123 struct iwl4965_rx_mem_buffer *rxb)
4124 {
4125 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4126 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4127 unsigned long status = priv->status;
4128
4129 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4130 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4131 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4132
4133 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4134 RF_CARD_DISABLED)) {
4135
4136 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4137 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4138
4139 if (!iwl4965_grab_nic_access(priv)) {
4140 iwl4965_write_direct32(
4141 priv, HBUS_TARG_MBX_C,
4142 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4143
4144 iwl4965_release_nic_access(priv);
4145 }
4146
4147 if (!(flags & RXON_CARD_DISABLED)) {
4148 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
4149 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4150 if (!iwl4965_grab_nic_access(priv)) {
4151 iwl4965_write_direct32(
4152 priv, HBUS_TARG_MBX_C,
4153 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4154
4155 iwl4965_release_nic_access(priv);
4156 }
4157 }
4158
4159 if (flags & RF_CARD_DISABLED) {
4160 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4161 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4162 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4163 if (!iwl4965_grab_nic_access(priv))
4164 iwl4965_release_nic_access(priv);
4165 }
4166 }
4167
4168 if (flags & HW_CARD_DISABLED)
4169 set_bit(STATUS_RF_KILL_HW, &priv->status);
4170 else
4171 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4172
4173
4174 if (flags & SW_CARD_DISABLED)
4175 set_bit(STATUS_RF_KILL_SW, &priv->status);
4176 else
4177 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4178
4179 if (!(flags & RXON_CARD_DISABLED))
4180 iwl4965_scan_cancel(priv);
4181
4182 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4183 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4184 (test_bit(STATUS_RF_KILL_SW, &status) !=
4185 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4186 queue_work(priv->workqueue, &priv->rf_kill);
4187 else
4188 wake_up_interruptible(&priv->wait_command_queue);
4189 }
4190
4191 /**
4192 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
4193 *
4194 * Setup the RX handlers for each of the reply types sent from the uCode
4195 * to the host.
4196 *
4197 * This function chains into the hardware specific files for them to setup
4198 * any hardware specific handlers as well.
4199 */
4200 static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
4201 {
4202 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4203 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4204 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4205 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
4206 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
4207 iwl4965_rx_spectrum_measure_notif;
4208 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
4209 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
4210 iwl4965_rx_pm_debug_statistics_notif;
4211 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
4212
4213 /*
4214 * The same handler is used for both the REPLY to a discrete
4215 * statistics request from the host as well as for the periodic
4216 * statistics notifications (after received beacons) from the uCode.
4217 */
4218 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4219 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
4220
4221 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4222 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
4223 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
4224 iwl4965_rx_scan_results_notif;
4225 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
4226 iwl4965_rx_scan_complete_notif;
4227 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4228 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
4229
4230 /* Set up hardware specific Rx handlers */
4231 iwl4965_hw_rx_handler_setup(priv);
4232 }
4233
4234 /**
4235 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
4236 * @rxb: Rx buffer to reclaim
4237 *
4238 * If an Rx buffer has an async callback associated with it the callback
4239 * will be executed. The attached skb (if present) will only be freed
4240 * if the callback returns 1
4241 */
4242 static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4243 struct iwl4965_rx_mem_buffer *rxb)
4244 {
4245 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4246 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4247 int txq_id = SEQ_TO_QUEUE(sequence);
4248 int index = SEQ_TO_INDEX(sequence);
4249 int huge = sequence & SEQ_HUGE_FRAME;
4250 int cmd_index;
4251 struct iwl4965_cmd *cmd;
4252
4253 /* If a Tx command is being handled and it isn't in the actual
4254 * command queue then there a command routing bug has been introduced
4255 * in the queue management code. */
4256 if (txq_id != IWL_CMD_QUEUE_NUM)
4257 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4258 txq_id, pkt->hdr.cmd);
4259 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4260
4261 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4262 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4263
4264 /* Input error checking is done when commands are added to queue. */
4265 if (cmd->meta.flags & CMD_WANT_SKB) {
4266 cmd->meta.source->u.skb = rxb->skb;
4267 rxb->skb = NULL;
4268 } else if (cmd->meta.u.callback &&
4269 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4270 rxb->skb = NULL;
4271
4272 iwl4965_tx_queue_reclaim(priv, txq_id, index);
4273
4274 if (!(cmd->meta.flags & CMD_ASYNC)) {
4275 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4276 wake_up_interruptible(&priv->wait_command_queue);
4277 }
4278 }
4279
4280 /************************** RX-FUNCTIONS ****************************/
4281 /*
4282 * Rx theory of operation
4283 *
4284 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4285 * each of which point to Receive Buffers to be filled by 4965. These get
4286 * used not only for Rx frames, but for any command response or notification
4287 * from the 4965. The driver and 4965 manage the Rx buffers by means
4288 * of indexes into the circular buffer.
4289 *
4290 * Rx Queue Indexes
4291 * The host/firmware share two index registers for managing the Rx buffers.
4292 *
4293 * The READ index maps to the first position that the firmware may be writing
4294 * to -- the driver can read up to (but not including) this position and get
4295 * good data.
4296 * The READ index is managed by the firmware once the card is enabled.
4297 *
4298 * The WRITE index maps to the last position the driver has read from -- the
4299 * position preceding WRITE is the last slot the firmware can place a packet.
4300 *
4301 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4302 * WRITE = READ.
4303 *
4304 * During initialization, the host sets up the READ queue position to the first
4305 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4306 *
4307 * When the firmware places a packet in a buffer, it will advance the READ index
4308 * and fire the RX interrupt. The driver can then query the READ index and
4309 * process as many packets as possible, moving the WRITE index forward as it
4310 * resets the Rx queue buffers with new memory.
4311 *
4312 * The management in the driver is as follows:
4313 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4314 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
4315 * to replenish the iwl->rxq->rx_free.
4316 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
4317 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4318 * 'processed' and 'read' driver indexes as well)
4319 * + A received packet is processed and handed to the kernel network stack,
4320 * detached from the iwl->rxq. The driver 'processed' index is updated.
4321 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4322 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4323 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4324 * were enough free buffers and RX_STALLED is set it is cleared.
4325 *
4326 *
4327 * Driver sequence:
4328 *
4329 * iwl4965_rx_queue_alloc() Allocates rx_free
4330 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
4331 * iwl4965_rx_queue_restock
4332 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
4333 * queue, updates firmware pointers, and updates
4334 * the WRITE index. If insufficient rx_free buffers
4335 * are available, schedules iwl4965_rx_replenish
4336 *
4337 * -- enable interrupts --
4338 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
4339 * READ INDEX, detaching the SKB from the pool.
4340 * Moves the packet buffer from queue to rx_used.
4341 * Calls iwl4965_rx_queue_restock to refill any empty
4342 * slots.
4343 * ...
4344 *
4345 */
4346
4347 /**
4348 * iwl4965_rx_queue_space - Return number of free slots available in queue.
4349 */
4350 static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
4351 {
4352 int s = q->read - q->write;
4353 if (s <= 0)
4354 s += RX_QUEUE_SIZE;
4355 /* keep some buffer to not confuse full and empty queue */
4356 s -= 2;
4357 if (s < 0)
4358 s = 0;
4359 return s;
4360 }
4361
4362 /**
4363 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4364 */
4365 int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
4366 {
4367 u32 reg = 0;
4368 int rc = 0;
4369 unsigned long flags;
4370
4371 spin_lock_irqsave(&q->lock, flags);
4372
4373 if (q->need_update == 0)
4374 goto exit_unlock;
4375
4376 /* If power-saving is in use, make sure device is awake */
4377 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4378 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4379
4380 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4381 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4382 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4383 goto exit_unlock;
4384 }
4385
4386 rc = iwl4965_grab_nic_access(priv);
4387 if (rc)
4388 goto exit_unlock;
4389
4390 /* Device expects a multiple of 8 */
4391 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4392 q->write & ~0x7);
4393 iwl4965_release_nic_access(priv);
4394
4395 /* Else device is assumed to be awake */
4396 } else
4397 /* Device expects a multiple of 8 */
4398 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4399
4400
4401 q->need_update = 0;
4402
4403 exit_unlock:
4404 spin_unlock_irqrestore(&q->lock, flags);
4405 return rc;
4406 }
4407
4408 /**
4409 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4410 */
4411 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
4412 dma_addr_t dma_addr)
4413 {
4414 return cpu_to_le32((u32)(dma_addr >> 8));
4415 }
4416
4417
4418 /**
4419 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
4420 *
4421 * If there are slots in the RX queue that need to be restocked,
4422 * and we have free pre-allocated buffers, fill the ranks as much
4423 * as we can, pulling from rx_free.
4424 *
4425 * This moves the 'write' index forward to catch up with 'processed', and
4426 * also updates the memory address in the firmware to reference the new
4427 * target buffer.
4428 */
4429 static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
4430 {
4431 struct iwl4965_rx_queue *rxq = &priv->rxq;
4432 struct list_head *element;
4433 struct iwl4965_rx_mem_buffer *rxb;
4434 unsigned long flags;
4435 int write, rc;
4436
4437 spin_lock_irqsave(&rxq->lock, flags);
4438 write = rxq->write & ~0x7;
4439 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4440 /* Get next free Rx buffer, remove from free list */
4441 element = rxq->rx_free.next;
4442 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4443 list_del(element);
4444
4445 /* Point to Rx buffer via next RBD in circular buffer */
4446 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4447 rxq->queue[rxq->write] = rxb;
4448 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4449 rxq->free_count--;
4450 }
4451 spin_unlock_irqrestore(&rxq->lock, flags);
4452 /* If the pre-allocated buffer pool is dropping low, schedule to
4453 * refill it */
4454 if (rxq->free_count <= RX_LOW_WATERMARK)
4455 queue_work(priv->workqueue, &priv->rx_replenish);
4456
4457
4458 /* If we've added more space for the firmware to place data, tell it.
4459 * Increment device's write pointer in multiples of 8. */
4460 if ((write != (rxq->write & ~0x7))
4461 || (abs(rxq->write - rxq->read) > 7)) {
4462 spin_lock_irqsave(&rxq->lock, flags);
4463 rxq->need_update = 1;
4464 spin_unlock_irqrestore(&rxq->lock, flags);
4465 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
4466 if (rc)
4467 return rc;
4468 }
4469
4470 return 0;
4471 }
4472
4473 /**
4474 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
4475 *
4476 * When moving to rx_free an SKB is allocated for the slot.
4477 *
4478 * Also restock the Rx queue via iwl4965_rx_queue_restock.
4479 * This is called as a scheduled work item (except for during initialization)
4480 */
4481 static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
4482 {
4483 struct iwl4965_rx_queue *rxq = &priv->rxq;
4484 struct list_head *element;
4485 struct iwl4965_rx_mem_buffer *rxb;
4486 unsigned long flags;
4487 spin_lock_irqsave(&rxq->lock, flags);
4488 while (!list_empty(&rxq->rx_used)) {
4489 element = rxq->rx_used.next;
4490 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4491
4492 /* Alloc a new receive buffer */
4493 rxb->skb =
4494 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4495 if (!rxb->skb) {
4496 if (net_ratelimit())
4497 printk(KERN_CRIT DRV_NAME
4498 ": Can not allocate SKB buffers\n");
4499 /* We don't reschedule replenish work here -- we will
4500 * call the restock method and if it still needs
4501 * more buffers it will schedule replenish */
4502 break;
4503 }
4504 priv->alloc_rxb_skb++;
4505 list_del(element);
4506
4507 /* Get physical address of RB/SKB */
4508 rxb->dma_addr =
4509 pci_map_single(priv->pci_dev, rxb->skb->data,
4510 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4511 list_add_tail(&rxb->list, &rxq->rx_free);
4512 rxq->free_count++;
4513 }
4514 spin_unlock_irqrestore(&rxq->lock, flags);
4515 }
4516
4517 /*
4518 * this should be called while priv->lock is locked
4519 */
4520 void __iwl4965_rx_replenish(void *data)
4521 {
4522 struct iwl4965_priv *priv = data;
4523
4524 iwl4965_rx_allocate(priv);
4525 iwl4965_rx_queue_restock(priv);
4526 }
4527
4528
4529 void iwl4965_rx_replenish(void *data)
4530 {
4531 struct iwl4965_priv *priv = data;
4532 unsigned long flags;
4533
4534 iwl4965_rx_allocate(priv);
4535
4536 spin_lock_irqsave(&priv->lock, flags);
4537 iwl4965_rx_queue_restock(priv);
4538 spin_unlock_irqrestore(&priv->lock, flags);
4539 }
4540
4541 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4542 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4543 * This free routine walks the list of POOL entries and if SKB is set to
4544 * non NULL it is unmapped and freed
4545 */
4546 static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4547 {
4548 int i;
4549 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4550 if (rxq->pool[i].skb != NULL) {
4551 pci_unmap_single(priv->pci_dev,
4552 rxq->pool[i].dma_addr,
4553 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4554 dev_kfree_skb(rxq->pool[i].skb);
4555 }
4556 }
4557
4558 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4559 rxq->dma_addr);
4560 rxq->bd = NULL;
4561 }
4562
4563 int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
4564 {
4565 struct iwl4965_rx_queue *rxq = &priv->rxq;
4566 struct pci_dev *dev = priv->pci_dev;
4567 int i;
4568
4569 spin_lock_init(&rxq->lock);
4570 INIT_LIST_HEAD(&rxq->rx_free);
4571 INIT_LIST_HEAD(&rxq->rx_used);
4572
4573 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4574 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4575 if (!rxq->bd)
4576 return -ENOMEM;
4577
4578 /* Fill the rx_used queue with _all_ of the Rx buffers */
4579 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4580 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4581
4582 /* Set us so that we have processed and used all buffers, but have
4583 * not restocked the Rx queue with fresh buffers */
4584 rxq->read = rxq->write = 0;
4585 rxq->free_count = 0;
4586 rxq->need_update = 0;
4587 return 0;
4588 }
4589
4590 void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4591 {
4592 unsigned long flags;
4593 int i;
4594 spin_lock_irqsave(&rxq->lock, flags);
4595 INIT_LIST_HEAD(&rxq->rx_free);
4596 INIT_LIST_HEAD(&rxq->rx_used);
4597 /* Fill the rx_used queue with _all_ of the Rx buffers */
4598 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4599 /* In the reset function, these buffers may have been allocated
4600 * to an SKB, so we need to unmap and free potential storage */
4601 if (rxq->pool[i].skb != NULL) {
4602 pci_unmap_single(priv->pci_dev,
4603 rxq->pool[i].dma_addr,
4604 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4605 priv->alloc_rxb_skb--;
4606 dev_kfree_skb(rxq->pool[i].skb);
4607 rxq->pool[i].skb = NULL;
4608 }
4609 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4610 }
4611
4612 /* Set us so that we have processed and used all buffers, but have
4613 * not restocked the Rx queue with fresh buffers */
4614 rxq->read = rxq->write = 0;
4615 rxq->free_count = 0;
4616 spin_unlock_irqrestore(&rxq->lock, flags);
4617 }
4618
4619 /* Convert linear signal-to-noise ratio into dB */
4620 static u8 ratio2dB[100] = {
4621 /* 0 1 2 3 4 5 6 7 8 9 */
4622 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4623 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4624 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4625 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4626 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4627 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4628 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4629 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4630 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4631 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4632 };
4633
4634 /* Calculates a relative dB value from a ratio of linear
4635 * (i.e. not dB) signal levels.
4636 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4637 int iwl4965_calc_db_from_ratio(int sig_ratio)
4638 {
4639 /* 1000:1 or higher just report as 60 dB */
4640 if (sig_ratio >= 1000)
4641 return 60;
4642
4643 /* 100:1 or higher, divide by 10 and use table,
4644 * add 20 dB to make up for divide by 10 */
4645 if (sig_ratio >= 100)
4646 return (20 + (int)ratio2dB[sig_ratio/10]);
4647
4648 /* We shouldn't see this */
4649 if (sig_ratio < 1)
4650 return 0;
4651
4652 /* Use table for ratios 1:1 - 99:1 */
4653 return (int)ratio2dB[sig_ratio];
4654 }
4655
4656 #define PERFECT_RSSI (-20) /* dBm */
4657 #define WORST_RSSI (-95) /* dBm */
4658 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4659
4660 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4661 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4662 * about formulas used below. */
4663 int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
4664 {
4665 int sig_qual;
4666 int degradation = PERFECT_RSSI - rssi_dbm;
4667
4668 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4669 * as indicator; formula is (signal dbm - noise dbm).
4670 * SNR at or above 40 is a great signal (100%).
4671 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4672 * Weakest usable signal is usually 10 - 15 dB SNR. */
4673 if (noise_dbm) {
4674 if (rssi_dbm - noise_dbm >= 40)
4675 return 100;
4676 else if (rssi_dbm < noise_dbm)
4677 return 0;
4678 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4679
4680 /* Else use just the signal level.
4681 * This formula is a least squares fit of data points collected and
4682 * compared with a reference system that had a percentage (%) display
4683 * for signal quality. */
4684 } else
4685 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4686 (15 * RSSI_RANGE + 62 * degradation)) /
4687 (RSSI_RANGE * RSSI_RANGE);
4688
4689 if (sig_qual > 100)
4690 sig_qual = 100;
4691 else if (sig_qual < 1)
4692 sig_qual = 0;
4693
4694 return sig_qual;
4695 }
4696
4697 /**
4698 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
4699 *
4700 * Uses the priv->rx_handlers callback function array to invoke
4701 * the appropriate handlers, including command responses,
4702 * frame-received notifications, and other notifications.
4703 */
4704 static void iwl4965_rx_handle(struct iwl4965_priv *priv)
4705 {
4706 struct iwl4965_rx_mem_buffer *rxb;
4707 struct iwl4965_rx_packet *pkt;
4708 struct iwl4965_rx_queue *rxq = &priv->rxq;
4709 u32 r, i;
4710 int reclaim;
4711 unsigned long flags;
4712 u8 fill_rx = 0;
4713 u32 count = 0;
4714
4715 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4716 * buffer that the driver may process (last buffer filled by ucode). */
4717 r = iwl4965_hw_get_rx_read(priv);
4718 i = rxq->read;
4719
4720 /* Rx interrupt, but nothing sent from uCode */
4721 if (i == r)
4722 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4723
4724 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4725 fill_rx = 1;
4726
4727 while (i != r) {
4728 rxb = rxq->queue[i];
4729
4730 /* If an RXB doesn't have a Rx queue slot associated with it,
4731 * then a bug has been introduced in the queue refilling
4732 * routines -- catch it here */
4733 BUG_ON(rxb == NULL);
4734
4735 rxq->queue[i] = NULL;
4736
4737 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4738 IWL_RX_BUF_SIZE,
4739 PCI_DMA_FROMDEVICE);
4740 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4741
4742 /* Reclaim a command buffer only if this packet is a response
4743 * to a (driver-originated) command.
4744 * If the packet (e.g. Rx frame) originated from uCode,
4745 * there is no command buffer to reclaim.
4746 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4747 * but apparently a few don't get set; catch them here. */
4748 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4749 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4750 (pkt->hdr.cmd != REPLY_4965_RX) &&
4751 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
4752 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4753 (pkt->hdr.cmd != REPLY_TX);
4754
4755 /* Based on type of command response or notification,
4756 * handle those that need handling via function in
4757 * rx_handlers table. See iwl4965_setup_rx_handlers() */
4758 if (priv->rx_handlers[pkt->hdr.cmd]) {
4759 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4760 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4761 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4762 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4763 } else {
4764 /* No handling needed */
4765 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4766 "r %d i %d No handler needed for %s, 0x%02x\n",
4767 r, i, get_cmd_string(pkt->hdr.cmd),
4768 pkt->hdr.cmd);
4769 }
4770
4771 if (reclaim) {
4772 /* Invoke any callbacks, transfer the skb to caller, and
4773 * fire off the (possibly) blocking iwl4965_send_cmd()
4774 * as we reclaim the driver command queue */
4775 if (rxb && rxb->skb)
4776 iwl4965_tx_cmd_complete(priv, rxb);
4777 else
4778 IWL_WARNING("Claim null rxb?\n");
4779 }
4780
4781 /* For now we just don't re-use anything. We can tweak this
4782 * later to try and re-use notification packets and SKBs that
4783 * fail to Rx correctly */
4784 if (rxb->skb != NULL) {
4785 priv->alloc_rxb_skb--;
4786 dev_kfree_skb_any(rxb->skb);
4787 rxb->skb = NULL;
4788 }
4789
4790 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4791 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4792 spin_lock_irqsave(&rxq->lock, flags);
4793 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4794 spin_unlock_irqrestore(&rxq->lock, flags);
4795 i = (i + 1) & RX_QUEUE_MASK;
4796 /* If there are a lot of unused frames,
4797 * restock the Rx queue so ucode wont assert. */
4798 if (fill_rx) {
4799 count++;
4800 if (count >= 8) {
4801 priv->rxq.read = i;
4802 __iwl4965_rx_replenish(priv);
4803 count = 0;
4804 }
4805 }
4806 }
4807
4808 /* Backtrack one entry */
4809 priv->rxq.read = i;
4810 iwl4965_rx_queue_restock(priv);
4811 }
4812
4813 /**
4814 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4815 */
4816 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4817 struct iwl4965_tx_queue *txq)
4818 {
4819 u32 reg = 0;
4820 int rc = 0;
4821 int txq_id = txq->q.id;
4822
4823 if (txq->need_update == 0)
4824 return rc;
4825
4826 /* if we're trying to save power */
4827 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4828 /* wake up nic if it's powered down ...
4829 * uCode will wake up, and interrupt us again, so next
4830 * time we'll skip this part. */
4831 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4832
4833 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4834 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4835 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4836 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4837 return rc;
4838 }
4839
4840 /* restore this queue's parameters in nic hardware. */
4841 rc = iwl4965_grab_nic_access(priv);
4842 if (rc)
4843 return rc;
4844 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
4845 txq->q.write_ptr | (txq_id << 8));
4846 iwl4965_release_nic_access(priv);
4847
4848 /* else not in power-save mode, uCode will never sleep when we're
4849 * trying to tx (during RFKILL, we're not trying to tx). */
4850 } else
4851 iwl4965_write32(priv, HBUS_TARG_WRPTR,
4852 txq->q.write_ptr | (txq_id << 8));
4853
4854 txq->need_update = 0;
4855
4856 return rc;
4857 }
4858
4859 #ifdef CONFIG_IWL4965_DEBUG
4860 static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
4861 {
4862 DECLARE_MAC_BUF(mac);
4863
4864 IWL_DEBUG_RADIO("RX CONFIG:\n");
4865 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4866 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4867 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4868 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4869 le32_to_cpu(rxon->filter_flags));
4870 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4871 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4872 rxon->ofdm_basic_rates);
4873 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4874 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4875 print_mac(mac, rxon->node_addr));
4876 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4877 print_mac(mac, rxon->bssid_addr));
4878 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4879 }
4880 #endif
4881
4882 static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
4883 {
4884 IWL_DEBUG_ISR("Enabling interrupts\n");
4885 set_bit(STATUS_INT_ENABLED, &priv->status);
4886 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4887 }
4888
4889 static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
4890 {
4891 clear_bit(STATUS_INT_ENABLED, &priv->status);
4892
4893 /* disable interrupts from uCode/NIC to host */
4894 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4895
4896 /* acknowledge/clear/reset any interrupts still pending
4897 * from uCode or flow handler (Rx/Tx DMA) */
4898 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4899 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4900 IWL_DEBUG_ISR("Disabled interrupts\n");
4901 }
4902
4903 static const char *desc_lookup(int i)
4904 {
4905 switch (i) {
4906 case 1:
4907 return "FAIL";
4908 case 2:
4909 return "BAD_PARAM";
4910 case 3:
4911 return "BAD_CHECKSUM";
4912 case 4:
4913 return "NMI_INTERRUPT";
4914 case 5:
4915 return "SYSASSERT";
4916 case 6:
4917 return "FATAL_ERROR";
4918 }
4919
4920 return "UNKNOWN";
4921 }
4922
4923 #define ERROR_START_OFFSET (1 * sizeof(u32))
4924 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4925
4926 static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
4927 {
4928 u32 data2, line;
4929 u32 desc, time, count, base, data1;
4930 u32 blink1, blink2, ilink1, ilink2;
4931 int rc;
4932
4933 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4934
4935 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4936 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4937 return;
4938 }
4939
4940 rc = iwl4965_grab_nic_access(priv);
4941 if (rc) {
4942 IWL_WARNING("Can not read from adapter at this time.\n");
4943 return;
4944 }
4945
4946 count = iwl4965_read_targ_mem(priv, base);
4947
4948 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4949 IWL_ERROR("Start IWL Error Log Dump:\n");
4950 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4951 priv->status, priv->config, count);
4952 }
4953
4954 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4955 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4956 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4957 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4958 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4959 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4960 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4961 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4962 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
4963
4964 IWL_ERROR("Desc Time "
4965 "data1 data2 line\n");
4966 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4967 desc_lookup(desc), desc, time, data1, data2, line);
4968 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4969 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4970 ilink1, ilink2);
4971
4972 iwl4965_release_nic_access(priv);
4973 }
4974
4975 #define EVENT_START_OFFSET (4 * sizeof(u32))
4976
4977 /**
4978 * iwl4965_print_event_log - Dump error event log to syslog
4979 *
4980 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
4981 */
4982 static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
4983 u32 num_events, u32 mode)
4984 {
4985 u32 i;
4986 u32 base; /* SRAM byte address of event log header */
4987 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4988 u32 ptr; /* SRAM byte address of log data */
4989 u32 ev, time, data; /* event log data */
4990
4991 if (num_events == 0)
4992 return;
4993
4994 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4995
4996 if (mode == 0)
4997 event_size = 2 * sizeof(u32);
4998 else
4999 event_size = 3 * sizeof(u32);
5000
5001 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
5002
5003 /* "time" is actually "data" for mode 0 (no timestamp).
5004 * place event id # at far right for easier visual parsing. */
5005 for (i = 0; i < num_events; i++) {
5006 ev = iwl4965_read_targ_mem(priv, ptr);
5007 ptr += sizeof(u32);
5008 time = iwl4965_read_targ_mem(priv, ptr);
5009 ptr += sizeof(u32);
5010 if (mode == 0)
5011 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
5012 else {
5013 data = iwl4965_read_targ_mem(priv, ptr);
5014 ptr += sizeof(u32);
5015 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
5016 }
5017 }
5018 }
5019
5020 static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
5021 {
5022 int rc;
5023 u32 base; /* SRAM byte address of event log header */
5024 u32 capacity; /* event log capacity in # entries */
5025 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
5026 u32 num_wraps; /* # times uCode wrapped to top of log */
5027 u32 next_entry; /* index of next entry to be written by uCode */
5028 u32 size; /* # entries that we'll print */
5029
5030 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
5031 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
5032 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
5033 return;
5034 }
5035
5036 rc = iwl4965_grab_nic_access(priv);
5037 if (rc) {
5038 IWL_WARNING("Can not read from adapter at this time.\n");
5039 return;
5040 }
5041
5042 /* event log header */
5043 capacity = iwl4965_read_targ_mem(priv, base);
5044 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
5045 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
5046 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
5047
5048 size = num_wraps ? capacity : next_entry;
5049
5050 /* bail out if nothing in log */
5051 if (size == 0) {
5052 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
5053 iwl4965_release_nic_access(priv);
5054 return;
5055 }
5056
5057 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
5058 size, num_wraps);
5059
5060 /* if uCode has wrapped back to top of log, start at the oldest entry,
5061 * i.e the next one that uCode would fill. */
5062 if (num_wraps)
5063 iwl4965_print_event_log(priv, next_entry,
5064 capacity - next_entry, mode);
5065
5066 /* (then/else) start at top of log */
5067 iwl4965_print_event_log(priv, 0, next_entry, mode);
5068
5069 iwl4965_release_nic_access(priv);
5070 }
5071
5072 /**
5073 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
5074 */
5075 static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
5076 {
5077 /* Set the FW error flag -- cleared on iwl4965_down */
5078 set_bit(STATUS_FW_ERROR, &priv->status);
5079
5080 /* Cancel currently queued command. */
5081 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5082
5083 #ifdef CONFIG_IWL4965_DEBUG
5084 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5085 iwl4965_dump_nic_error_log(priv);
5086 iwl4965_dump_nic_event_log(priv);
5087 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
5088 }
5089 #endif
5090
5091 wake_up_interruptible(&priv->wait_command_queue);
5092
5093 /* Keep the restart process from trying to send host
5094 * commands by clearing the INIT status bit */
5095 clear_bit(STATUS_READY, &priv->status);
5096
5097 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5098 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5099 "Restarting adapter due to uCode error.\n");
5100
5101 if (iwl4965_is_associated(priv)) {
5102 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5103 sizeof(priv->recovery_rxon));
5104 priv->error_recovering = 1;
5105 }
5106 queue_work(priv->workqueue, &priv->restart);
5107 }
5108 }
5109
5110 static void iwl4965_error_recovery(struct iwl4965_priv *priv)
5111 {
5112 unsigned long flags;
5113
5114 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5115 sizeof(priv->staging_rxon));
5116 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5117 iwl4965_commit_rxon(priv);
5118
5119 iwl4965_rxon_add_station(priv, priv->bssid, 1);
5120
5121 spin_lock_irqsave(&priv->lock, flags);
5122 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5123 priv->error_recovering = 0;
5124 spin_unlock_irqrestore(&priv->lock, flags);
5125 }
5126
5127 static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
5128 {
5129 u32 inta, handled = 0;
5130 u32 inta_fh;
5131 unsigned long flags;
5132 #ifdef CONFIG_IWL4965_DEBUG
5133 u32 inta_mask;
5134 #endif
5135
5136 spin_lock_irqsave(&priv->lock, flags);
5137
5138 /* Ack/clear/reset pending uCode interrupts.
5139 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5140 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5141 inta = iwl4965_read32(priv, CSR_INT);
5142 iwl4965_write32(priv, CSR_INT, inta);
5143
5144 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5145 * Any new interrupts that happen after this, either while we're
5146 * in this tasklet, or later, will show up in next ISR/tasklet. */
5147 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5148 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
5149
5150 #ifdef CONFIG_IWL4965_DEBUG
5151 if (iwl4965_debug_level & IWL_DL_ISR) {
5152 /* just for debug */
5153 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5154 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5155 inta, inta_mask, inta_fh);
5156 }
5157 #endif
5158
5159 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5160 * atomic, make sure that inta covers all the interrupts that
5161 * we've discovered, even if FH interrupt came in just after
5162 * reading CSR_INT. */
5163 if (inta_fh & CSR_FH_INT_RX_MASK)
5164 inta |= CSR_INT_BIT_FH_RX;
5165 if (inta_fh & CSR_FH_INT_TX_MASK)
5166 inta |= CSR_INT_BIT_FH_TX;
5167
5168 /* Now service all interrupt bits discovered above. */
5169 if (inta & CSR_INT_BIT_HW_ERR) {
5170 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5171
5172 /* Tell the device to stop sending interrupts */
5173 iwl4965_disable_interrupts(priv);
5174
5175 iwl4965_irq_handle_error(priv);
5176
5177 handled |= CSR_INT_BIT_HW_ERR;
5178
5179 spin_unlock_irqrestore(&priv->lock, flags);
5180
5181 return;
5182 }
5183
5184 #ifdef CONFIG_IWL4965_DEBUG
5185 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5186 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5187 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
5188 IWL_DEBUG_ISR("Microcode started or stopped.\n");
5189
5190 /* Alive notification via Rx interrupt will do the real work */
5191 if (inta & CSR_INT_BIT_ALIVE)
5192 IWL_DEBUG_ISR("Alive interrupt\n");
5193 }
5194 #endif
5195 /* Safely ignore these bits for debug checks below */
5196 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
5197
5198 /* HW RF KILL switch toggled */
5199 if (inta & CSR_INT_BIT_RF_KILL) {
5200 int hw_rf_kill = 0;
5201 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
5202 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5203 hw_rf_kill = 1;
5204
5205 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5206 "RF_KILL bit toggled to %s.\n",
5207 hw_rf_kill ? "disable radio":"enable radio");
5208
5209 /* Queue restart only if RF_KILL switch was set to "kill"
5210 * when we loaded driver, and is now set to "enable".
5211 * After we're Alive, RF_KILL gets handled by
5212 * iwl_rx_card_state_notif() */
5213 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5214 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5215 queue_work(priv->workqueue, &priv->restart);
5216 }
5217
5218 handled |= CSR_INT_BIT_RF_KILL;
5219 }
5220
5221 /* Chip got too hot and stopped itself */
5222 if (inta & CSR_INT_BIT_CT_KILL) {
5223 IWL_ERROR("Microcode CT kill error detected.\n");
5224 handled |= CSR_INT_BIT_CT_KILL;
5225 }
5226
5227 /* Error detected by uCode */
5228 if (inta & CSR_INT_BIT_SW_ERR) {
5229 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5230 inta);
5231 iwl4965_irq_handle_error(priv);
5232 handled |= CSR_INT_BIT_SW_ERR;
5233 }
5234
5235 /* uCode wakes up after power-down sleep */
5236 if (inta & CSR_INT_BIT_WAKEUP) {
5237 IWL_DEBUG_ISR("Wakeup interrupt\n");
5238 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5239 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5240 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5241 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5242 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5243 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5244 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
5245
5246 handled |= CSR_INT_BIT_WAKEUP;
5247 }
5248
5249 /* All uCode command responses, including Tx command responses,
5250 * Rx "responses" (frame-received notification), and other
5251 * notifications from uCode come through here*/
5252 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
5253 iwl4965_rx_handle(priv);
5254 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5255 }
5256
5257 if (inta & CSR_INT_BIT_FH_TX) {
5258 IWL_DEBUG_ISR("Tx interrupt\n");
5259 handled |= CSR_INT_BIT_FH_TX;
5260 }
5261
5262 if (inta & ~handled)
5263 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5264
5265 if (inta & ~CSR_INI_SET_MASK) {
5266 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5267 inta & ~CSR_INI_SET_MASK);
5268 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5269 }
5270
5271 /* Re-enable all interrupts */
5272 iwl4965_enable_interrupts(priv);
5273
5274 #ifdef CONFIG_IWL4965_DEBUG
5275 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5276 inta = iwl4965_read32(priv, CSR_INT);
5277 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5278 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5279 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5280 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5281 }
5282 #endif
5283 spin_unlock_irqrestore(&priv->lock, flags);
5284 }
5285
5286 static irqreturn_t iwl4965_isr(int irq, void *data)
5287 {
5288 struct iwl4965_priv *priv = data;
5289 u32 inta, inta_mask;
5290 u32 inta_fh;
5291 if (!priv)
5292 return IRQ_NONE;
5293
5294 spin_lock(&priv->lock);
5295
5296 /* Disable (but don't clear!) interrupts here to avoid
5297 * back-to-back ISRs and sporadic interrupts from our NIC.
5298 * If we have something to service, the tasklet will re-enable ints.
5299 * If we *don't* have something, we'll re-enable before leaving here. */
5300 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5301 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
5302
5303 /* Discover which interrupts are active/pending */
5304 inta = iwl4965_read32(priv, CSR_INT);
5305 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5306
5307 /* Ignore interrupt if there's nothing in NIC to service.
5308 * This may be due to IRQ shared with another device,
5309 * or due to sporadic interrupts thrown from our NIC. */
5310 if (!inta && !inta_fh) {
5311 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5312 goto none;
5313 }
5314
5315 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
5316 /* Hardware disappeared. It might have already raised
5317 * an interrupt */
5318 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
5319 goto unplugged;
5320 }
5321
5322 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5323 inta, inta_mask, inta_fh);
5324
5325 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
5326 tasklet_schedule(&priv->irq_tasklet);
5327
5328 unplugged:
5329 spin_unlock(&priv->lock);
5330 return IRQ_HANDLED;
5331
5332 none:
5333 /* re-enable interrupts here since we don't have anything to service. */
5334 iwl4965_enable_interrupts(priv);
5335 spin_unlock(&priv->lock);
5336 return IRQ_NONE;
5337 }
5338
5339 /************************** EEPROM BANDS ****************************
5340 *
5341 * The iwl4965_eeprom_band definitions below provide the mapping from the
5342 * EEPROM contents to the specific channel number supported for each
5343 * band.
5344 *
5345 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
5346 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5347 * The specific geography and calibration information for that channel
5348 * is contained in the eeprom map itself.
5349 *
5350 * During init, we copy the eeprom information and channel map
5351 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5352 *
5353 * channel_map_24/52 provides the index in the channel_info array for a
5354 * given channel. We have to have two separate maps as there is channel
5355 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5356 * band_2
5357 *
5358 * A value of 0xff stored in the channel_map indicates that the channel
5359 * is not supported by the hardware at all.
5360 *
5361 * A value of 0xfe in the channel_map indicates that the channel is not
5362 * valid for Tx with the current hardware. This means that
5363 * while the system can tune and receive on a given channel, it may not
5364 * be able to associate or transmit any frames on that
5365 * channel. There is no corresponding channel information for that
5366 * entry.
5367 *
5368 *********************************************************************/
5369
5370 /* 2.4 GHz */
5371 static const u8 iwl4965_eeprom_band_1[14] = {
5372 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5373 };
5374
5375 /* 5.2 GHz bands */
5376 static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
5377 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5378 };
5379
5380 static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
5381 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5382 };
5383
5384 static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
5385 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5386 };
5387
5388 static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
5389 145, 149, 153, 157, 161, 165
5390 };
5391
5392 static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
5393 1, 2, 3, 4, 5, 6, 7
5394 };
5395
5396 static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
5397 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5398 };
5399
5400 static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5401 int band,
5402 int *eeprom_ch_count,
5403 const struct iwl4965_eeprom_channel
5404 **eeprom_ch_info,
5405 const u8 **eeprom_ch_index)
5406 {
5407 switch (band) {
5408 case 1: /* 2.4GHz band */
5409 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
5410 *eeprom_ch_info = priv->eeprom.band_1_channels;
5411 *eeprom_ch_index = iwl4965_eeprom_band_1;
5412 break;
5413 case 2: /* 4.9GHz band */
5414 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
5415 *eeprom_ch_info = priv->eeprom.band_2_channels;
5416 *eeprom_ch_index = iwl4965_eeprom_band_2;
5417 break;
5418 case 3: /* 5.2GHz band */
5419 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
5420 *eeprom_ch_info = priv->eeprom.band_3_channels;
5421 *eeprom_ch_index = iwl4965_eeprom_band_3;
5422 break;
5423 case 4: /* 5.5GHz band */
5424 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
5425 *eeprom_ch_info = priv->eeprom.band_4_channels;
5426 *eeprom_ch_index = iwl4965_eeprom_band_4;
5427 break;
5428 case 5: /* 5.7GHz band */
5429 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
5430 *eeprom_ch_info = priv->eeprom.band_5_channels;
5431 *eeprom_ch_index = iwl4965_eeprom_band_5;
5432 break;
5433 case 6: /* 2.4GHz FAT channels */
5434 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
5435 *eeprom_ch_info = priv->eeprom.band_24_channels;
5436 *eeprom_ch_index = iwl4965_eeprom_band_6;
5437 break;
5438 case 7: /* 5 GHz FAT channels */
5439 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
5440 *eeprom_ch_info = priv->eeprom.band_52_channels;
5441 *eeprom_ch_index = iwl4965_eeprom_band_7;
5442 break;
5443 default:
5444 BUG();
5445 return;
5446 }
5447 }
5448
5449 /**
5450 * iwl4965_get_channel_info - Find driver's private channel info
5451 *
5452 * Based on band and channel number.
5453 */
5454 const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
5455 int phymode, u16 channel)
5456 {
5457 int i;
5458
5459 switch (phymode) {
5460 case MODE_IEEE80211A:
5461 for (i = 14; i < priv->channel_count; i++) {
5462 if (priv->channel_info[i].channel == channel)
5463 return &priv->channel_info[i];
5464 }
5465 break;
5466
5467 case MODE_IEEE80211B:
5468 case MODE_IEEE80211G:
5469 if (channel >= 1 && channel <= 14)
5470 return &priv->channel_info[channel - 1];
5471 break;
5472
5473 }
5474
5475 return NULL;
5476 }
5477
5478 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5479 ? # x " " : "")
5480
5481 /**
5482 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5483 */
5484 static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
5485 {
5486 int eeprom_ch_count = 0;
5487 const u8 *eeprom_ch_index = NULL;
5488 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
5489 int band, ch;
5490 struct iwl4965_channel_info *ch_info;
5491
5492 if (priv->channel_count) {
5493 IWL_DEBUG_INFO("Channel map already initialized.\n");
5494 return 0;
5495 }
5496
5497 if (priv->eeprom.version < 0x2f) {
5498 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5499 priv->eeprom.version);
5500 return -EINVAL;
5501 }
5502
5503 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5504
5505 priv->channel_count =
5506 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5507 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5508 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5509 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5510 ARRAY_SIZE(iwl4965_eeprom_band_5);
5511
5512 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5513
5514 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
5515 priv->channel_count, GFP_KERNEL);
5516 if (!priv->channel_info) {
5517 IWL_ERROR("Could not allocate channel_info\n");
5518 priv->channel_count = 0;
5519 return -ENOMEM;
5520 }
5521
5522 ch_info = priv->channel_info;
5523
5524 /* Loop through the 5 EEPROM bands adding them in order to the
5525 * channel map we maintain (that contains additional information than
5526 * what just in the EEPROM) */
5527 for (band = 1; band <= 5; band++) {
5528
5529 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5530 &eeprom_ch_info, &eeprom_ch_index);
5531
5532 /* Loop through each band adding each of the channels */
5533 for (ch = 0; ch < eeprom_ch_count; ch++) {
5534 ch_info->channel = eeprom_ch_index[ch];
5535 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5536 MODE_IEEE80211A;
5537
5538 /* permanently store EEPROM's channel regulatory flags
5539 * and max power in channel info database. */
5540 ch_info->eeprom = eeprom_ch_info[ch];
5541
5542 /* Copy the run-time flags so they are there even on
5543 * invalid channels */
5544 ch_info->flags = eeprom_ch_info[ch].flags;
5545
5546 if (!(is_channel_valid(ch_info))) {
5547 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5548 "No traffic\n",
5549 ch_info->channel,
5550 ch_info->flags,
5551 is_channel_a_band(ch_info) ?
5552 "5.2" : "2.4");
5553 ch_info++;
5554 continue;
5555 }
5556
5557 /* Initialize regulatory-based run-time data */
5558 ch_info->max_power_avg = ch_info->curr_txpow =
5559 eeprom_ch_info[ch].max_power_avg;
5560 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5561 ch_info->min_power = 0;
5562
5563 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5564 " %ddBm): Ad-Hoc %ssupported\n",
5565 ch_info->channel,
5566 is_channel_a_band(ch_info) ?
5567 "5.2" : "2.4",
5568 CHECK_AND_PRINT(IBSS),
5569 CHECK_AND_PRINT(ACTIVE),
5570 CHECK_AND_PRINT(RADAR),
5571 CHECK_AND_PRINT(WIDE),
5572 CHECK_AND_PRINT(NARROW),
5573 CHECK_AND_PRINT(DFS),
5574 eeprom_ch_info[ch].flags,
5575 eeprom_ch_info[ch].max_power_avg,
5576 ((eeprom_ch_info[ch].
5577 flags & EEPROM_CHANNEL_IBSS)
5578 && !(eeprom_ch_info[ch].
5579 flags & EEPROM_CHANNEL_RADAR))
5580 ? "" : "not ");
5581
5582 /* Set the user_txpower_limit to the highest power
5583 * supported by any channel */
5584 if (eeprom_ch_info[ch].max_power_avg >
5585 priv->user_txpower_limit)
5586 priv->user_txpower_limit =
5587 eeprom_ch_info[ch].max_power_avg;
5588
5589 ch_info++;
5590 }
5591 }
5592
5593 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
5594 for (band = 6; band <= 7; band++) {
5595 int phymode;
5596 u8 fat_extension_chan;
5597
5598 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5599 &eeprom_ch_info, &eeprom_ch_index);
5600
5601 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
5602 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
5603
5604 /* Loop through each band adding each of the channels */
5605 for (ch = 0; ch < eeprom_ch_count; ch++) {
5606
5607 if ((band == 6) &&
5608 ((eeprom_ch_index[ch] == 5) ||
5609 (eeprom_ch_index[ch] == 6) ||
5610 (eeprom_ch_index[ch] == 7)))
5611 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5612 else
5613 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5614
5615 /* Set up driver's info for lower half */
5616 iwl4965_set_fat_chan_info(priv, phymode,
5617 eeprom_ch_index[ch],
5618 &(eeprom_ch_info[ch]),
5619 fat_extension_chan);
5620
5621 /* Set up driver's info for upper half */
5622 iwl4965_set_fat_chan_info(priv, phymode,
5623 (eeprom_ch_index[ch] + 4),
5624 &(eeprom_ch_info[ch]),
5625 HT_IE_EXT_CHANNEL_BELOW);
5626 }
5627 }
5628
5629 return 0;
5630 }
5631
5632 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5633 * sending probe req. This should be set long enough to hear probe responses
5634 * from more than one AP. */
5635 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5636 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5637
5638 /* For faster active scanning, scan will move to the next channel if fewer than
5639 * PLCP_QUIET_THRESH packets are heard on this channel within
5640 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5641 * time if it's a quiet channel (nothing responded to our probe, and there's
5642 * no other traffic).
5643 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5644 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5645 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5646
5647 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5648 * Must be set longer than active dwell time.
5649 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5650 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5651 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5652 #define IWL_PASSIVE_DWELL_BASE (100)
5653 #define IWL_CHANNEL_TUNE_TIME 5
5654
5655 static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
5656 {
5657 if (phymode == MODE_IEEE80211A)
5658 return IWL_ACTIVE_DWELL_TIME_52;
5659 else
5660 return IWL_ACTIVE_DWELL_TIME_24;
5661 }
5662
5663 static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
5664 {
5665 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
5666 u16 passive = (phymode != MODE_IEEE80211A) ?
5667 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5668 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5669
5670 if (iwl4965_is_associated(priv)) {
5671 /* If we're associated, we clamp the maximum passive
5672 * dwell time to be 98% of the beacon interval (minus
5673 * 2 * channel tune time) */
5674 passive = priv->beacon_int;
5675 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5676 passive = IWL_PASSIVE_DWELL_BASE;
5677 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5678 }
5679
5680 if (passive <= active)
5681 passive = active + 1;
5682
5683 return passive;
5684 }
5685
5686 static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
5687 u8 is_active, u8 direct_mask,
5688 struct iwl4965_scan_channel *scan_ch)
5689 {
5690 const struct ieee80211_channel *channels = NULL;
5691 const struct ieee80211_hw_mode *hw_mode;
5692 const struct iwl4965_channel_info *ch_info;
5693 u16 passive_dwell = 0;
5694 u16 active_dwell = 0;
5695 int added, i;
5696
5697 hw_mode = iwl4965_get_hw_mode(priv, phymode);
5698 if (!hw_mode)
5699 return 0;
5700
5701 channels = hw_mode->channels;
5702
5703 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5704 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
5705
5706 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5707 if (channels[i].chan ==
5708 le16_to_cpu(priv->active_rxon.channel)) {
5709 if (iwl4965_is_associated(priv)) {
5710 IWL_DEBUG_SCAN
5711 ("Skipping current channel %d\n",
5712 le16_to_cpu(priv->active_rxon.channel));
5713 continue;
5714 }
5715 } else if (priv->only_active_channel)
5716 continue;
5717
5718 scan_ch->channel = channels[i].chan;
5719
5720 ch_info = iwl4965_get_channel_info(priv, phymode,
5721 scan_ch->channel);
5722 if (!is_channel_valid(ch_info)) {
5723 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5724 scan_ch->channel);
5725 continue;
5726 }
5727
5728 if (!is_active || is_channel_passive(ch_info) ||
5729 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5730 scan_ch->type = 0; /* passive */
5731 else
5732 scan_ch->type = 1; /* active */
5733
5734 if (scan_ch->type & 1)
5735 scan_ch->type |= (direct_mask << 1);
5736
5737 if (is_channel_narrow(ch_info))
5738 scan_ch->type |= (1 << 7);
5739
5740 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5741 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5742
5743 /* Set txpower levels to defaults */
5744 scan_ch->tpc.dsp_atten = 110;
5745 /* scan_pwr_info->tpc.dsp_atten; */
5746
5747 /*scan_pwr_info->tpc.tx_gain; */
5748 if (phymode == MODE_IEEE80211A)
5749 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5750 else {
5751 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5752 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5753 * power level:
5754 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
5755 */
5756 }
5757
5758 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5759 scan_ch->channel,
5760 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5761 (scan_ch->type & 1) ?
5762 active_dwell : passive_dwell);
5763
5764 scan_ch++;
5765 added++;
5766 }
5767
5768 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5769 return added;
5770 }
5771
5772 static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
5773 {
5774 int i, j;
5775 for (i = 0; i < 3; i++) {
5776 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5777 for (j = 0; j < hw_mode->num_channels; j++)
5778 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5779 }
5780 }
5781
5782 static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
5783 struct ieee80211_rate *rates)
5784 {
5785 int i;
5786
5787 for (i = 0; i < IWL_RATE_COUNT; i++) {
5788 rates[i].rate = iwl4965_rates[i].ieee * 5;
5789 rates[i].val = i; /* Rate scaling will work on indexes */
5790 rates[i].val2 = i;
5791 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5792 /* Only OFDM have the bits-per-symbol set */
5793 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5794 rates[i].flags |= IEEE80211_RATE_OFDM;
5795 else {
5796 /*
5797 * If CCK 1M then set rate flag to CCK else CCK_2
5798 * which is CCK | PREAMBLE2
5799 */
5800 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
5801 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5802 }
5803
5804 /* Set up which ones are basic rates... */
5805 if (IWL_BASIC_RATES_MASK & (1 << i))
5806 rates[i].flags |= IEEE80211_RATE_BASIC;
5807 }
5808 }
5809
5810 /**
5811 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
5812 */
5813 static int iwl4965_init_geos(struct iwl4965_priv *priv)
5814 {
5815 struct iwl4965_channel_info *ch;
5816 struct ieee80211_hw_mode *modes;
5817 struct ieee80211_channel *channels;
5818 struct ieee80211_channel *geo_ch;
5819 struct ieee80211_rate *rates;
5820 int i = 0;
5821 enum {
5822 A = 0,
5823 B = 1,
5824 G = 2,
5825 };
5826 int mode_count = 3;
5827
5828 if (priv->modes) {
5829 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5830 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5831 return 0;
5832 }
5833
5834 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5835 GFP_KERNEL);
5836 if (!modes)
5837 return -ENOMEM;
5838
5839 channels = kzalloc(sizeof(struct ieee80211_channel) *
5840 priv->channel_count, GFP_KERNEL);
5841 if (!channels) {
5842 kfree(modes);
5843 return -ENOMEM;
5844 }
5845
5846 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5847 GFP_KERNEL);
5848 if (!rates) {
5849 kfree(modes);
5850 kfree(channels);
5851 return -ENOMEM;
5852 }
5853
5854 /* 0 = 802.11a
5855 * 1 = 802.11b
5856 * 2 = 802.11g
5857 */
5858
5859 /* 5.2GHz channels start after the 2.4GHz channels */
5860 modes[A].mode = MODE_IEEE80211A;
5861 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5862 modes[A].rates = rates;
5863 modes[A].num_rates = 8; /* just OFDM */
5864 modes[A].rates = &rates[4];
5865 modes[A].num_channels = 0;
5866 #ifdef CONFIG_IWL4965_HT
5867 iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
5868 #endif
5869
5870 modes[B].mode = MODE_IEEE80211B;
5871 modes[B].channels = channels;
5872 modes[B].rates = rates;
5873 modes[B].num_rates = 4; /* just CCK */
5874 modes[B].num_channels = 0;
5875
5876 modes[G].mode = MODE_IEEE80211G;
5877 modes[G].channels = channels;
5878 modes[G].rates = rates;
5879 modes[G].num_rates = 12; /* OFDM & CCK */
5880 modes[G].num_channels = 0;
5881 #ifdef CONFIG_IWL4965_HT
5882 iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
5883 #endif
5884
5885 priv->ieee_channels = channels;
5886 priv->ieee_rates = rates;
5887
5888 iwl4965_init_hw_rates(priv, rates);
5889
5890 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5891 ch = &priv->channel_info[i];
5892
5893 if (!is_channel_valid(ch)) {
5894 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5895 "skipping.\n",
5896 ch->channel, is_channel_a_band(ch) ?
5897 "5.2" : "2.4");
5898 continue;
5899 }
5900
5901 if (is_channel_a_band(ch)) {
5902 geo_ch = &modes[A].channels[modes[A].num_channels++];
5903 } else {
5904 geo_ch = &modes[B].channels[modes[B].num_channels++];
5905 modes[G].num_channels++;
5906 }
5907
5908 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5909 geo_ch->chan = ch->channel;
5910 geo_ch->power_level = ch->max_power_avg;
5911 geo_ch->antenna_max = 0xff;
5912
5913 if (is_channel_valid(ch)) {
5914 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5915 if (ch->flags & EEPROM_CHANNEL_IBSS)
5916 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5917
5918 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5919 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5920
5921 if (ch->flags & EEPROM_CHANNEL_RADAR)
5922 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5923
5924 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5925 priv->max_channel_txpower_limit =
5926 ch->max_power_avg;
5927 }
5928
5929 geo_ch->val = geo_ch->flag;
5930 }
5931
5932 if ((modes[A].num_channels == 0) && priv->is_abg) {
5933 printk(KERN_INFO DRV_NAME
5934 ": Incorrectly detected BG card as ABG. Please send "
5935 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5936 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5937 priv->is_abg = 0;
5938 }
5939
5940 printk(KERN_INFO DRV_NAME
5941 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5942 modes[G].num_channels, modes[A].num_channels);
5943
5944 /*
5945 * NOTE: We register these in preference of order -- the
5946 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5947 * a phymode based on rates or AP capabilities but seems to
5948 * configure it purely on if the channel being configured
5949 * is supported by a mode -- and the first match is taken
5950 */
5951
5952 if (modes[G].num_channels)
5953 ieee80211_register_hwmode(priv->hw, &modes[G]);
5954 if (modes[B].num_channels)
5955 ieee80211_register_hwmode(priv->hw, &modes[B]);
5956 if (modes[A].num_channels)
5957 ieee80211_register_hwmode(priv->hw, &modes[A]);
5958
5959 priv->modes = modes;
5960 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5961
5962 return 0;
5963 }
5964
5965 /******************************************************************************
5966 *
5967 * uCode download functions
5968 *
5969 ******************************************************************************/
5970
5971 static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
5972 {
5973 if (priv->ucode_code.v_addr != NULL) {
5974 pci_free_consistent(priv->pci_dev,
5975 priv->ucode_code.len,
5976 priv->ucode_code.v_addr,
5977 priv->ucode_code.p_addr);
5978 priv->ucode_code.v_addr = NULL;
5979 }
5980 if (priv->ucode_data.v_addr != NULL) {
5981 pci_free_consistent(priv->pci_dev,
5982 priv->ucode_data.len,
5983 priv->ucode_data.v_addr,
5984 priv->ucode_data.p_addr);
5985 priv->ucode_data.v_addr = NULL;
5986 }
5987 if (priv->ucode_data_backup.v_addr != NULL) {
5988 pci_free_consistent(priv->pci_dev,
5989 priv->ucode_data_backup.len,
5990 priv->ucode_data_backup.v_addr,
5991 priv->ucode_data_backup.p_addr);
5992 priv->ucode_data_backup.v_addr = NULL;
5993 }
5994 if (priv->ucode_init.v_addr != NULL) {
5995 pci_free_consistent(priv->pci_dev,
5996 priv->ucode_init.len,
5997 priv->ucode_init.v_addr,
5998 priv->ucode_init.p_addr);
5999 priv->ucode_init.v_addr = NULL;
6000 }
6001 if (priv->ucode_init_data.v_addr != NULL) {
6002 pci_free_consistent(priv->pci_dev,
6003 priv->ucode_init_data.len,
6004 priv->ucode_init_data.v_addr,
6005 priv->ucode_init_data.p_addr);
6006 priv->ucode_init_data.v_addr = NULL;
6007 }
6008 if (priv->ucode_boot.v_addr != NULL) {
6009 pci_free_consistent(priv->pci_dev,
6010 priv->ucode_boot.len,
6011 priv->ucode_boot.v_addr,
6012 priv->ucode_boot.p_addr);
6013 priv->ucode_boot.v_addr = NULL;
6014 }
6015 }
6016
6017 /**
6018 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
6019 * looking at all data.
6020 */
6021 static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image,
6022 u32 len)
6023 {
6024 u32 val;
6025 u32 save_len = len;
6026 int rc = 0;
6027 u32 errcnt;
6028
6029 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6030
6031 rc = iwl4965_grab_nic_access(priv);
6032 if (rc)
6033 return rc;
6034
6035 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
6036
6037 errcnt = 0;
6038 for (; len > 0; len -= sizeof(u32), image++) {
6039 /* read data comes through single port, auto-incr addr */
6040 /* NOTE: Use the debugless read so we don't flood kernel log
6041 * if IWL_DL_IO is set */
6042 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
6043 if (val != le32_to_cpu(*image)) {
6044 IWL_ERROR("uCode INST section is invalid at "
6045 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6046 save_len - len, val, le32_to_cpu(*image));
6047 rc = -EIO;
6048 errcnt++;
6049 if (errcnt >= 20)
6050 break;
6051 }
6052 }
6053
6054 iwl4965_release_nic_access(priv);
6055
6056 if (!errcnt)
6057 IWL_DEBUG_INFO
6058 ("ucode image in INSTRUCTION memory is good\n");
6059
6060 return rc;
6061 }
6062
6063
6064 /**
6065 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
6066 * using sample data 100 bytes apart. If these sample points are good,
6067 * it's a pretty good bet that everything between them is good, too.
6068 */
6069 static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
6070 {
6071 u32 val;
6072 int rc = 0;
6073 u32 errcnt = 0;
6074 u32 i;
6075
6076 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6077
6078 rc = iwl4965_grab_nic_access(priv);
6079 if (rc)
6080 return rc;
6081
6082 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6083 /* read data comes through single port, auto-incr addr */
6084 /* NOTE: Use the debugless read so we don't flood kernel log
6085 * if IWL_DL_IO is set */
6086 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
6087 i + RTC_INST_LOWER_BOUND);
6088 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
6089 if (val != le32_to_cpu(*image)) {
6090 #if 0 /* Enable this if you want to see details */
6091 IWL_ERROR("uCode INST section is invalid at "
6092 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6093 i, val, *image);
6094 #endif
6095 rc = -EIO;
6096 errcnt++;
6097 if (errcnt >= 3)
6098 break;
6099 }
6100 }
6101
6102 iwl4965_release_nic_access(priv);
6103
6104 return rc;
6105 }
6106
6107
6108 /**
6109 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
6110 * and verify its contents
6111 */
6112 static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
6113 {
6114 __le32 *image;
6115 u32 len;
6116 int rc = 0;
6117
6118 /* Try bootstrap */
6119 image = (__le32 *)priv->ucode_boot.v_addr;
6120 len = priv->ucode_boot.len;
6121 rc = iwl4965_verify_inst_sparse(priv, image, len);
6122 if (rc == 0) {
6123 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6124 return 0;
6125 }
6126
6127 /* Try initialize */
6128 image = (__le32 *)priv->ucode_init.v_addr;
6129 len = priv->ucode_init.len;
6130 rc = iwl4965_verify_inst_sparse(priv, image, len);
6131 if (rc == 0) {
6132 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6133 return 0;
6134 }
6135
6136 /* Try runtime/protocol */
6137 image = (__le32 *)priv->ucode_code.v_addr;
6138 len = priv->ucode_code.len;
6139 rc = iwl4965_verify_inst_sparse(priv, image, len);
6140 if (rc == 0) {
6141 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6142 return 0;
6143 }
6144
6145 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6146
6147 /* Since nothing seems to match, show first several data entries in
6148 * instruction SRAM, so maybe visual inspection will give a clue.
6149 * Selection of bootstrap image (vs. other images) is arbitrary. */
6150 image = (__le32 *)priv->ucode_boot.v_addr;
6151 len = priv->ucode_boot.len;
6152 rc = iwl4965_verify_inst_full(priv, image, len);
6153
6154 return rc;
6155 }
6156
6157
6158 /* check contents of special bootstrap uCode SRAM */
6159 static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
6160 {
6161 __le32 *image = priv->ucode_boot.v_addr;
6162 u32 len = priv->ucode_boot.len;
6163 u32 reg;
6164 u32 val;
6165
6166 IWL_DEBUG_INFO("Begin verify bsm\n");
6167
6168 /* verify BSM SRAM contents */
6169 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
6170 for (reg = BSM_SRAM_LOWER_BOUND;
6171 reg < BSM_SRAM_LOWER_BOUND + len;
6172 reg += sizeof(u32), image ++) {
6173 val = iwl4965_read_prph(priv, reg);
6174 if (val != le32_to_cpu(*image)) {
6175 IWL_ERROR("BSM uCode verification failed at "
6176 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6177 BSM_SRAM_LOWER_BOUND,
6178 reg - BSM_SRAM_LOWER_BOUND, len,
6179 val, le32_to_cpu(*image));
6180 return -EIO;
6181 }
6182 }
6183
6184 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6185
6186 return 0;
6187 }
6188
6189 /**
6190 * iwl4965_load_bsm - Load bootstrap instructions
6191 *
6192 * BSM operation:
6193 *
6194 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6195 * in special SRAM that does not power down during RFKILL. When powering back
6196 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6197 * the bootstrap program into the on-board processor, and starts it.
6198 *
6199 * The bootstrap program loads (via DMA) instructions and data for a new
6200 * program from host DRAM locations indicated by the host driver in the
6201 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6202 * automatically.
6203 *
6204 * When initializing the NIC, the host driver points the BSM to the
6205 * "initialize" uCode image. This uCode sets up some internal data, then
6206 * notifies host via "initialize alive" that it is complete.
6207 *
6208 * The host then replaces the BSM_DRAM_* pointer values to point to the
6209 * normal runtime uCode instructions and a backup uCode data cache buffer
6210 * (filled initially with starting data values for the on-board processor),
6211 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6212 * which begins normal operation.
6213 *
6214 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6215 * the backup data cache in DRAM before SRAM is powered down.
6216 *
6217 * When powering back up, the BSM loads the bootstrap program. This reloads
6218 * the runtime uCode instructions and the backup data cache into SRAM,
6219 * and re-launches the runtime uCode from where it left off.
6220 */
6221 static int iwl4965_load_bsm(struct iwl4965_priv *priv)
6222 {
6223 __le32 *image = priv->ucode_boot.v_addr;
6224 u32 len = priv->ucode_boot.len;
6225 dma_addr_t pinst;
6226 dma_addr_t pdata;
6227 u32 inst_len;
6228 u32 data_len;
6229 int rc;
6230 int i;
6231 u32 done;
6232 u32 reg_offset;
6233
6234 IWL_DEBUG_INFO("Begin load bsm\n");
6235
6236 /* make sure bootstrap program is no larger than BSM's SRAM size */
6237 if (len > IWL_MAX_BSM_SIZE)
6238 return -EINVAL;
6239
6240 /* Tell bootstrap uCode where to find the "Initialize" uCode
6241 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
6242 * NOTE: iwl4965_initialize_alive_start() will replace these values,
6243 * after the "initialize" uCode has run, to point to
6244 * runtime/protocol instructions and backup data cache. */
6245 pinst = priv->ucode_init.p_addr >> 4;
6246 pdata = priv->ucode_init_data.p_addr >> 4;
6247 inst_len = priv->ucode_init.len;
6248 data_len = priv->ucode_init_data.len;
6249
6250 rc = iwl4965_grab_nic_access(priv);
6251 if (rc)
6252 return rc;
6253
6254 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6255 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6256 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6257 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
6258
6259 /* Fill BSM memory with bootstrap instructions */
6260 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6261 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6262 reg_offset += sizeof(u32), image++)
6263 _iwl4965_write_prph(priv, reg_offset,
6264 le32_to_cpu(*image));
6265
6266 rc = iwl4965_verify_bsm(priv);
6267 if (rc) {
6268 iwl4965_release_nic_access(priv);
6269 return rc;
6270 }
6271
6272 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
6273 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6274 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
6275 RTC_INST_LOWER_BOUND);
6276 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
6277
6278 /* Load bootstrap code into instruction SRAM now,
6279 * to prepare to load "initialize" uCode */
6280 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6281 BSM_WR_CTRL_REG_BIT_START);
6282
6283 /* Wait for load of bootstrap uCode to finish */
6284 for (i = 0; i < 100; i++) {
6285 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
6286 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6287 break;
6288 udelay(10);
6289 }
6290 if (i < 100)
6291 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6292 else {
6293 IWL_ERROR("BSM write did not complete!\n");
6294 return -EIO;
6295 }
6296
6297 /* Enable future boot loads whenever power management unit triggers it
6298 * (e.g. when powering back up after power-save shutdown) */
6299 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6300 BSM_WR_CTRL_REG_BIT_START_EN);
6301
6302 iwl4965_release_nic_access(priv);
6303
6304 return 0;
6305 }
6306
6307 static void iwl4965_nic_start(struct iwl4965_priv *priv)
6308 {
6309 /* Remove all resets to allow NIC to operate */
6310 iwl4965_write32(priv, CSR_RESET, 0);
6311 }
6312
6313 static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
6314 {
6315 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
6316 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
6317 }
6318
6319 /**
6320 * iwl4965_read_ucode - Read uCode images from disk file.
6321 *
6322 * Copy into buffers for card to fetch via bus-mastering
6323 */
6324 static int iwl4965_read_ucode(struct iwl4965_priv *priv)
6325 {
6326 struct iwl4965_ucode *ucode;
6327 int ret;
6328 const struct firmware *ucode_raw;
6329 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6330 u8 *src;
6331 size_t len;
6332 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6333
6334 /* Ask kernel firmware_class module to get the boot firmware off disk.
6335 * request_firmware() is synchronous, file is in memory on return. */
6336 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6337 if (ret < 0) {
6338 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6339 name, ret);
6340 goto error;
6341 }
6342
6343 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6344 name, ucode_raw->size);
6345
6346 /* Make sure that we got at least our header! */
6347 if (ucode_raw->size < sizeof(*ucode)) {
6348 IWL_ERROR("File size way too small!\n");
6349 ret = -EINVAL;
6350 goto err_release;
6351 }
6352
6353 /* Data from ucode file: header followed by uCode images */
6354 ucode = (void *)ucode_raw->data;
6355
6356 ver = le32_to_cpu(ucode->ver);
6357 inst_size = le32_to_cpu(ucode->inst_size);
6358 data_size = le32_to_cpu(ucode->data_size);
6359 init_size = le32_to_cpu(ucode->init_size);
6360 init_data_size = le32_to_cpu(ucode->init_data_size);
6361 boot_size = le32_to_cpu(ucode->boot_size);
6362
6363 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6364 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6365 inst_size);
6366 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6367 data_size);
6368 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6369 init_size);
6370 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6371 init_data_size);
6372 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6373 boot_size);
6374
6375 /* Verify size of file vs. image size info in file's header */
6376 if (ucode_raw->size < sizeof(*ucode) +
6377 inst_size + data_size + init_size +
6378 init_data_size + boot_size) {
6379
6380 IWL_DEBUG_INFO("uCode file size %d too small\n",
6381 (int)ucode_raw->size);
6382 ret = -EINVAL;
6383 goto err_release;
6384 }
6385
6386 /* Verify that uCode images will fit in card's SRAM */
6387 if (inst_size > IWL_MAX_INST_SIZE) {
6388 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6389 inst_size);
6390 ret = -EINVAL;
6391 goto err_release;
6392 }
6393
6394 if (data_size > IWL_MAX_DATA_SIZE) {
6395 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6396 data_size);
6397 ret = -EINVAL;
6398 goto err_release;
6399 }
6400 if (init_size > IWL_MAX_INST_SIZE) {
6401 IWL_DEBUG_INFO
6402 ("uCode init instr len %d too large to fit in\n",
6403 init_size);
6404 ret = -EINVAL;
6405 goto err_release;
6406 }
6407 if (init_data_size > IWL_MAX_DATA_SIZE) {
6408 IWL_DEBUG_INFO
6409 ("uCode init data len %d too large to fit in\n",
6410 init_data_size);
6411 ret = -EINVAL;
6412 goto err_release;
6413 }
6414 if (boot_size > IWL_MAX_BSM_SIZE) {
6415 IWL_DEBUG_INFO
6416 ("uCode boot instr len %d too large to fit in\n",
6417 boot_size);
6418 ret = -EINVAL;
6419 goto err_release;
6420 }
6421
6422 /* Allocate ucode buffers for card's bus-master loading ... */
6423
6424 /* Runtime instructions and 2 copies of data:
6425 * 1) unmodified from disk
6426 * 2) backup cache for save/restore during power-downs */
6427 priv->ucode_code.len = inst_size;
6428 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6429
6430 priv->ucode_data.len = data_size;
6431 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6432
6433 priv->ucode_data_backup.len = data_size;
6434 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6435
6436 /* Initialization instructions and data */
6437 if (init_size && init_data_size) {
6438 priv->ucode_init.len = init_size;
6439 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6440
6441 priv->ucode_init_data.len = init_data_size;
6442 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6443
6444 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6445 goto err_pci_alloc;
6446 }
6447
6448 /* Bootstrap (instructions only, no data) */
6449 if (boot_size) {
6450 priv->ucode_boot.len = boot_size;
6451 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6452
6453 if (!priv->ucode_boot.v_addr)
6454 goto err_pci_alloc;
6455 }
6456
6457 /* Copy images into buffers for card's bus-master reads ... */
6458
6459 /* Runtime instructions (first block of data in file) */
6460 src = &ucode->data[0];
6461 len = priv->ucode_code.len;
6462 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6463 memcpy(priv->ucode_code.v_addr, src, len);
6464 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6465 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6466
6467 /* Runtime data (2nd block)
6468 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
6469 src = &ucode->data[inst_size];
6470 len = priv->ucode_data.len;
6471 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6472 memcpy(priv->ucode_data.v_addr, src, len);
6473 memcpy(priv->ucode_data_backup.v_addr, src, len);
6474
6475 /* Initialization instructions (3rd block) */
6476 if (init_size) {
6477 src = &ucode->data[inst_size + data_size];
6478 len = priv->ucode_init.len;
6479 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6480 len);
6481 memcpy(priv->ucode_init.v_addr, src, len);
6482 }
6483
6484 /* Initialization data (4th block) */
6485 if (init_data_size) {
6486 src = &ucode->data[inst_size + data_size + init_size];
6487 len = priv->ucode_init_data.len;
6488 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6489 len);
6490 memcpy(priv->ucode_init_data.v_addr, src, len);
6491 }
6492
6493 /* Bootstrap instructions (5th block) */
6494 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6495 len = priv->ucode_boot.len;
6496 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
6497 memcpy(priv->ucode_boot.v_addr, src, len);
6498
6499 /* We have our copies now, allow OS release its copies */
6500 release_firmware(ucode_raw);
6501 return 0;
6502
6503 err_pci_alloc:
6504 IWL_ERROR("failed to allocate pci memory\n");
6505 ret = -ENOMEM;
6506 iwl4965_dealloc_ucode_pci(priv);
6507
6508 err_release:
6509 release_firmware(ucode_raw);
6510
6511 error:
6512 return ret;
6513 }
6514
6515
6516 /**
6517 * iwl4965_set_ucode_ptrs - Set uCode address location
6518 *
6519 * Tell initialization uCode where to find runtime uCode.
6520 *
6521 * BSM registers initially contain pointers to initialization uCode.
6522 * We need to replace them to load runtime uCode inst and data,
6523 * and to save runtime data when powering down.
6524 */
6525 static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
6526 {
6527 dma_addr_t pinst;
6528 dma_addr_t pdata;
6529 int rc = 0;
6530 unsigned long flags;
6531
6532 /* bits 35:4 for 4965 */
6533 pinst = priv->ucode_code.p_addr >> 4;
6534 pdata = priv->ucode_data_backup.p_addr >> 4;
6535
6536 spin_lock_irqsave(&priv->lock, flags);
6537 rc = iwl4965_grab_nic_access(priv);
6538 if (rc) {
6539 spin_unlock_irqrestore(&priv->lock, flags);
6540 return rc;
6541 }
6542
6543 /* Tell bootstrap uCode where to find image to load */
6544 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6545 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6546 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6547 priv->ucode_data.len);
6548
6549 /* Inst bytecount must be last to set up, bit 31 signals uCode
6550 * that all new ptr/size info is in place */
6551 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6552 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6553
6554 iwl4965_release_nic_access(priv);
6555
6556 spin_unlock_irqrestore(&priv->lock, flags);
6557
6558 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6559
6560 return rc;
6561 }
6562
6563 /**
6564 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
6565 *
6566 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6567 *
6568 * The 4965 "initialize" ALIVE reply contains calibration data for:
6569 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6570 * (3945 does not contain this data).
6571 *
6572 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6573 */
6574 static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
6575 {
6576 /* Check alive response for "valid" sign from uCode */
6577 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6578 /* We had an error bringing up the hardware, so take it
6579 * all the way back down so we can try again */
6580 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6581 goto restart;
6582 }
6583
6584 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6585 * This is a paranoid check, because we would not have gotten the
6586 * "initialize" alive if code weren't properly loaded. */
6587 if (iwl4965_verify_ucode(priv)) {
6588 /* Runtime instruction load was bad;
6589 * take it all the way back down so we can try again */
6590 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6591 goto restart;
6592 }
6593
6594 /* Calculate temperature */
6595 priv->temperature = iwl4965_get_temperature(priv);
6596
6597 /* Send pointers to protocol/runtime uCode image ... init code will
6598 * load and launch runtime uCode, which will send us another "Alive"
6599 * notification. */
6600 IWL_DEBUG_INFO("Initialization Alive received.\n");
6601 if (iwl4965_set_ucode_ptrs(priv)) {
6602 /* Runtime instruction load won't happen;
6603 * take it all the way back down so we can try again */
6604 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6605 goto restart;
6606 }
6607 return;
6608
6609 restart:
6610 queue_work(priv->workqueue, &priv->restart);
6611 }
6612
6613
6614 /**
6615 * iwl4965_alive_start - called after REPLY_ALIVE notification received
6616 * from protocol/runtime uCode (initialization uCode's
6617 * Alive gets handled by iwl4965_init_alive_start()).
6618 */
6619 static void iwl4965_alive_start(struct iwl4965_priv *priv)
6620 {
6621 int rc = 0;
6622
6623 IWL_DEBUG_INFO("Runtime Alive received.\n");
6624
6625 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6626 /* We had an error bringing up the hardware, so take it
6627 * all the way back down so we can try again */
6628 IWL_DEBUG_INFO("Alive failed.\n");
6629 goto restart;
6630 }
6631
6632 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6633 * This is a paranoid check, because we would not have gotten the
6634 * "runtime" alive if code weren't properly loaded. */
6635 if (iwl4965_verify_ucode(priv)) {
6636 /* Runtime instruction load was bad;
6637 * take it all the way back down so we can try again */
6638 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6639 goto restart;
6640 }
6641
6642 iwl4965_clear_stations_table(priv);
6643
6644 rc = iwl4965_alive_notify(priv);
6645 if (rc) {
6646 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6647 rc);
6648 goto restart;
6649 }
6650
6651 /* After the ALIVE response, we can send host commands to 4965 uCode */
6652 set_bit(STATUS_ALIVE, &priv->status);
6653
6654 /* Clear out the uCode error bit if it is set */
6655 clear_bit(STATUS_FW_ERROR, &priv->status);
6656
6657 rc = iwl4965_init_channel_map(priv);
6658 if (rc) {
6659 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6660 return;
6661 }
6662
6663 iwl4965_init_geos(priv);
6664
6665 if (iwl4965_is_rfkill(priv))
6666 return;
6667
6668 if (!priv->mac80211_registered) {
6669 /* Unlock so any user space entry points can call back into
6670 * the driver without a deadlock... */
6671 mutex_unlock(&priv->mutex);
6672 iwl4965_rate_control_register(priv->hw);
6673 rc = ieee80211_register_hw(priv->hw);
6674 priv->hw->conf.beacon_int = 100;
6675 mutex_lock(&priv->mutex);
6676
6677 if (rc) {
6678 iwl4965_rate_control_unregister(priv->hw);
6679 IWL_ERROR("Failed to register network "
6680 "device (error %d)\n", rc);
6681 return;
6682 }
6683
6684 priv->mac80211_registered = 1;
6685
6686 iwl4965_reset_channel_flag(priv);
6687 } else
6688 ieee80211_start_queues(priv->hw);
6689
6690 priv->active_rate = priv->rates_mask;
6691 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6692
6693 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6694
6695 if (iwl4965_is_associated(priv)) {
6696 struct iwl4965_rxon_cmd *active_rxon =
6697 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
6698
6699 memcpy(&priv->staging_rxon, &priv->active_rxon,
6700 sizeof(priv->staging_rxon));
6701 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6702 } else {
6703 /* Initialize our rx_config data */
6704 iwl4965_connection_init_rx_config(priv);
6705 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6706 }
6707
6708 /* Configure Bluetooth device coexistence support */
6709 iwl4965_send_bt_config(priv);
6710
6711 /* Configure the adapter for unassociated operation */
6712 iwl4965_commit_rxon(priv);
6713
6714 /* At this point, the NIC is initialized and operational */
6715 priv->notif_missed_beacons = 0;
6716 set_bit(STATUS_READY, &priv->status);
6717
6718 iwl4965_rf_kill_ct_config(priv);
6719 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6720
6721 if (priv->error_recovering)
6722 iwl4965_error_recovery(priv);
6723
6724 return;
6725
6726 restart:
6727 queue_work(priv->workqueue, &priv->restart);
6728 }
6729
6730 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
6731
6732 static void __iwl4965_down(struct iwl4965_priv *priv)
6733 {
6734 unsigned long flags;
6735 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6736 struct ieee80211_conf *conf = NULL;
6737
6738 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6739
6740 conf = ieee80211_get_hw_conf(priv->hw);
6741
6742 if (!exit_pending)
6743 set_bit(STATUS_EXIT_PENDING, &priv->status);
6744
6745 iwl4965_clear_stations_table(priv);
6746
6747 /* Unblock any waiting calls */
6748 wake_up_interruptible_all(&priv->wait_command_queue);
6749
6750 /* Wipe out the EXIT_PENDING status bit if we are not actually
6751 * exiting the module */
6752 if (!exit_pending)
6753 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6754
6755 /* stop and reset the on-board processor */
6756 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6757
6758 /* tell the device to stop sending interrupts */
6759 iwl4965_disable_interrupts(priv);
6760
6761 if (priv->mac80211_registered)
6762 ieee80211_stop_queues(priv->hw);
6763
6764 /* If we have not previously called iwl4965_init() then
6765 * clear all bits but the RF Kill and SUSPEND bits and return */
6766 if (!iwl4965_is_init(priv)) {
6767 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6768 STATUS_RF_KILL_HW |
6769 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6770 STATUS_RF_KILL_SW |
6771 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6772 STATUS_IN_SUSPEND;
6773 goto exit;
6774 }
6775
6776 /* ...otherwise clear out all the status bits but the RF Kill and
6777 * SUSPEND bits and continue taking the NIC down. */
6778 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6779 STATUS_RF_KILL_HW |
6780 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6781 STATUS_RF_KILL_SW |
6782 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6783 STATUS_IN_SUSPEND |
6784 test_bit(STATUS_FW_ERROR, &priv->status) <<
6785 STATUS_FW_ERROR;
6786
6787 spin_lock_irqsave(&priv->lock, flags);
6788 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6789 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6790 spin_unlock_irqrestore(&priv->lock, flags);
6791
6792 iwl4965_hw_txq_ctx_stop(priv);
6793 iwl4965_hw_rxq_stop(priv);
6794
6795 spin_lock_irqsave(&priv->lock, flags);
6796 if (!iwl4965_grab_nic_access(priv)) {
6797 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
6798 APMG_CLK_VAL_DMA_CLK_RQT);
6799 iwl4965_release_nic_access(priv);
6800 }
6801 spin_unlock_irqrestore(&priv->lock, flags);
6802
6803 udelay(5);
6804
6805 iwl4965_hw_nic_stop_master(priv);
6806 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6807 iwl4965_hw_nic_reset(priv);
6808
6809 exit:
6810 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
6811
6812 if (priv->ibss_beacon)
6813 dev_kfree_skb(priv->ibss_beacon);
6814 priv->ibss_beacon = NULL;
6815
6816 /* clear out any free frames */
6817 iwl4965_clear_free_frames(priv);
6818 }
6819
6820 static void iwl4965_down(struct iwl4965_priv *priv)
6821 {
6822 mutex_lock(&priv->mutex);
6823 __iwl4965_down(priv);
6824 mutex_unlock(&priv->mutex);
6825
6826 iwl4965_cancel_deferred_work(priv);
6827 }
6828
6829 #define MAX_HW_RESTARTS 5
6830
6831 static int __iwl4965_up(struct iwl4965_priv *priv)
6832 {
6833 DECLARE_MAC_BUF(mac);
6834 int rc, i;
6835 u32 hw_rf_kill = 0;
6836
6837 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6838 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6839 return -EIO;
6840 }
6841
6842 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6843 IWL_WARNING("Radio disabled by SW RF kill (module "
6844 "parameter)\n");
6845 return 0;
6846 }
6847
6848 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6849 IWL_ERROR("ucode not available for device bringup\n");
6850 return -EIO;
6851 }
6852
6853 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6854
6855 rc = iwl4965_hw_nic_init(priv);
6856 if (rc) {
6857 IWL_ERROR("Unable to int nic\n");
6858 return rc;
6859 }
6860
6861 /* make sure rfkill handshake bits are cleared */
6862 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6863 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6864 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6865
6866 /* clear (again), then enable host interrupts */
6867 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6868 iwl4965_enable_interrupts(priv);
6869
6870 /* really make sure rfkill handshake bits are cleared */
6871 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6872 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6873
6874 /* Copy original ucode data image from disk into backup cache.
6875 * This will be used to initialize the on-board processor's
6876 * data SRAM for a clean start when the runtime program first loads. */
6877 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6878 priv->ucode_data.len);
6879
6880 /* If platform's RF_KILL switch is set to KILL,
6881 * wait for BIT_INT_RF_KILL interrupt before loading uCode
6882 * and getting things started */
6883 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
6884 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
6885 hw_rf_kill = 1;
6886
6887 if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
6888 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6889 return 0;
6890 }
6891
6892 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6893
6894 iwl4965_clear_stations_table(priv);
6895
6896 /* load bootstrap state machine,
6897 * load bootstrap program into processor's memory,
6898 * prepare to load the "initialize" uCode */
6899 rc = iwl4965_load_bsm(priv);
6900
6901 if (rc) {
6902 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6903 continue;
6904 }
6905
6906 /* start card; "initialize" will load runtime ucode */
6907 iwl4965_nic_start(priv);
6908
6909 /* MAC Address location in EEPROM is same for 3945/4965 */
6910 get_eeprom_mac(priv, priv->mac_addr);
6911 IWL_DEBUG_INFO("MAC address: %s\n",
6912 print_mac(mac, priv->mac_addr));
6913
6914 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
6915
6916 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6917
6918 return 0;
6919 }
6920
6921 set_bit(STATUS_EXIT_PENDING, &priv->status);
6922 __iwl4965_down(priv);
6923
6924 /* tried to restart and config the device for as long as our
6925 * patience could withstand */
6926 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6927 return -EIO;
6928 }
6929
6930
6931 /*****************************************************************************
6932 *
6933 * Workqueue callbacks
6934 *
6935 *****************************************************************************/
6936
6937 static void iwl4965_bg_init_alive_start(struct work_struct *data)
6938 {
6939 struct iwl4965_priv *priv =
6940 container_of(data, struct iwl4965_priv, init_alive_start.work);
6941
6942 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6943 return;
6944
6945 mutex_lock(&priv->mutex);
6946 iwl4965_init_alive_start(priv);
6947 mutex_unlock(&priv->mutex);
6948 }
6949
6950 static void iwl4965_bg_alive_start(struct work_struct *data)
6951 {
6952 struct iwl4965_priv *priv =
6953 container_of(data, struct iwl4965_priv, alive_start.work);
6954
6955 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6956 return;
6957
6958 mutex_lock(&priv->mutex);
6959 iwl4965_alive_start(priv);
6960 mutex_unlock(&priv->mutex);
6961 }
6962
6963 static void iwl4965_bg_rf_kill(struct work_struct *work)
6964 {
6965 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
6966
6967 wake_up_interruptible(&priv->wait_command_queue);
6968
6969 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6970 return;
6971
6972 mutex_lock(&priv->mutex);
6973
6974 if (!iwl4965_is_rfkill(priv)) {
6975 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6976 "HW and/or SW RF Kill no longer active, restarting "
6977 "device\n");
6978 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6979 queue_work(priv->workqueue, &priv->restart);
6980 } else {
6981
6982 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6983 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6984 "disabled by SW switch\n");
6985 else
6986 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6987 "Kill switch must be turned off for "
6988 "wireless networking to work.\n");
6989 }
6990 mutex_unlock(&priv->mutex);
6991 }
6992
6993 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6994
6995 static void iwl4965_bg_scan_check(struct work_struct *data)
6996 {
6997 struct iwl4965_priv *priv =
6998 container_of(data, struct iwl4965_priv, scan_check.work);
6999
7000 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7001 return;
7002
7003 mutex_lock(&priv->mutex);
7004 if (test_bit(STATUS_SCANNING, &priv->status) ||
7005 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
7006 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
7007 "Scan completion watchdog resetting adapter (%dms)\n",
7008 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
7009
7010 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
7011 iwl4965_send_scan_abort(priv);
7012 }
7013 mutex_unlock(&priv->mutex);
7014 }
7015
7016 static void iwl4965_bg_request_scan(struct work_struct *data)
7017 {
7018 struct iwl4965_priv *priv =
7019 container_of(data, struct iwl4965_priv, request_scan);
7020 struct iwl4965_host_cmd cmd = {
7021 .id = REPLY_SCAN_CMD,
7022 .len = sizeof(struct iwl4965_scan_cmd),
7023 .meta.flags = CMD_SIZE_HUGE,
7024 };
7025 int rc = 0;
7026 struct iwl4965_scan_cmd *scan;
7027 struct ieee80211_conf *conf = NULL;
7028 u8 direct_mask;
7029 int phymode;
7030
7031 conf = ieee80211_get_hw_conf(priv->hw);
7032
7033 mutex_lock(&priv->mutex);
7034
7035 if (!iwl4965_is_ready(priv)) {
7036 IWL_WARNING("request scan called when driver not ready.\n");
7037 goto done;
7038 }
7039
7040 /* Make sure the scan wasn't cancelled before this queued work
7041 * was given the chance to run... */
7042 if (!test_bit(STATUS_SCANNING, &priv->status))
7043 goto done;
7044
7045 /* This should never be called or scheduled if there is currently
7046 * a scan active in the hardware. */
7047 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
7048 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
7049 "Ignoring second request.\n");
7050 rc = -EIO;
7051 goto done;
7052 }
7053
7054 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
7055 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
7056 goto done;
7057 }
7058
7059 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
7060 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
7061 goto done;
7062 }
7063
7064 if (iwl4965_is_rfkill(priv)) {
7065 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
7066 goto done;
7067 }
7068
7069 if (!test_bit(STATUS_READY, &priv->status)) {
7070 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
7071 goto done;
7072 }
7073
7074 if (!priv->scan_bands) {
7075 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
7076 goto done;
7077 }
7078
7079 if (!priv->scan) {
7080 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
7081 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
7082 if (!priv->scan) {
7083 rc = -ENOMEM;
7084 goto done;
7085 }
7086 }
7087 scan = priv->scan;
7088 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
7089
7090 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
7091 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
7092
7093 if (iwl4965_is_associated(priv)) {
7094 u16 interval = 0;
7095 u32 extra;
7096 u32 suspend_time = 100;
7097 u32 scan_suspend_time = 100;
7098 unsigned long flags;
7099
7100 IWL_DEBUG_INFO("Scanning while associated...\n");
7101
7102 spin_lock_irqsave(&priv->lock, flags);
7103 interval = priv->beacon_int;
7104 spin_unlock_irqrestore(&priv->lock, flags);
7105
7106 scan->suspend_time = 0;
7107 scan->max_out_time = cpu_to_le32(200 * 1024);
7108 if (!interval)
7109 interval = suspend_time;
7110
7111 extra = (suspend_time / interval) << 22;
7112 scan_suspend_time = (extra |
7113 ((suspend_time % interval) * 1024));
7114 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7115 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7116 scan_suspend_time, interval);
7117 }
7118
7119 /* We should add the ability for user to lock to PASSIVE ONLY */
7120 if (priv->one_direct_scan) {
7121 IWL_DEBUG_SCAN
7122 ("Kicking off one direct scan for '%s'\n",
7123 iwl4965_escape_essid(priv->direct_ssid,
7124 priv->direct_ssid_len));
7125 scan->direct_scan[0].id = WLAN_EID_SSID;
7126 scan->direct_scan[0].len = priv->direct_ssid_len;
7127 memcpy(scan->direct_scan[0].ssid,
7128 priv->direct_ssid, priv->direct_ssid_len);
7129 direct_mask = 1;
7130 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
7131 scan->direct_scan[0].id = WLAN_EID_SSID;
7132 scan->direct_scan[0].len = priv->essid_len;
7133 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7134 direct_mask = 1;
7135 } else
7136 direct_mask = 0;
7137
7138 /* We don't build a direct scan probe request; the uCode will do
7139 * that based on the direct_mask added to each channel entry */
7140 scan->tx_cmd.len = cpu_to_le16(
7141 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
7142 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
7143 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7144 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7145 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7146
7147 /* flags + rate selection */
7148
7149 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7150
7151 switch (priv->scan_bands) {
7152 case 2:
7153 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7154 scan->tx_cmd.rate_n_flags =
7155 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
7156 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7157
7158 scan->good_CRC_th = 0;
7159 phymode = MODE_IEEE80211G;
7160 break;
7161
7162 case 1:
7163 scan->tx_cmd.rate_n_flags =
7164 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
7165 RATE_MCS_ANT_B_MSK);
7166 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7167 phymode = MODE_IEEE80211A;
7168 break;
7169
7170 default:
7171 IWL_WARNING("Invalid scan band count\n");
7172 goto done;
7173 }
7174
7175 /* select Rx chains */
7176
7177 /* Force use of chains B and C (0x6) for scan Rx.
7178 * Avoid A (0x1) because of its off-channel reception on A-band.
7179 * MIMO is not used here, but value is required to make uCode happy. */
7180 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7181 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7182 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7183 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7184
7185 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7186 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7187
7188 if (direct_mask)
7189 IWL_DEBUG_SCAN
7190 ("Initiating direct scan for %s.\n",
7191 iwl4965_escape_essid(priv->essid, priv->essid_len));
7192 else
7193 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7194
7195 scan->channel_count =
7196 iwl4965_get_channels_for_scan(
7197 priv, phymode, 1, /* active */
7198 direct_mask,
7199 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7200
7201 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
7202 scan->channel_count * sizeof(struct iwl4965_scan_channel);
7203 cmd.data = scan;
7204 scan->len = cpu_to_le16(cmd.len);
7205
7206 set_bit(STATUS_SCAN_HW, &priv->status);
7207 rc = iwl4965_send_cmd_sync(priv, &cmd);
7208 if (rc)
7209 goto done;
7210
7211 queue_delayed_work(priv->workqueue, &priv->scan_check,
7212 IWL_SCAN_CHECK_WATCHDOG);
7213
7214 mutex_unlock(&priv->mutex);
7215 return;
7216
7217 done:
7218 /* inform mac80211 scan aborted */
7219 queue_work(priv->workqueue, &priv->scan_completed);
7220 mutex_unlock(&priv->mutex);
7221 }
7222
7223 static void iwl4965_bg_up(struct work_struct *data)
7224 {
7225 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
7226
7227 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7228 return;
7229
7230 mutex_lock(&priv->mutex);
7231 __iwl4965_up(priv);
7232 mutex_unlock(&priv->mutex);
7233 }
7234
7235 static void iwl4965_bg_restart(struct work_struct *data)
7236 {
7237 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
7238
7239 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7240 return;
7241
7242 iwl4965_down(priv);
7243 queue_work(priv->workqueue, &priv->up);
7244 }
7245
7246 static void iwl4965_bg_rx_replenish(struct work_struct *data)
7247 {
7248 struct iwl4965_priv *priv =
7249 container_of(data, struct iwl4965_priv, rx_replenish);
7250
7251 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7252 return;
7253
7254 mutex_lock(&priv->mutex);
7255 iwl4965_rx_replenish(priv);
7256 mutex_unlock(&priv->mutex);
7257 }
7258
7259 #define IWL_DELAY_NEXT_SCAN (HZ*2)
7260
7261 static void iwl4965_bg_post_associate(struct work_struct *data)
7262 {
7263 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
7264 post_associate.work);
7265
7266 int rc = 0;
7267 struct ieee80211_conf *conf = NULL;
7268 DECLARE_MAC_BUF(mac);
7269
7270 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7271 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7272 return;
7273 }
7274
7275 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7276 priv->assoc_id,
7277 print_mac(mac, priv->active_rxon.bssid_addr));
7278
7279
7280 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7281 return;
7282
7283 mutex_lock(&priv->mutex);
7284
7285 if (!priv->interface_id || !priv->is_open) {
7286 mutex_unlock(&priv->mutex);
7287 return;
7288 }
7289 iwl4965_scan_cancel_timeout(priv, 200);
7290
7291 conf = ieee80211_get_hw_conf(priv->hw);
7292
7293 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7294 iwl4965_commit_rxon(priv);
7295
7296 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7297 iwl4965_setup_rxon_timing(priv);
7298 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7299 sizeof(priv->rxon_timing), &priv->rxon_timing);
7300 if (rc)
7301 IWL_WARNING("REPLY_RXON_TIMING failed - "
7302 "Attempting to continue.\n");
7303
7304 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7305
7306 #ifdef CONFIG_IWL4965_HT
7307 if (priv->current_ht_config.is_ht)
7308 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
7309 #endif /* CONFIG_IWL4965_HT*/
7310 iwl4965_set_rxon_chain(priv);
7311 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7312
7313 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7314 priv->assoc_id, priv->beacon_int);
7315
7316 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7317 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7318 else
7319 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7320
7321 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7322 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7323 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7324 else
7325 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7326
7327 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7328 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7329
7330 }
7331
7332 iwl4965_commit_rxon(priv);
7333
7334 switch (priv->iw_mode) {
7335 case IEEE80211_IF_TYPE_STA:
7336 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
7337 break;
7338
7339 case IEEE80211_IF_TYPE_IBSS:
7340
7341 /* clear out the station table */
7342 iwl4965_clear_stations_table(priv);
7343
7344 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7345 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7346 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7347 iwl4965_send_beacon_cmd(priv);
7348
7349 break;
7350
7351 default:
7352 IWL_ERROR("%s Should not be called in %d mode\n",
7353 __FUNCTION__, priv->iw_mode);
7354 break;
7355 }
7356
7357 iwl4965_sequence_reset(priv);
7358
7359 #ifdef CONFIG_IWL4965_SENSITIVITY
7360 /* Enable Rx differential gain and sensitivity calibrations */
7361 iwl4965_chain_noise_reset(priv);
7362 priv->start_calib = 1;
7363 #endif /* CONFIG_IWL4965_SENSITIVITY */
7364
7365 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7366 priv->assoc_station_added = 1;
7367
7368 #ifdef CONFIG_IWL4965_QOS
7369 iwl4965_activate_qos(priv, 0);
7370 #endif /* CONFIG_IWL4965_QOS */
7371 /* we have just associated, don't start scan too early */
7372 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
7373 mutex_unlock(&priv->mutex);
7374 }
7375
7376 static void iwl4965_bg_abort_scan(struct work_struct *work)
7377 {
7378 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
7379
7380 if (!iwl4965_is_ready(priv))
7381 return;
7382
7383 mutex_lock(&priv->mutex);
7384
7385 set_bit(STATUS_SCAN_ABORTING, &priv->status);
7386 iwl4965_send_scan_abort(priv);
7387
7388 mutex_unlock(&priv->mutex);
7389 }
7390
7391 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7392
7393 static void iwl4965_bg_scan_completed(struct work_struct *work)
7394 {
7395 struct iwl4965_priv *priv =
7396 container_of(work, struct iwl4965_priv, scan_completed);
7397
7398 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7399
7400 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7401 return;
7402
7403 if (priv->cache_conf)
7404 iwl4965_mac_config(priv->hw, priv->cache_conf);
7405
7406 ieee80211_scan_completed(priv->hw);
7407
7408 /* Since setting the TXPOWER may have been deferred while
7409 * performing the scan, fire one off */
7410 mutex_lock(&priv->mutex);
7411 iwl4965_hw_reg_send_txpower(priv);
7412 mutex_unlock(&priv->mutex);
7413 }
7414
7415 /*****************************************************************************
7416 *
7417 * mac80211 entry point functions
7418 *
7419 *****************************************************************************/
7420
7421 static int iwl4965_mac_start(struct ieee80211_hw *hw)
7422 {
7423 struct iwl4965_priv *priv = hw->priv;
7424
7425 IWL_DEBUG_MAC80211("enter\n");
7426
7427 /* we should be verifying the device is ready to be opened */
7428 mutex_lock(&priv->mutex);
7429
7430 priv->is_open = 1;
7431
7432 if (!iwl4965_is_rfkill(priv))
7433 ieee80211_start_queues(priv->hw);
7434
7435 mutex_unlock(&priv->mutex);
7436 IWL_DEBUG_MAC80211("leave\n");
7437 return 0;
7438 }
7439
7440 static void iwl4965_mac_stop(struct ieee80211_hw *hw)
7441 {
7442 struct iwl4965_priv *priv = hw->priv;
7443
7444 IWL_DEBUG_MAC80211("enter\n");
7445
7446
7447 mutex_lock(&priv->mutex);
7448 /* stop mac, cancel any scan request and clear
7449 * RXON_FILTER_ASSOC_MSK BIT
7450 */
7451 priv->is_open = 0;
7452 if (!iwl4965_is_ready_rf(priv)) {
7453 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7454 mutex_unlock(&priv->mutex);
7455 return;
7456 }
7457
7458 iwl4965_scan_cancel_timeout(priv, 100);
7459 cancel_delayed_work(&priv->post_associate);
7460 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7461 iwl4965_commit_rxon(priv);
7462 mutex_unlock(&priv->mutex);
7463
7464 IWL_DEBUG_MAC80211("leave\n");
7465 }
7466
7467 static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7468 struct ieee80211_tx_control *ctl)
7469 {
7470 struct iwl4965_priv *priv = hw->priv;
7471
7472 IWL_DEBUG_MAC80211("enter\n");
7473
7474 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7475 IWL_DEBUG_MAC80211("leave - monitor\n");
7476 return -1;
7477 }
7478
7479 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7480 ctl->tx_rate);
7481
7482 if (iwl4965_tx_skb(priv, skb, ctl))
7483 dev_kfree_skb_any(skb);
7484
7485 IWL_DEBUG_MAC80211("leave\n");
7486 return 0;
7487 }
7488
7489 static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
7490 struct ieee80211_if_init_conf *conf)
7491 {
7492 struct iwl4965_priv *priv = hw->priv;
7493 unsigned long flags;
7494 DECLARE_MAC_BUF(mac);
7495
7496 IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
7497
7498 if (priv->interface_id) {
7499 IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
7500 return 0;
7501 }
7502
7503 spin_lock_irqsave(&priv->lock, flags);
7504 priv->interface_id = conf->if_id;
7505
7506 spin_unlock_irqrestore(&priv->lock, flags);
7507
7508 mutex_lock(&priv->mutex);
7509
7510 if (conf->mac_addr) {
7511 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7512 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7513 }
7514 iwl4965_set_mode(priv, conf->type);
7515
7516 IWL_DEBUG_MAC80211("leave\n");
7517 mutex_unlock(&priv->mutex);
7518
7519 return 0;
7520 }
7521
7522 /**
7523 * iwl4965_mac_config - mac80211 config callback
7524 *
7525 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7526 * be set inappropriately and the driver currently sets the hardware up to
7527 * use it whenever needed.
7528 */
7529 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7530 {
7531 struct iwl4965_priv *priv = hw->priv;
7532 const struct iwl4965_channel_info *ch_info;
7533 unsigned long flags;
7534 int ret = 0;
7535
7536 mutex_lock(&priv->mutex);
7537 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7538
7539 if (!iwl4965_is_ready(priv)) {
7540 IWL_DEBUG_MAC80211("leave - not ready\n");
7541 ret = -EIO;
7542 goto out;
7543 }
7544
7545 /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
7546 * what is exposed through include/ declarations */
7547 if (unlikely(!iwl4965_param_disable_hw_scan &&
7548 test_bit(STATUS_SCANNING, &priv->status))) {
7549
7550 if (unlikely(priv->cache_conf))
7551 IWL_DEBUG_MAC80211("leave - still scanning\n");
7552 else {
7553 /* Cache the configuration now so that we can
7554 * replay it after the hardware scan is finished. */
7555 priv->cache_conf = kmalloc(sizeof(*conf), GFP_KERNEL);
7556 if (priv->cache_conf) {
7557 memcpy(priv->cache_conf, conf, sizeof(*conf));
7558 IWL_DEBUG_MAC80211("leave - scanning\n");
7559 } else {
7560 IWL_DEBUG_MAC80211("leave - no memory\n");
7561 ret = -ENOMEM;
7562 }
7563 }
7564 mutex_unlock(&priv->mutex);
7565 return ret;
7566 }
7567
7568 spin_lock_irqsave(&priv->lock, flags);
7569
7570 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
7571 if (!is_channel_valid(ch_info)) {
7572 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7573 conf->channel, conf->phymode);
7574 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7575 spin_unlock_irqrestore(&priv->lock, flags);
7576 ret = -EINVAL;
7577 goto out;
7578 }
7579
7580 #ifdef CONFIG_IWL4965_HT
7581 /* if we are switching fron ht to 2.4 clear flags
7582 * from any ht related info since 2.4 does not
7583 * support ht */
7584 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7585 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7586 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7587 #endif
7588 )
7589 priv->staging_rxon.flags = 0;
7590 #endif /* CONFIG_IWL4965_HT */
7591
7592 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
7593
7594 iwl4965_set_flags_for_phymode(priv, conf->phymode);
7595
7596 /* The list of supported rates and rate mask can be different
7597 * for each phymode; since the phymode may have changed, reset
7598 * the rate mask to what mac80211 lists */
7599 iwl4965_set_rate(priv);
7600
7601 spin_unlock_irqrestore(&priv->lock, flags);
7602
7603 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7604 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7605 iwl4965_hw_channel_switch(priv, conf->channel);
7606 goto out;
7607 }
7608 #endif
7609
7610 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
7611
7612 if (!conf->radio_enabled) {
7613 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7614 goto out;
7615 }
7616
7617 if (iwl4965_is_rfkill(priv)) {
7618 IWL_DEBUG_MAC80211("leave - RF kill\n");
7619 ret = -EIO;
7620 goto out;
7621 }
7622
7623 iwl4965_set_rate(priv);
7624
7625 if (memcmp(&priv->active_rxon,
7626 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7627 iwl4965_commit_rxon(priv);
7628 else
7629 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7630
7631 IWL_DEBUG_MAC80211("leave\n");
7632
7633 out:
7634 if (priv->cache_conf) {
7635 kfree(priv->cache_conf);
7636 priv->cache_conf = NULL;
7637 }
7638 mutex_unlock(&priv->mutex);
7639 return ret;
7640 }
7641
7642 static void iwl4965_config_ap(struct iwl4965_priv *priv)
7643 {
7644 int rc = 0;
7645
7646 if (priv->status & STATUS_EXIT_PENDING)
7647 return;
7648
7649 /* The following should be done only at AP bring up */
7650 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7651
7652 /* RXON - unassoc (to set timing command) */
7653 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7654 iwl4965_commit_rxon(priv);
7655
7656 /* RXON Timing */
7657 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7658 iwl4965_setup_rxon_timing(priv);
7659 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7660 sizeof(priv->rxon_timing), &priv->rxon_timing);
7661 if (rc)
7662 IWL_WARNING("REPLY_RXON_TIMING failed - "
7663 "Attempting to continue.\n");
7664
7665 iwl4965_set_rxon_chain(priv);
7666
7667 /* FIXME: what should be the assoc_id for AP? */
7668 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7669 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7670 priv->staging_rxon.flags |=
7671 RXON_FLG_SHORT_PREAMBLE_MSK;
7672 else
7673 priv->staging_rxon.flags &=
7674 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7675
7676 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7677 if (priv->assoc_capability &
7678 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7679 priv->staging_rxon.flags |=
7680 RXON_FLG_SHORT_SLOT_MSK;
7681 else
7682 priv->staging_rxon.flags &=
7683 ~RXON_FLG_SHORT_SLOT_MSK;
7684
7685 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7686 priv->staging_rxon.flags &=
7687 ~RXON_FLG_SHORT_SLOT_MSK;
7688 }
7689 /* restore RXON assoc */
7690 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7691 iwl4965_commit_rxon(priv);
7692 #ifdef CONFIG_IWL4965_QOS
7693 iwl4965_activate_qos(priv, 1);
7694 #endif
7695 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7696 }
7697 iwl4965_send_beacon_cmd(priv);
7698
7699 /* FIXME - we need to add code here to detect a totally new
7700 * configuration, reset the AP, unassoc, rxon timing, assoc,
7701 * clear sta table, add BCAST sta... */
7702 }
7703
7704 static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
7705 struct ieee80211_if_conf *conf)
7706 {
7707 struct iwl4965_priv *priv = hw->priv;
7708 DECLARE_MAC_BUF(mac);
7709 unsigned long flags;
7710 int rc;
7711
7712 if (conf == NULL)
7713 return -EIO;
7714
7715 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7716 (!conf->beacon || !conf->ssid_len)) {
7717 IWL_DEBUG_MAC80211
7718 ("Leaving in AP mode because HostAPD is not ready.\n");
7719 return 0;
7720 }
7721
7722 mutex_lock(&priv->mutex);
7723
7724 IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7725 if (conf->bssid)
7726 IWL_DEBUG_MAC80211("bssid: %s\n",
7727 print_mac(mac, conf->bssid));
7728
7729 /*
7730 * very dubious code was here; the probe filtering flag is never set:
7731 *
7732 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7733 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7734 */
7735 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7736 IWL_DEBUG_MAC80211("leave - scanning\n");
7737 mutex_unlock(&priv->mutex);
7738 return 0;
7739 }
7740
7741 if (priv->interface_id != if_id) {
7742 IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7743 mutex_unlock(&priv->mutex);
7744 return 0;
7745 }
7746
7747 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7748 if (!conf->bssid) {
7749 conf->bssid = priv->mac_addr;
7750 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7751 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7752 print_mac(mac, conf->bssid));
7753 }
7754 if (priv->ibss_beacon)
7755 dev_kfree_skb(priv->ibss_beacon);
7756
7757 priv->ibss_beacon = conf->beacon;
7758 }
7759
7760 if (iwl4965_is_rfkill(priv))
7761 goto done;
7762
7763 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7764 !is_multicast_ether_addr(conf->bssid)) {
7765 /* If there is currently a HW scan going on in the background
7766 * then we need to cancel it else the RXON below will fail. */
7767 if (iwl4965_scan_cancel_timeout(priv, 100)) {
7768 IWL_WARNING("Aborted scan still in progress "
7769 "after 100ms\n");
7770 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7771 mutex_unlock(&priv->mutex);
7772 return -EAGAIN;
7773 }
7774 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7775
7776 /* TODO: Audit driver for usage of these members and see
7777 * if mac80211 deprecates them (priv->bssid looks like it
7778 * shouldn't be there, but I haven't scanned the IBSS code
7779 * to verify) - jpk */
7780 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7781
7782 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7783 iwl4965_config_ap(priv);
7784 else {
7785 rc = iwl4965_commit_rxon(priv);
7786 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7787 iwl4965_rxon_add_station(
7788 priv, priv->active_rxon.bssid_addr, 1);
7789 }
7790
7791 } else {
7792 iwl4965_scan_cancel_timeout(priv, 100);
7793 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7794 iwl4965_commit_rxon(priv);
7795 }
7796
7797 done:
7798 spin_lock_irqsave(&priv->lock, flags);
7799 if (!conf->ssid_len)
7800 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7801 else
7802 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7803
7804 priv->essid_len = conf->ssid_len;
7805 spin_unlock_irqrestore(&priv->lock, flags);
7806
7807 IWL_DEBUG_MAC80211("leave\n");
7808 mutex_unlock(&priv->mutex);
7809
7810 return 0;
7811 }
7812
7813 static void iwl4965_configure_filter(struct ieee80211_hw *hw,
7814 unsigned int changed_flags,
7815 unsigned int *total_flags,
7816 int mc_count, struct dev_addr_list *mc_list)
7817 {
7818 /*
7819 * XXX: dummy
7820 * see also iwl4965_connection_init_rx_config
7821 */
7822 *total_flags = 0;
7823 }
7824
7825 static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
7826 struct ieee80211_if_init_conf *conf)
7827 {
7828 struct iwl4965_priv *priv = hw->priv;
7829
7830 IWL_DEBUG_MAC80211("enter\n");
7831
7832 mutex_lock(&priv->mutex);
7833
7834 if (iwl4965_is_ready_rf(priv)) {
7835 iwl4965_scan_cancel_timeout(priv, 100);
7836 cancel_delayed_work(&priv->post_associate);
7837 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7838 iwl4965_commit_rxon(priv);
7839 }
7840 if (priv->interface_id == conf->if_id) {
7841 priv->interface_id = 0;
7842 memset(priv->bssid, 0, ETH_ALEN);
7843 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7844 priv->essid_len = 0;
7845 }
7846 mutex_unlock(&priv->mutex);
7847
7848 IWL_DEBUG_MAC80211("leave\n");
7849
7850 }
7851 static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
7852 u8 changes, int cts_protection, int preamble)
7853 {
7854 struct iwl4965_priv *priv = hw->priv;
7855
7856 if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
7857 if (preamble == WLAN_ERP_PREAMBLE_SHORT)
7858 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7859 else
7860 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7861 }
7862
7863 if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
7864 if (cts_protection && (priv->phymode != MODE_IEEE80211A))
7865 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7866 else
7867 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7868 }
7869
7870 if (iwl4965_is_associated(priv))
7871 iwl4965_send_rxon_assoc(priv);
7872 }
7873
7874 static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7875 {
7876 int rc = 0;
7877 unsigned long flags;
7878 struct iwl4965_priv *priv = hw->priv;
7879
7880 IWL_DEBUG_MAC80211("enter\n");
7881
7882 mutex_lock(&priv->mutex);
7883 spin_lock_irqsave(&priv->lock, flags);
7884
7885 if (!iwl4965_is_ready_rf(priv)) {
7886 rc = -EIO;
7887 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7888 goto out_unlock;
7889 }
7890
7891 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7892 rc = -EIO;
7893 IWL_ERROR("ERROR: APs don't scan\n");
7894 goto out_unlock;
7895 }
7896
7897 /* we don't schedule scan within next_scan_jiffies period */
7898 if (priv->next_scan_jiffies &&
7899 time_after(priv->next_scan_jiffies, jiffies)) {
7900 rc = -EAGAIN;
7901 goto out_unlock;
7902 }
7903 /* if we just finished scan ask for delay */
7904 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7905 IWL_DELAY_NEXT_SCAN, jiffies)) {
7906 rc = -EAGAIN;
7907 goto out_unlock;
7908 }
7909 if (len) {
7910 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7911 iwl4965_escape_essid(ssid, len), (int)len);
7912
7913 priv->one_direct_scan = 1;
7914 priv->direct_ssid_len = (u8)
7915 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7916 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7917 } else
7918 priv->one_direct_scan = 0;
7919
7920 rc = iwl4965_scan_initiate(priv);
7921
7922 IWL_DEBUG_MAC80211("leave\n");
7923
7924 out_unlock:
7925 spin_unlock_irqrestore(&priv->lock, flags);
7926 mutex_unlock(&priv->mutex);
7927
7928 return rc;
7929 }
7930
7931 static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7932 const u8 *local_addr, const u8 *addr,
7933 struct ieee80211_key_conf *key)
7934 {
7935 struct iwl4965_priv *priv = hw->priv;
7936 DECLARE_MAC_BUF(mac);
7937 int rc = 0;
7938 u8 sta_id;
7939
7940 IWL_DEBUG_MAC80211("enter\n");
7941
7942 if (!iwl4965_param_hwcrypto) {
7943 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7944 return -EOPNOTSUPP;
7945 }
7946
7947 if (is_zero_ether_addr(addr))
7948 /* only support pairwise keys */
7949 return -EOPNOTSUPP;
7950
7951 sta_id = iwl4965_hw_find_station(priv, addr);
7952 if (sta_id == IWL_INVALID_STATION) {
7953 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7954 print_mac(mac, addr));
7955 return -EINVAL;
7956 }
7957
7958 mutex_lock(&priv->mutex);
7959
7960 iwl4965_scan_cancel_timeout(priv, 100);
7961
7962 switch (cmd) {
7963 case SET_KEY:
7964 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
7965 if (!rc) {
7966 iwl4965_set_rxon_hwcrypto(priv, 1);
7967 iwl4965_commit_rxon(priv);
7968 key->hw_key_idx = sta_id;
7969 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7970 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7971 }
7972 break;
7973 case DISABLE_KEY:
7974 rc = iwl4965_clear_sta_key_info(priv, sta_id);
7975 if (!rc) {
7976 iwl4965_set_rxon_hwcrypto(priv, 0);
7977 iwl4965_commit_rxon(priv);
7978 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7979 }
7980 break;
7981 default:
7982 rc = -EINVAL;
7983 }
7984
7985 IWL_DEBUG_MAC80211("leave\n");
7986 mutex_unlock(&priv->mutex);
7987
7988 return rc;
7989 }
7990
7991 static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7992 const struct ieee80211_tx_queue_params *params)
7993 {
7994 struct iwl4965_priv *priv = hw->priv;
7995 #ifdef CONFIG_IWL4965_QOS
7996 unsigned long flags;
7997 int q;
7998 #endif /* CONFIG_IWL4965_QOS */
7999
8000 IWL_DEBUG_MAC80211("enter\n");
8001
8002 if (!iwl4965_is_ready_rf(priv)) {
8003 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8004 return -EIO;
8005 }
8006
8007 if (queue >= AC_NUM) {
8008 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
8009 return 0;
8010 }
8011
8012 #ifdef CONFIG_IWL4965_QOS
8013 if (!priv->qos_data.qos_enable) {
8014 priv->qos_data.qos_active = 0;
8015 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
8016 return 0;
8017 }
8018 q = AC_NUM - 1 - queue;
8019
8020 spin_lock_irqsave(&priv->lock, flags);
8021
8022 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
8023 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
8024 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
8025 priv->qos_data.def_qos_parm.ac[q].edca_txop =
8026 cpu_to_le16((params->burst_time * 100));
8027
8028 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
8029 priv->qos_data.qos_active = 1;
8030
8031 spin_unlock_irqrestore(&priv->lock, flags);
8032
8033 mutex_lock(&priv->mutex);
8034 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
8035 iwl4965_activate_qos(priv, 1);
8036 else if (priv->assoc_id && iwl4965_is_associated(priv))
8037 iwl4965_activate_qos(priv, 0);
8038
8039 mutex_unlock(&priv->mutex);
8040
8041 #endif /*CONFIG_IWL4965_QOS */
8042
8043 IWL_DEBUG_MAC80211("leave\n");
8044 return 0;
8045 }
8046
8047 static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
8048 struct ieee80211_tx_queue_stats *stats)
8049 {
8050 struct iwl4965_priv *priv = hw->priv;
8051 int i, avail;
8052 struct iwl4965_tx_queue *txq;
8053 struct iwl4965_queue *q;
8054 unsigned long flags;
8055
8056 IWL_DEBUG_MAC80211("enter\n");
8057
8058 if (!iwl4965_is_ready_rf(priv)) {
8059 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8060 return -EIO;
8061 }
8062
8063 spin_lock_irqsave(&priv->lock, flags);
8064
8065 for (i = 0; i < AC_NUM; i++) {
8066 txq = &priv->txq[i];
8067 q = &txq->q;
8068 avail = iwl4965_queue_space(q);
8069
8070 stats->data[i].len = q->n_window - avail;
8071 stats->data[i].limit = q->n_window - q->high_mark;
8072 stats->data[i].count = q->n_window;
8073
8074 }
8075 spin_unlock_irqrestore(&priv->lock, flags);
8076
8077 IWL_DEBUG_MAC80211("leave\n");
8078
8079 return 0;
8080 }
8081
8082 static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
8083 struct ieee80211_low_level_stats *stats)
8084 {
8085 IWL_DEBUG_MAC80211("enter\n");
8086 IWL_DEBUG_MAC80211("leave\n");
8087
8088 return 0;
8089 }
8090
8091 static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
8092 {
8093 IWL_DEBUG_MAC80211("enter\n");
8094 IWL_DEBUG_MAC80211("leave\n");
8095
8096 return 0;
8097 }
8098
8099 static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
8100 {
8101 struct iwl4965_priv *priv = hw->priv;
8102 unsigned long flags;
8103
8104 mutex_lock(&priv->mutex);
8105 IWL_DEBUG_MAC80211("enter\n");
8106
8107 priv->lq_mngr.lq_ready = 0;
8108 #ifdef CONFIG_IWL4965_HT
8109 spin_lock_irqsave(&priv->lock, flags);
8110 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
8111 spin_unlock_irqrestore(&priv->lock, flags);
8112 #ifdef CONFIG_IWL4965_HT_AGG
8113 /* if (priv->lq_mngr.agg_ctrl.granted_ba)
8114 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8115
8116 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
8117 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8118 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8119 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8120
8121 if (priv->lq_mngr.agg_ctrl.auto_agg)
8122 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
8123 #endif /*CONFIG_IWL4965_HT_AGG */
8124 #endif /* CONFIG_IWL4965_HT */
8125
8126 #ifdef CONFIG_IWL4965_QOS
8127 iwl4965_reset_qos(priv);
8128 #endif
8129
8130 cancel_delayed_work(&priv->post_associate);
8131
8132 spin_lock_irqsave(&priv->lock, flags);
8133 priv->assoc_id = 0;
8134 priv->assoc_capability = 0;
8135 priv->call_post_assoc_from_beacon = 0;
8136 priv->assoc_station_added = 0;
8137
8138 /* new association get rid of ibss beacon skb */
8139 if (priv->ibss_beacon)
8140 dev_kfree_skb(priv->ibss_beacon);
8141
8142 priv->ibss_beacon = NULL;
8143
8144 priv->beacon_int = priv->hw->conf.beacon_int;
8145 priv->timestamp1 = 0;
8146 priv->timestamp0 = 0;
8147 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8148 priv->beacon_int = 0;
8149
8150 spin_unlock_irqrestore(&priv->lock, flags);
8151
8152 if (!iwl4965_is_ready_rf(priv)) {
8153 IWL_DEBUG_MAC80211("leave - not ready\n");
8154 mutex_unlock(&priv->mutex);
8155 return;
8156 }
8157
8158 /* we are restarting association process
8159 * clear RXON_FILTER_ASSOC_MSK bit
8160 */
8161 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
8162 iwl4965_scan_cancel_timeout(priv, 100);
8163 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
8164 iwl4965_commit_rxon(priv);
8165 }
8166
8167 /* Per mac80211.h: This is only used in IBSS mode... */
8168 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8169
8170 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8171 mutex_unlock(&priv->mutex);
8172 return;
8173 }
8174
8175 priv->only_active_channel = 0;
8176
8177 iwl4965_set_rate(priv);
8178
8179 mutex_unlock(&priv->mutex);
8180
8181 IWL_DEBUG_MAC80211("leave\n");
8182
8183 }
8184
8185 static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
8186 struct ieee80211_tx_control *control)
8187 {
8188 struct iwl4965_priv *priv = hw->priv;
8189 unsigned long flags;
8190
8191 mutex_lock(&priv->mutex);
8192 IWL_DEBUG_MAC80211("enter\n");
8193
8194 if (!iwl4965_is_ready_rf(priv)) {
8195 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8196 mutex_unlock(&priv->mutex);
8197 return -EIO;
8198 }
8199
8200 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8201 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8202 mutex_unlock(&priv->mutex);
8203 return -EIO;
8204 }
8205
8206 spin_lock_irqsave(&priv->lock, flags);
8207
8208 if (priv->ibss_beacon)
8209 dev_kfree_skb(priv->ibss_beacon);
8210
8211 priv->ibss_beacon = skb;
8212
8213 priv->assoc_id = 0;
8214
8215 IWL_DEBUG_MAC80211("leave\n");
8216 spin_unlock_irqrestore(&priv->lock, flags);
8217
8218 #ifdef CONFIG_IWL4965_QOS
8219 iwl4965_reset_qos(priv);
8220 #endif
8221
8222 queue_work(priv->workqueue, &priv->post_associate.work);
8223
8224 mutex_unlock(&priv->mutex);
8225
8226 return 0;
8227 }
8228
8229 #ifdef CONFIG_IWL4965_HT
8230
8231 static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8232 struct iwl4965_priv *priv)
8233 {
8234 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8235 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8236 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
8237
8238 IWL_DEBUG_MAC80211("enter: \n");
8239
8240 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8241 iwl_conf->is_ht = 0;
8242 return;
8243 }
8244
8245 iwl_conf->is_ht = 1;
8246 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8247
8248 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8249 iwl_conf->sgf |= 0x1;
8250 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8251 iwl_conf->sgf |= 0x2;
8252
8253 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8254 iwl_conf->max_amsdu_size =
8255 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8256 iwl_conf->supported_chan_width =
8257 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8258 iwl_conf->tx_mimo_ps_mode =
8259 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8260 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8261
8262 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8263 iwl_conf->extension_chan_offset =
8264 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8265 iwl_conf->tx_chan_width =
8266 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8267 iwl_conf->ht_protection =
8268 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8269 iwl_conf->non_GF_STA_present =
8270 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8271
8272 IWL_DEBUG_MAC80211("control channel %d\n",
8273 iwl_conf->control_channel);
8274 IWL_DEBUG_MAC80211("leave\n");
8275 }
8276
8277 static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
8278 struct ieee80211_conf *conf)
8279 {
8280 struct iwl4965_priv *priv = hw->priv;
8281
8282 IWL_DEBUG_MAC80211("enter: \n");
8283
8284 iwl4965_ht_info_fill(conf, priv);
8285 iwl4965_set_rxon_chain(priv);
8286
8287 if (priv && priv->assoc_id &&
8288 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8289 unsigned long flags;
8290
8291 spin_lock_irqsave(&priv->lock, flags);
8292 if (priv->beacon_int)
8293 queue_work(priv->workqueue, &priv->post_associate.work);
8294 else
8295 priv->call_post_assoc_from_beacon = 1;
8296 spin_unlock_irqrestore(&priv->lock, flags);
8297 }
8298
8299 IWL_DEBUG_MAC80211("leave:\n");
8300 return 0;
8301 }
8302
8303 static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
8304 struct ieee80211_ht_cap *ht_cap,
8305 u8 use_current_config)
8306 {
8307 struct ieee80211_conf *conf = &hw->conf;
8308 struct ieee80211_hw_mode *mode = conf->mode;
8309
8310 if (use_current_config) {
8311 ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
8312 memcpy(ht_cap->supp_mcs_set,
8313 conf->ht_conf.supp_mcs_set, 16);
8314 } else {
8315 ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
8316 memcpy(ht_cap->supp_mcs_set,
8317 mode->ht_info.supp_mcs_set, 16);
8318 }
8319 ht_cap->ampdu_params_info =
8320 (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
8321 ((mode->ht_info.ampdu_density << 2) &
8322 IEEE80211_HT_CAP_AMPDU_DENSITY);
8323 }
8324
8325 #endif /*CONFIG_IWL4965_HT*/
8326
8327 /*****************************************************************************
8328 *
8329 * sysfs attributes
8330 *
8331 *****************************************************************************/
8332
8333 #ifdef CONFIG_IWL4965_DEBUG
8334
8335 /*
8336 * The following adds a new attribute to the sysfs representation
8337 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8338 * used for controlling the debug level.
8339 *
8340 * See the level definitions in iwl for details.
8341 */
8342
8343 static ssize_t show_debug_level(struct device_driver *d, char *buf)
8344 {
8345 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
8346 }
8347 static ssize_t store_debug_level(struct device_driver *d,
8348 const char *buf, size_t count)
8349 {
8350 char *p = (char *)buf;
8351 u32 val;
8352
8353 val = simple_strtoul(p, &p, 0);
8354 if (p == buf)
8355 printk(KERN_INFO DRV_NAME
8356 ": %s is not in hex or decimal form.\n", buf);
8357 else
8358 iwl4965_debug_level = val;
8359
8360 return strnlen(buf, count);
8361 }
8362
8363 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8364 show_debug_level, store_debug_level);
8365
8366 #endif /* CONFIG_IWL4965_DEBUG */
8367
8368 static ssize_t show_rf_kill(struct device *d,
8369 struct device_attribute *attr, char *buf)
8370 {
8371 /*
8372 * 0 - RF kill not enabled
8373 * 1 - SW based RF kill active (sysfs)
8374 * 2 - HW based RF kill active
8375 * 3 - Both HW and SW based RF kill active
8376 */
8377 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8378 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8379 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8380
8381 return sprintf(buf, "%i\n", val);
8382 }
8383
8384 static ssize_t store_rf_kill(struct device *d,
8385 struct device_attribute *attr,
8386 const char *buf, size_t count)
8387 {
8388 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8389
8390 mutex_lock(&priv->mutex);
8391 iwl4965_radio_kill_sw(priv, buf[0] == '1');
8392 mutex_unlock(&priv->mutex);
8393
8394 return count;
8395 }
8396
8397 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8398
8399 static ssize_t show_temperature(struct device *d,
8400 struct device_attribute *attr, char *buf)
8401 {
8402 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8403
8404 if (!iwl4965_is_alive(priv))
8405 return -EAGAIN;
8406
8407 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
8408 }
8409
8410 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8411
8412 static ssize_t show_rs_window(struct device *d,
8413 struct device_attribute *attr,
8414 char *buf)
8415 {
8416 struct iwl4965_priv *priv = d->driver_data;
8417 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
8418 }
8419 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8420
8421 static ssize_t show_tx_power(struct device *d,
8422 struct device_attribute *attr, char *buf)
8423 {
8424 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8425 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8426 }
8427
8428 static ssize_t store_tx_power(struct device *d,
8429 struct device_attribute *attr,
8430 const char *buf, size_t count)
8431 {
8432 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8433 char *p = (char *)buf;
8434 u32 val;
8435
8436 val = simple_strtoul(p, &p, 10);
8437 if (p == buf)
8438 printk(KERN_INFO DRV_NAME
8439 ": %s is not in decimal form.\n", buf);
8440 else
8441 iwl4965_hw_reg_set_txpower(priv, val);
8442
8443 return count;
8444 }
8445
8446 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8447
8448 static ssize_t show_flags(struct device *d,
8449 struct device_attribute *attr, char *buf)
8450 {
8451 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8452
8453 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8454 }
8455
8456 static ssize_t store_flags(struct device *d,
8457 struct device_attribute *attr,
8458 const char *buf, size_t count)
8459 {
8460 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8461 u32 flags = simple_strtoul(buf, NULL, 0);
8462
8463 mutex_lock(&priv->mutex);
8464 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8465 /* Cancel any currently running scans... */
8466 if (iwl4965_scan_cancel_timeout(priv, 100))
8467 IWL_WARNING("Could not cancel scan.\n");
8468 else {
8469 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8470 flags);
8471 priv->staging_rxon.flags = cpu_to_le32(flags);
8472 iwl4965_commit_rxon(priv);
8473 }
8474 }
8475 mutex_unlock(&priv->mutex);
8476
8477 return count;
8478 }
8479
8480 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8481
8482 static ssize_t show_filter_flags(struct device *d,
8483 struct device_attribute *attr, char *buf)
8484 {
8485 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8486
8487 return sprintf(buf, "0x%04X\n",
8488 le32_to_cpu(priv->active_rxon.filter_flags));
8489 }
8490
8491 static ssize_t store_filter_flags(struct device *d,
8492 struct device_attribute *attr,
8493 const char *buf, size_t count)
8494 {
8495 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8496 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8497
8498 mutex_lock(&priv->mutex);
8499 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8500 /* Cancel any currently running scans... */
8501 if (iwl4965_scan_cancel_timeout(priv, 100))
8502 IWL_WARNING("Could not cancel scan.\n");
8503 else {
8504 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8505 "0x%04X\n", filter_flags);
8506 priv->staging_rxon.filter_flags =
8507 cpu_to_le32(filter_flags);
8508 iwl4965_commit_rxon(priv);
8509 }
8510 }
8511 mutex_unlock(&priv->mutex);
8512
8513 return count;
8514 }
8515
8516 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8517 store_filter_flags);
8518
8519 static ssize_t show_tune(struct device *d,
8520 struct device_attribute *attr, char *buf)
8521 {
8522 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8523
8524 return sprintf(buf, "0x%04X\n",
8525 (priv->phymode << 8) |
8526 le16_to_cpu(priv->active_rxon.channel));
8527 }
8528
8529 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
8530
8531 static ssize_t store_tune(struct device *d,
8532 struct device_attribute *attr,
8533 const char *buf, size_t count)
8534 {
8535 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8536 char *p = (char *)buf;
8537 u16 tune = simple_strtoul(p, &p, 0);
8538 u8 phymode = (tune >> 8) & 0xff;
8539 u16 channel = tune & 0xff;
8540
8541 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8542
8543 mutex_lock(&priv->mutex);
8544 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8545 (priv->phymode != phymode)) {
8546 const struct iwl4965_channel_info *ch_info;
8547
8548 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
8549 if (!ch_info) {
8550 IWL_WARNING("Requested invalid phymode/channel "
8551 "combination: %d %d\n", phymode, channel);
8552 mutex_unlock(&priv->mutex);
8553 return -EINVAL;
8554 }
8555
8556 /* Cancel any currently running scans... */
8557 if (iwl4965_scan_cancel_timeout(priv, 100))
8558 IWL_WARNING("Could not cancel scan.\n");
8559 else {
8560 IWL_DEBUG_INFO("Committing phymode and "
8561 "rxon.channel = %d %d\n",
8562 phymode, channel);
8563
8564 iwl4965_set_rxon_channel(priv, phymode, channel);
8565 iwl4965_set_flags_for_phymode(priv, phymode);
8566
8567 iwl4965_set_rate(priv);
8568 iwl4965_commit_rxon(priv);
8569 }
8570 }
8571 mutex_unlock(&priv->mutex);
8572
8573 return count;
8574 }
8575
8576 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8577
8578 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8579
8580 static ssize_t show_measurement(struct device *d,
8581 struct device_attribute *attr, char *buf)
8582 {
8583 struct iwl4965_priv *priv = dev_get_drvdata(d);
8584 struct iwl4965_spectrum_notification measure_report;
8585 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8586 u8 *data = (u8 *) & measure_report;
8587 unsigned long flags;
8588
8589 spin_lock_irqsave(&priv->lock, flags);
8590 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8591 spin_unlock_irqrestore(&priv->lock, flags);
8592 return 0;
8593 }
8594 memcpy(&measure_report, &priv->measure_report, size);
8595 priv->measurement_status = 0;
8596 spin_unlock_irqrestore(&priv->lock, flags);
8597
8598 while (size && (PAGE_SIZE - len)) {
8599 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8600 PAGE_SIZE - len, 1);
8601 len = strlen(buf);
8602 if (PAGE_SIZE - len)
8603 buf[len++] = '\n';
8604
8605 ofs += 16;
8606 size -= min(size, 16U);
8607 }
8608
8609 return len;
8610 }
8611
8612 static ssize_t store_measurement(struct device *d,
8613 struct device_attribute *attr,
8614 const char *buf, size_t count)
8615 {
8616 struct iwl4965_priv *priv = dev_get_drvdata(d);
8617 struct ieee80211_measurement_params params = {
8618 .channel = le16_to_cpu(priv->active_rxon.channel),
8619 .start_time = cpu_to_le64(priv->last_tsf),
8620 .duration = cpu_to_le16(1),
8621 };
8622 u8 type = IWL_MEASURE_BASIC;
8623 u8 buffer[32];
8624 u8 channel;
8625
8626 if (count) {
8627 char *p = buffer;
8628 strncpy(buffer, buf, min(sizeof(buffer), count));
8629 channel = simple_strtoul(p, NULL, 0);
8630 if (channel)
8631 params.channel = channel;
8632
8633 p = buffer;
8634 while (*p && *p != ' ')
8635 p++;
8636 if (*p)
8637 type = simple_strtoul(p + 1, NULL, 0);
8638 }
8639
8640 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8641 "channel %d (for '%s')\n", type, params.channel, buf);
8642 iwl4965_get_measurement(priv, &params, type);
8643
8644 return count;
8645 }
8646
8647 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8648 show_measurement, store_measurement);
8649 #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
8650
8651 static ssize_t store_retry_rate(struct device *d,
8652 struct device_attribute *attr,
8653 const char *buf, size_t count)
8654 {
8655 struct iwl4965_priv *priv = dev_get_drvdata(d);
8656
8657 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8658 if (priv->retry_rate <= 0)
8659 priv->retry_rate = 1;
8660
8661 return count;
8662 }
8663
8664 static ssize_t show_retry_rate(struct device *d,
8665 struct device_attribute *attr, char *buf)
8666 {
8667 struct iwl4965_priv *priv = dev_get_drvdata(d);
8668 return sprintf(buf, "%d", priv->retry_rate);
8669 }
8670
8671 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8672 store_retry_rate);
8673
8674 static ssize_t store_power_level(struct device *d,
8675 struct device_attribute *attr,
8676 const char *buf, size_t count)
8677 {
8678 struct iwl4965_priv *priv = dev_get_drvdata(d);
8679 int rc;
8680 int mode;
8681
8682 mode = simple_strtoul(buf, NULL, 0);
8683 mutex_lock(&priv->mutex);
8684
8685 if (!iwl4965_is_ready(priv)) {
8686 rc = -EAGAIN;
8687 goto out;
8688 }
8689
8690 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8691 mode = IWL_POWER_AC;
8692 else
8693 mode |= IWL_POWER_ENABLED;
8694
8695 if (mode != priv->power_mode) {
8696 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8697 if (rc) {
8698 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8699 goto out;
8700 }
8701 priv->power_mode = mode;
8702 }
8703
8704 rc = count;
8705
8706 out:
8707 mutex_unlock(&priv->mutex);
8708 return rc;
8709 }
8710
8711 #define MAX_WX_STRING 80
8712
8713 /* Values are in microsecond */
8714 static const s32 timeout_duration[] = {
8715 350000,
8716 250000,
8717 75000,
8718 37000,
8719 25000,
8720 };
8721 static const s32 period_duration[] = {
8722 400000,
8723 700000,
8724 1000000,
8725 1000000,
8726 1000000
8727 };
8728
8729 static ssize_t show_power_level(struct device *d,
8730 struct device_attribute *attr, char *buf)
8731 {
8732 struct iwl4965_priv *priv = dev_get_drvdata(d);
8733 int level = IWL_POWER_LEVEL(priv->power_mode);
8734 char *p = buf;
8735
8736 p += sprintf(p, "%d ", level);
8737 switch (level) {
8738 case IWL_POWER_MODE_CAM:
8739 case IWL_POWER_AC:
8740 p += sprintf(p, "(AC)");
8741 break;
8742 case IWL_POWER_BATTERY:
8743 p += sprintf(p, "(BATTERY)");
8744 break;
8745 default:
8746 p += sprintf(p,
8747 "(Timeout %dms, Period %dms)",
8748 timeout_duration[level - 1] / 1000,
8749 period_duration[level - 1] / 1000);
8750 }
8751
8752 if (!(priv->power_mode & IWL_POWER_ENABLED))
8753 p += sprintf(p, " OFF\n");
8754 else
8755 p += sprintf(p, " \n");
8756
8757 return (p - buf + 1);
8758
8759 }
8760
8761 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8762 store_power_level);
8763
8764 static ssize_t show_channels(struct device *d,
8765 struct device_attribute *attr, char *buf)
8766 {
8767 struct iwl4965_priv *priv = dev_get_drvdata(d);
8768 int len = 0, i;
8769 struct ieee80211_channel *channels = NULL;
8770 const struct ieee80211_hw_mode *hw_mode = NULL;
8771 int count = 0;
8772
8773 if (!iwl4965_is_ready(priv))
8774 return -EAGAIN;
8775
8776 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
8777 if (!hw_mode)
8778 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
8779 if (hw_mode) {
8780 channels = hw_mode->channels;
8781 count = hw_mode->num_channels;
8782 }
8783
8784 len +=
8785 sprintf(&buf[len],
8786 "Displaying %d channels in 2.4GHz band "
8787 "(802.11bg):\n", count);
8788
8789 for (i = 0; i < count; i++)
8790 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8791 channels[i].chan,
8792 channels[i].power_level,
8793 channels[i].
8794 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8795 " (IEEE 802.11h required)" : "",
8796 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8797 || (channels[i].
8798 flag &
8799 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8800 ", IBSS",
8801 channels[i].
8802 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8803 "active/passive" : "passive only");
8804
8805 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
8806 if (hw_mode) {
8807 channels = hw_mode->channels;
8808 count = hw_mode->num_channels;
8809 } else {
8810 channels = NULL;
8811 count = 0;
8812 }
8813
8814 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8815 "(802.11a):\n", count);
8816
8817 for (i = 0; i < count; i++)
8818 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8819 channels[i].chan,
8820 channels[i].power_level,
8821 channels[i].
8822 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8823 " (IEEE 802.11h required)" : "",
8824 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8825 || (channels[i].
8826 flag &
8827 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8828 ", IBSS",
8829 channels[i].
8830 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8831 "active/passive" : "passive only");
8832
8833 return len;
8834 }
8835
8836 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8837
8838 static ssize_t show_statistics(struct device *d,
8839 struct device_attribute *attr, char *buf)
8840 {
8841 struct iwl4965_priv *priv = dev_get_drvdata(d);
8842 u32 size = sizeof(struct iwl4965_notif_statistics);
8843 u32 len = 0, ofs = 0;
8844 u8 *data = (u8 *) & priv->statistics;
8845 int rc = 0;
8846
8847 if (!iwl4965_is_alive(priv))
8848 return -EAGAIN;
8849
8850 mutex_lock(&priv->mutex);
8851 rc = iwl4965_send_statistics_request(priv);
8852 mutex_unlock(&priv->mutex);
8853
8854 if (rc) {
8855 len = sprintf(buf,
8856 "Error sending statistics request: 0x%08X\n", rc);
8857 return len;
8858 }
8859
8860 while (size && (PAGE_SIZE - len)) {
8861 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8862 PAGE_SIZE - len, 1);
8863 len = strlen(buf);
8864 if (PAGE_SIZE - len)
8865 buf[len++] = '\n';
8866
8867 ofs += 16;
8868 size -= min(size, 16U);
8869 }
8870
8871 return len;
8872 }
8873
8874 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8875
8876 static ssize_t show_antenna(struct device *d,
8877 struct device_attribute *attr, char *buf)
8878 {
8879 struct iwl4965_priv *priv = dev_get_drvdata(d);
8880
8881 if (!iwl4965_is_alive(priv))
8882 return -EAGAIN;
8883
8884 return sprintf(buf, "%d\n", priv->antenna);
8885 }
8886
8887 static ssize_t store_antenna(struct device *d,
8888 struct device_attribute *attr,
8889 const char *buf, size_t count)
8890 {
8891 int ant;
8892 struct iwl4965_priv *priv = dev_get_drvdata(d);
8893
8894 if (count == 0)
8895 return 0;
8896
8897 if (sscanf(buf, "%1i", &ant) != 1) {
8898 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8899 return count;
8900 }
8901
8902 if ((ant >= 0) && (ant <= 2)) {
8903 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8904 priv->antenna = (enum iwl4965_antenna)ant;
8905 } else
8906 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8907
8908
8909 return count;
8910 }
8911
8912 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8913
8914 static ssize_t show_status(struct device *d,
8915 struct device_attribute *attr, char *buf)
8916 {
8917 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8918 if (!iwl4965_is_alive(priv))
8919 return -EAGAIN;
8920 return sprintf(buf, "0x%08x\n", (int)priv->status);
8921 }
8922
8923 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8924
8925 static ssize_t dump_error_log(struct device *d,
8926 struct device_attribute *attr,
8927 const char *buf, size_t count)
8928 {
8929 char *p = (char *)buf;
8930
8931 if (p[0] == '1')
8932 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
8933
8934 return strnlen(buf, count);
8935 }
8936
8937 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8938
8939 static ssize_t dump_event_log(struct device *d,
8940 struct device_attribute *attr,
8941 const char *buf, size_t count)
8942 {
8943 char *p = (char *)buf;
8944
8945 if (p[0] == '1')
8946 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
8947
8948 return strnlen(buf, count);
8949 }
8950
8951 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8952
8953 /*****************************************************************************
8954 *
8955 * driver setup and teardown
8956 *
8957 *****************************************************************************/
8958
8959 static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
8960 {
8961 priv->workqueue = create_workqueue(DRV_NAME);
8962
8963 init_waitqueue_head(&priv->wait_command_queue);
8964
8965 INIT_WORK(&priv->up, iwl4965_bg_up);
8966 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8967 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8968 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8969 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8970 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8971 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8972 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8973 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8974 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8975 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8976 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8977
8978 iwl4965_hw_setup_deferred_work(priv);
8979
8980 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8981 iwl4965_irq_tasklet, (unsigned long)priv);
8982 }
8983
8984 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
8985 {
8986 iwl4965_hw_cancel_deferred_work(priv);
8987
8988 cancel_delayed_work_sync(&priv->init_alive_start);
8989 cancel_delayed_work(&priv->scan_check);
8990 cancel_delayed_work(&priv->alive_start);
8991 cancel_delayed_work(&priv->post_associate);
8992 cancel_work_sync(&priv->beacon_update);
8993 }
8994
8995 static struct attribute *iwl4965_sysfs_entries[] = {
8996 &dev_attr_antenna.attr,
8997 &dev_attr_channels.attr,
8998 &dev_attr_dump_errors.attr,
8999 &dev_attr_dump_events.attr,
9000 &dev_attr_flags.attr,
9001 &dev_attr_filter_flags.attr,
9002 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
9003 &dev_attr_measurement.attr,
9004 #endif
9005 &dev_attr_power_level.attr,
9006 &dev_attr_retry_rate.attr,
9007 &dev_attr_rf_kill.attr,
9008 &dev_attr_rs_window.attr,
9009 &dev_attr_statistics.attr,
9010 &dev_attr_status.attr,
9011 &dev_attr_temperature.attr,
9012 &dev_attr_tune.attr,
9013 &dev_attr_tx_power.attr,
9014
9015 NULL
9016 };
9017
9018 static struct attribute_group iwl4965_attribute_group = {
9019 .name = NULL, /* put in device directory */
9020 .attrs = iwl4965_sysfs_entries,
9021 };
9022
9023 static struct ieee80211_ops iwl4965_hw_ops = {
9024 .tx = iwl4965_mac_tx,
9025 .start = iwl4965_mac_start,
9026 .stop = iwl4965_mac_stop,
9027 .add_interface = iwl4965_mac_add_interface,
9028 .remove_interface = iwl4965_mac_remove_interface,
9029 .config = iwl4965_mac_config,
9030 .config_interface = iwl4965_mac_config_interface,
9031 .configure_filter = iwl4965_configure_filter,
9032 .set_key = iwl4965_mac_set_key,
9033 .get_stats = iwl4965_mac_get_stats,
9034 .get_tx_stats = iwl4965_mac_get_tx_stats,
9035 .conf_tx = iwl4965_mac_conf_tx,
9036 .get_tsf = iwl4965_mac_get_tsf,
9037 .reset_tsf = iwl4965_mac_reset_tsf,
9038 .beacon_update = iwl4965_mac_beacon_update,
9039 .erp_ie_changed = iwl4965_mac_erp_ie_changed,
9040 #ifdef CONFIG_IWL4965_HT
9041 .conf_ht = iwl4965_mac_conf_ht,
9042 #ifdef CONFIG_IWL4965_HT_AGG
9043 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9044 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
9045 .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
9046 .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
9047 #endif /* CONFIG_IWL4965_HT_AGG */
9048 #endif /* CONFIG_IWL4965_HT */
9049 .hw_scan = iwl4965_mac_hw_scan
9050 };
9051
9052 static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9053 {
9054 int err = 0;
9055 struct iwl4965_priv *priv;
9056 struct ieee80211_hw *hw;
9057 int i;
9058
9059 /* Disabling hardware scan means that mac80211 will perform scans
9060 * "the hard way", rather than using device's scan. */
9061 if (iwl4965_param_disable_hw_scan) {
9062 IWL_DEBUG_INFO("Disabling hw_scan\n");
9063 iwl4965_hw_ops.hw_scan = NULL;
9064 }
9065
9066 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9067 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
9068 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9069 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9070 err = -EINVAL;
9071 goto out;
9072 }
9073
9074 /* mac80211 allocates memory for this device instance, including
9075 * space for this driver's private structure */
9076 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
9077 if (hw == NULL) {
9078 IWL_ERROR("Can not allocate network device\n");
9079 err = -ENOMEM;
9080 goto out;
9081 }
9082 SET_IEEE80211_DEV(hw, &pdev->dev);
9083
9084 hw->rate_control_algorithm = "iwl-4965-rs";
9085
9086 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9087 priv = hw->priv;
9088 priv->hw = hw;
9089
9090 priv->pci_dev = pdev;
9091 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
9092 #ifdef CONFIG_IWL4965_DEBUG
9093 iwl4965_debug_level = iwl4965_param_debug;
9094 atomic_set(&priv->restrict_refcnt, 0);
9095 #endif
9096 priv->retry_rate = 1;
9097
9098 priv->ibss_beacon = NULL;
9099
9100 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9101 * the range of signal quality values that we'll provide.
9102 * Negative values for level/noise indicate that we'll provide dBm.
9103 * For WE, at least, non-0 values here *enable* display of values
9104 * in app (iwconfig). */
9105 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9106 hw->max_noise = -20; /* noise level, negative indicates dBm */
9107 hw->max_signal = 100; /* link quality indication (%) */
9108
9109 /* Tell mac80211 our Tx characteristics */
9110 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9111
9112 /* Default value; 4 EDCA QOS priorities */
9113 hw->queues = 4;
9114 #ifdef CONFIG_IWL4965_HT
9115 #ifdef CONFIG_IWL4965_HT_AGG
9116 /* Enhanced value; more queues, to support 11n aggregation */
9117 hw->queues = 16;
9118 #endif /* CONFIG_IWL4965_HT_AGG */
9119 #endif /* CONFIG_IWL4965_HT */
9120
9121 spin_lock_init(&priv->lock);
9122 spin_lock_init(&priv->power_data.lock);
9123 spin_lock_init(&priv->sta_lock);
9124 spin_lock_init(&priv->hcmd_lock);
9125 spin_lock_init(&priv->lq_mngr.lock);
9126
9127 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9128 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9129
9130 INIT_LIST_HEAD(&priv->free_frames);
9131
9132 mutex_init(&priv->mutex);
9133 if (pci_enable_device(pdev)) {
9134 err = -ENODEV;
9135 goto out_ieee80211_free_hw;
9136 }
9137
9138 pci_set_master(pdev);
9139
9140 /* Clear the driver's (not device's) station table */
9141 iwl4965_clear_stations_table(priv);
9142
9143 priv->data_retry_limit = -1;
9144 priv->ieee_channels = NULL;
9145 priv->ieee_rates = NULL;
9146 priv->phymode = -1;
9147
9148 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9149 if (!err)
9150 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9151 if (err) {
9152 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9153 goto out_pci_disable_device;
9154 }
9155
9156 pci_set_drvdata(pdev, priv);
9157 err = pci_request_regions(pdev, DRV_NAME);
9158 if (err)
9159 goto out_pci_disable_device;
9160
9161 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9162 * PCI Tx retries from interfering with C3 CPU state */
9163 pci_write_config_byte(pdev, 0x41, 0x00);
9164
9165 priv->hw_base = pci_iomap(pdev, 0, 0);
9166 if (!priv->hw_base) {
9167 err = -ENODEV;
9168 goto out_pci_release_regions;
9169 }
9170
9171 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9172 (unsigned long long) pci_resource_len(pdev, 0));
9173 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9174
9175 /* Initialize module parameter values here */
9176
9177 /* Disable radio (SW RF KILL) via parameter when loading driver */
9178 if (iwl4965_param_disable) {
9179 set_bit(STATUS_RF_KILL_SW, &priv->status);
9180 IWL_DEBUG_INFO("Radio disabled.\n");
9181 }
9182
9183 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9184
9185 priv->ps_mode = 0;
9186 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
9187 priv->valid_antenna = 0x7; /* assume all 3 connected */
9188 priv->ps_mode = IWL_MIMO_PS_NONE;
9189
9190 /* Choose which receivers/antennas to use */
9191 iwl4965_set_rxon_chain(priv);
9192
9193 printk(KERN_INFO DRV_NAME
9194 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9195
9196 /* Device-specific setup */
9197 if (iwl4965_hw_set_hw_setting(priv)) {
9198 IWL_ERROR("failed to set hw settings\n");
9199 mutex_unlock(&priv->mutex);
9200 goto out_iounmap;
9201 }
9202
9203 #ifdef CONFIG_IWL4965_QOS
9204 if (iwl4965_param_qos_enable)
9205 priv->qos_data.qos_enable = 1;
9206
9207 iwl4965_reset_qos(priv);
9208
9209 priv->qos_data.qos_active = 0;
9210 priv->qos_data.qos_cap.val = 0;
9211 #endif /* CONFIG_IWL4965_QOS */
9212
9213 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9214 iwl4965_setup_deferred_work(priv);
9215 iwl4965_setup_rx_handlers(priv);
9216
9217 priv->rates_mask = IWL_RATES_MASK;
9218 /* If power management is turned on, default to AC mode */
9219 priv->power_mode = IWL_POWER_AC;
9220 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9221
9222 iwl4965_disable_interrupts(priv);
9223
9224 pci_enable_msi(pdev);
9225
9226 err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
9227 if (err) {
9228 IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
9229 goto out_disable_msi;
9230 }
9231
9232 mutex_lock(&priv->mutex);
9233
9234 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9235 if (err) {
9236 IWL_ERROR("failed to create sysfs device attributes\n");
9237 mutex_unlock(&priv->mutex);
9238 goto out_release_irq;
9239 }
9240
9241 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
9242 * ucode filename and max sizes are card-specific. */
9243 err = iwl4965_read_ucode(priv);
9244 if (err) {
9245 IWL_ERROR("Could not read microcode: %d\n", err);
9246 mutex_unlock(&priv->mutex);
9247 goto out_pci_alloc;
9248 }
9249
9250 mutex_unlock(&priv->mutex);
9251
9252 IWL_DEBUG_INFO("Queueing UP work.\n");
9253
9254 queue_work(priv->workqueue, &priv->up);
9255
9256 return 0;
9257
9258 out_pci_alloc:
9259 iwl4965_dealloc_ucode_pci(priv);
9260
9261 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9262
9263 out_release_irq:
9264 free_irq(pdev->irq, priv);
9265
9266 out_disable_msi:
9267 pci_disable_msi(pdev);
9268 destroy_workqueue(priv->workqueue);
9269 priv->workqueue = NULL;
9270 iwl4965_unset_hw_setting(priv);
9271
9272 out_iounmap:
9273 pci_iounmap(pdev, priv->hw_base);
9274 out_pci_release_regions:
9275 pci_release_regions(pdev);
9276 out_pci_disable_device:
9277 pci_disable_device(pdev);
9278 pci_set_drvdata(pdev, NULL);
9279 out_ieee80211_free_hw:
9280 ieee80211_free_hw(priv->hw);
9281 out:
9282 return err;
9283 }
9284
9285 static void iwl4965_pci_remove(struct pci_dev *pdev)
9286 {
9287 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9288 struct list_head *p, *q;
9289 int i;
9290
9291 if (!priv)
9292 return;
9293
9294 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9295
9296 set_bit(STATUS_EXIT_PENDING, &priv->status);
9297
9298 iwl4965_down(priv);
9299
9300 /* Free MAC hash list for ADHOC */
9301 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9302 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9303 list_del(p);
9304 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
9305 }
9306 }
9307
9308 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9309
9310 iwl4965_dealloc_ucode_pci(priv);
9311
9312 if (priv->rxq.bd)
9313 iwl4965_rx_queue_free(priv, &priv->rxq);
9314 iwl4965_hw_txq_ctx_free(priv);
9315
9316 iwl4965_unset_hw_setting(priv);
9317 iwl4965_clear_stations_table(priv);
9318
9319 if (priv->mac80211_registered) {
9320 ieee80211_unregister_hw(priv->hw);
9321 iwl4965_rate_control_unregister(priv->hw);
9322 }
9323
9324 /*netif_stop_queue(dev); */
9325 flush_workqueue(priv->workqueue);
9326
9327 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
9328 * priv->workqueue... so we can't take down the workqueue
9329 * until now... */
9330 destroy_workqueue(priv->workqueue);
9331 priv->workqueue = NULL;
9332
9333 free_irq(pdev->irq, priv);
9334 pci_disable_msi(pdev);
9335 pci_iounmap(pdev, priv->hw_base);
9336 pci_release_regions(pdev);
9337 pci_disable_device(pdev);
9338 pci_set_drvdata(pdev, NULL);
9339
9340 kfree(priv->channel_info);
9341
9342 kfree(priv->ieee_channels);
9343 kfree(priv->ieee_rates);
9344
9345 if (priv->ibss_beacon)
9346 dev_kfree_skb(priv->ibss_beacon);
9347
9348 ieee80211_free_hw(priv->hw);
9349 }
9350
9351 #ifdef CONFIG_PM
9352
9353 static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
9354 {
9355 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9356
9357 set_bit(STATUS_IN_SUSPEND, &priv->status);
9358
9359 /* Take down the device; powers it off, etc. */
9360 iwl4965_down(priv);
9361
9362 if (priv->mac80211_registered)
9363 ieee80211_stop_queues(priv->hw);
9364
9365 pci_save_state(pdev);
9366 pci_disable_device(pdev);
9367 pci_set_power_state(pdev, PCI_D3hot);
9368
9369 return 0;
9370 }
9371
9372 static void iwl4965_resume(struct iwl4965_priv *priv)
9373 {
9374 unsigned long flags;
9375
9376 /* The following it a temporary work around due to the
9377 * suspend / resume not fully initializing the NIC correctly.
9378 * Without all of the following, resume will not attempt to take
9379 * down the NIC (it shouldn't really need to) and will just try
9380 * and bring the NIC back up. However that fails during the
9381 * ucode verification process. This then causes iwl4965_down to be
9382 * called *after* iwl4965_hw_nic_init() has succeeded -- which
9383 * then lets the next init sequence succeed. So, we've
9384 * replicated all of that NIC init code here... */
9385
9386 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
9387
9388 iwl4965_hw_nic_init(priv);
9389
9390 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9391 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
9392 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
9393 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
9394 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9395 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9396
9397 /* tell the device to stop sending interrupts */
9398 iwl4965_disable_interrupts(priv);
9399
9400 spin_lock_irqsave(&priv->lock, flags);
9401 iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
9402
9403 if (!iwl4965_grab_nic_access(priv)) {
9404 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
9405 APMG_CLK_VAL_DMA_CLK_RQT);
9406 iwl4965_release_nic_access(priv);
9407 }
9408 spin_unlock_irqrestore(&priv->lock, flags);
9409
9410 udelay(5);
9411
9412 iwl4965_hw_nic_reset(priv);
9413
9414 /* Bring the device back up */
9415 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9416 queue_work(priv->workqueue, &priv->up);
9417 }
9418
9419 static int iwl4965_pci_resume(struct pci_dev *pdev)
9420 {
9421 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9422 int err;
9423
9424 printk(KERN_INFO "Coming out of suspend...\n");
9425
9426 pci_set_power_state(pdev, PCI_D0);
9427 err = pci_enable_device(pdev);
9428 pci_restore_state(pdev);
9429
9430 /*
9431 * Suspend/Resume resets the PCI configuration space, so we have to
9432 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
9433 * from interfering with C3 CPU state. pci_restore_state won't help
9434 * here since it only restores the first 64 bytes pci config header.
9435 */
9436 pci_write_config_byte(pdev, 0x41, 0x00);
9437
9438 iwl4965_resume(priv);
9439
9440 return 0;
9441 }
9442
9443 #endif /* CONFIG_PM */
9444
9445 /*****************************************************************************
9446 *
9447 * driver and module entry point
9448 *
9449 *****************************************************************************/
9450
9451 static struct pci_driver iwl4965_driver = {
9452 .name = DRV_NAME,
9453 .id_table = iwl4965_hw_card_ids,
9454 .probe = iwl4965_pci_probe,
9455 .remove = __devexit_p(iwl4965_pci_remove),
9456 #ifdef CONFIG_PM
9457 .suspend = iwl4965_pci_suspend,
9458 .resume = iwl4965_pci_resume,
9459 #endif
9460 };
9461
9462 static int __init iwl4965_init(void)
9463 {
9464
9465 int ret;
9466 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9467 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
9468 ret = pci_register_driver(&iwl4965_driver);
9469 if (ret) {
9470 IWL_ERROR("Unable to initialize PCI module\n");
9471 return ret;
9472 }
9473 #ifdef CONFIG_IWL4965_DEBUG
9474 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9475 if (ret) {
9476 IWL_ERROR("Unable to create driver sysfs file\n");
9477 pci_unregister_driver(&iwl4965_driver);
9478 return ret;
9479 }
9480 #endif
9481
9482 return ret;
9483 }
9484
9485 static void __exit iwl4965_exit(void)
9486 {
9487 #ifdef CONFIG_IWL4965_DEBUG
9488 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9489 #endif
9490 pci_unregister_driver(&iwl4965_driver);
9491 }
9492
9493 module_param_named(antenna, iwl4965_param_antenna, int, 0444);
9494 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9495 module_param_named(disable, iwl4965_param_disable, int, 0444);
9496 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9497 module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
9498 MODULE_PARM_DESC(hwcrypto,
9499 "using hardware crypto engine (default 0 [software])\n");
9500 module_param_named(debug, iwl4965_param_debug, int, 0444);
9501 MODULE_PARM_DESC(debug, "debug output mask");
9502 module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
9503 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9504
9505 module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
9506 MODULE_PARM_DESC(queues_num, "number of hw queues.");
9507
9508 /* QoS */
9509 module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
9510 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9511
9512 module_exit(iwl4965_exit);
9513 module_init(iwl4965_init);
WRT350N Kernel Patches