spiceparser/xcircspice.c

   1 /* xcircspice.c --- implements routine ReadSpice() for xcircuit
   2  * SPICE import.
   3  * Conrad Ziesler, Tim Edwards
   4  */
   5
   6 #include <stdio.h>
   7 #include <ctype.h>
   8
   9 #include "debug.h"
  10 #include "scanner.h"
  11 #include "netlist_spice.h"
  12
  13 #define fprintf tcl_printf
  14
  15 /*--------------------------------------------------------------*/
  16 /* Get the node name from a node structure                      */
  17 /*--------------------------------------------------------------*/
  18
  19 char *node(node_t n)
  20 {
  21   char *p;
  22   p=n->str;
  23   return p;
  24 }
  25
  26 /*--------------------------------------------------------------*/
  27 /* Make a pass through the internal representation of the       */
  28 /* SPICE input file and translate to the internal               */
  29 /* representation of the SPAR ASG code.                         */
  30 /*--------------------------------------------------------------*/
  31
  32 void generate_asg(spice_t *spice)
  33 {
  34    subckt_t *ckt = NULL, **cktpp;
  35    list_t subckts;
  36    int i, j;
  37    int uniq = 1;
  38
  39    /* Iterate over all subcircuits */
  40    subckts = spice_list_subckt(spice->ckt);
  41    list_iterate(&subckts, i, cktpp) {
  42       ckt = *cktpp;
  43
  44 do_ckt:
  45       assert(ckt != NULL);
  46       fprintf(stdout, "spiceparser: cell(%i) is \"%s\"\n", i, ckt->name);
  47
  48       for (j = 0; j < ckt->ndefn; j++) {
  49          char *nn;
  50          nn = ckt->defn[j]->str;
  51          fprintf(stdout, "pin: %s\n",nn);
  52       }
  53
  54       /* Loop through circuit MOSFET devices */
  55       /* (to be done---use model information to determine if this is a  */
  56       /* pMOS or nMOS device).                                          */
  57
  58       for (j = 0; j < ckt->nm; j++) {
  59
  60          /* For now, ignoring substrate node ckt->m[j].nodes[3]         */
  61          /* We should have two devices;  if substrate is VDD or GND,    */
  62          /* then use the 3-terminal device; otherwise, use the 4-       */
  63          /* terminal device.                                            */
  64
  65          AddNTermModule(ckt->m[j].deck->card->str, "MSFET", 4,
  66                 "D", node(ckt->m[j].nodes[0]),
  67                 "G", node(ckt->m[j].nodes[1]),
  68                 "S", node(ckt->m[j].nodes[2]),
  69                 "B", node(ckt->m[j].nodes[3]));
  70       }
  71
  72       /* Loop through circuit capacitor devices */
  73       for(j = 0; j < ckt->nc; j++) {
  74          AddNTermModule(ckt->c[j].deck->card->str, "CAPC", 2,
  75                 "1", node(ckt->c[j].nodes[0]),
  76                 "2", node(ckt->c[j].nodes[1]));
  77       }
  78
  79       /* Loop through circuit resistor devices */
  80       for (j = 0; j < ckt->nr; j++)
  81       {
  82          AddNTermModule(ckt->r[j].deck->card->str, "RESTR", 2,
  83                 "1", node(ckt->r[j].nodes[0]),
  84                 "2", node(ckt->r[j].nodes[1]));
  85       }
  86
  87       /* Loop through circuit inductor devices */
  88       for (j = 0; j < ckt->nl; j++)
  89       {
  90          AddNTermModule(ckt->l[j].deck->card->str, "INDR", 2,
  91                 "1", node(ckt->l[j].nodes[0]),
  92                 "2", node(ckt->l[j].nodes[1]));
  93       }
  94
  95       /* Loop through circuit voltage sources */
  96       for (j = 0; j < ckt->nv; j++)
  97       {
  98          AddNTermModule(ckt->v[j].deck->card->str, "VAMP", 2,
  99                 "1", node(ckt->v[j].nodes[0]),
 100                 "2", node(ckt->v[j].nodes[1]));
 101       }
 102
 103       /* Loop through circuit current sources */
 104       for (j = 0; j < ckt->ni; j++)
 105       {
 106          AddNTermModule(ckt->i[j].deck->card->str, "IAMP", 2,
 107                 "1", node(ckt->i[j].nodes[0]),
 108                 "2", node(ckt->i[j].nodes[1]));
 109       }
 110
 111       /* Loop through circuit subcircuit calls, where those     */
 112       /* calls are not defined within the file and are assumed  */
 113       /* to be primitives (this may require more checking---may */
 114       /* need to remove the x[] records when they are expanded  */
 115
 116       for (j = 0; j < ckt->nx; j++)
 117       {
 118          AddNTermModule(ckt->x[j].deck->card->str,
 119                 ckt->x[j].rest->str, 0);
 120
 121          for (i = 0; i < ckt->x[j].nn; i++)
 122              AddModuleTerm(ckt->x[j].rest->str, node(ckt->x[j].nodes[i]), i,
 123                         ckt->x[j].nn);
 124       }
 125
 126    }
 127
 128    /* kludge for getting the top-level circuit */
 129    if (ckt == spice->ckt) return;
 130    else {
 131       ckt = spice->ckt;
 132       goto do_ckt;
 133    }
 134 }
 135
 136 /*--------------------------------------------------------------*/
 137 /* Top-level call used in xcircuit (files.c) to read in a SPICE */
 138 /* file.                                                        */
 139 /*--------------------------------------------------------------*/
 140
 141 int ReadSpice(FILE *fp)
 142 {
 143    scanner_t scan;
 144    spice_t *spice;
 145
 146    scanner_init(&scan);
 147    scanner_input_newfp(&scan, fp);
 148    spice = spice_new(&scan);
 149    generate_asg(spice);
 150    spice_release(spice);
 151    return 0;
 152 }
 153