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Pull XORG-6_8_0 to CYGWIN branch
[xf86-video-sis/mirage.git] / src / sis_driver.h
blob761a25d7aec0569c549759d4bc6c4c3c57d9429c
1 /* $XFree86$ */
2 /* $XdotOrg: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h,v 1.8 2004/08/12 12:59:25 twini Exp $ */
3 /*
4 * Global data and definitions
5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1) Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2) Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3) The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * Author: Thomas Winischhofer <thomas@winischhofer.net>
31 *
32 */
33
34 /* VESA */
35 /* The following is included because there are BIOSes out there that
36 * report incomplete mode lists. These are 630 BIOS versions <2.01.2x
37 *
38 * -) VBE 3.0 on SiS300 and 315 series do not support 24 fpp modes
39 * -) Only SiS315 series support 1920x1440x32
40 */
41 /* 8 16 (24) 32 */
42 static const UShort VESAModeIndex_320x200[] = {0x138, 0x10e, 0x000, 0x000};
43 static const UShort VESAModeIndex_320x240[] = {0x132, 0x135, 0x000, 0x000};
44 static const UShort VESAModeIndex_400x300[] = {0x133, 0x136, 0x000, 0x000};
45 static const UShort VESAModeIndex_512x384[] = {0x134, 0x137, 0x000, 0x000};
46 static const UShort VESAModeIndex_640x400[] = {0x100, 0x139, 0x000, 0x000};
47 static const UShort VESAModeIndex_640x480[] = {0x101, 0x111, 0x000, 0x13a};
48 static const UShort VESAModeIndex_800x600[] = {0x103, 0x114, 0x000, 0x13b};
49 static const UShort VESAModeIndex_1024x768[] = {0x105, 0x117, 0x000, 0x13c};
50 static const UShort VESAModeIndex_1280x1024[] = {0x107, 0x11a, 0x000, 0x13d};
51 static const UShort VESAModeIndex_1600x1200[] = {0x130, 0x131, 0x000, 0x13e};
52 static const UShort VESAModeIndex_1920x1440[] = {0x13f, 0x140, 0x000, 0x141};
53
54 /* For calculating refresh rate index (CR33) */
55 static const struct _sis_vrate {
56 CARD16 idx;
57 CARD16 xres;
58 CARD16 yres;
59 CARD16 refresh;
60 BOOLEAN SiS730valid32bpp;
61 } sisx_vrate[] = {
62 {1, 320, 200, 70, TRUE},
63 {1, 320, 240, 60, TRUE},
64 {1, 400, 300, 60, TRUE},
65 {1, 512, 384, 60, TRUE},
66 {1, 640, 400, 72, TRUE},
67 {1, 640, 480, 60, TRUE}, {2, 640, 480, 72, TRUE}, {3, 640, 480, 75, TRUE},
68 {4, 640, 480, 85, TRUE}, {5, 640, 480, 100, TRUE}, {6, 640, 480, 120, TRUE},
69 {7, 640, 480, 160, FALSE}, {8, 640, 480, 200, FALSE},
70 {1, 720, 480, 60, TRUE},
71 {1, 720, 576, 58, TRUE},
72 {1, 768, 576, 58, TRUE},
73 {1, 800, 480, 60, TRUE}, {2, 800, 480, 75, TRUE}, {3, 800, 480, 85, TRUE},
74 {1, 800, 600, 56, TRUE}, {2, 800, 600, 60, TRUE}, {3, 800, 600, 72, TRUE},
75 {4, 800, 600, 75, TRUE}, {5, 800, 600, 85, TRUE}, {6, 800, 600, 105, TRUE},
76 {7, 800, 600, 120, FALSE}, {8, 800, 600, 160, FALSE},
77 {1, 848, 480, 39, TRUE}, {2, 848, 480, 60, TRUE},
78 {1, 856, 480, 39, TRUE}, {2, 856, 480, 60, TRUE},
79 {1, 960, 540, 60, TRUE},
80 {1, 960, 600, 60, TRUE},
81 {1, 1024, 576, 60, TRUE}, {2, 1024, 576, 75, TRUE}, {3, 1024, 576, 85, TRUE},
82 {1, 1024, 600, 60, TRUE},
83 {1, 1024, 768, 43, TRUE}, {2, 1024, 768, 60, TRUE}, {3, 1024, 768, 70, FALSE},
84 {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE},
85 {7, 1024, 768, 120, TRUE},
86 {1, 1152, 768, 60, TRUE},
87 {1, 1152, 864, 75, TRUE}, {2, 1152, 864, 84, FALSE},
88 {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, FALSE}, {3, 1280, 720, 85, TRUE},
89 {1, 1280, 768, 60, TRUE},
90 {1, 1280, 800, 60, TRUE},
91 {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE},
92 {1, 1280, 1024, 43, FALSE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, FALSE},
93 {4, 1280, 1024, 85, TRUE},
94 {1, 1360, 768, 60, TRUE},
95 {1, 1400, 1050, 60, TRUE}, {2, 1400, 1050, 75, TRUE},
96 {1, 1600, 1200, 60, TRUE}, {2, 1600, 1200, 65, TRUE}, {3, 1600, 1200, 70, TRUE},
97 {4, 1600, 1200, 75, TRUE}, {5, 1600, 1200, 85, TRUE}, {6, 1600, 1200, 100, TRUE},
98 {7, 1600, 1200, 120, TRUE},
99 {1, 1680, 1050, 60, TRUE},
100 {1, 1920, 1080, 30, TRUE},
101 {1, 1920, 1440, 60, TRUE}, {2, 1920, 1440, 65, TRUE}, {3, 1920, 1440, 70, TRUE},
102 {4, 1920, 1440, 75, TRUE}, {5, 1920, 1440, 85, TRUE}, {6, 1920, 1440, 100, TRUE},
103 {1, 2048, 1536, 60, TRUE}, {2, 2048, 1536, 65, TRUE}, {3, 2048, 1536, 70, TRUE},
104 {4, 2048, 1536, 75, TRUE}, {5, 2048, 1536, 85, TRUE},
105 {0, 0, 0, 0, FALSE}
106 };
107
108 /* Some 300-series laptops have a badly designed BIOS and make it
109 * impossible to detect the correct panel delay compensation. This
110 * table used to detect such machines by their PCI subsystem IDs;
111 * however, I don't know how reliable this method is. (With Asus
112 * machines, it is to general, ASUS uses the same ID for different
113 * boxes)
114 */
115 static const pdctable mypdctable[] = {
116 { 0x1071, 0x7522, 32, "Mitac", "7521T" },
117 { 0, 0, 0, "" , "" }
118 };
119
120 /* These machines require setting/clearing a GPIO bit for enabling/
121 * disabling communication with the Chrontel TV encoder
122 */
123 static const chswtable mychswtable[] = {
124 { 0x1631, 0x1002, "Mitachi", "0x1002" },
125 { 0x1071, 0x7521, "Mitac" , "7521P" },
126 { 0, 0, "" , "" }
127 };
128
129 /* These machines require special timing/handling
130 */
131 const customttable mycustomttable[] = {
132 { SIS_630, "2.00.07", "09/27/2002-13:38:25",
133 0x3240A8,
134 { 0x220, 0x227, 0x228, 0x229, 0x0ee },
135 { 0x01, 0xe3, 0x9a, 0x6a, 0xef },
136 0x1039, 0x6300,
137 "Barco", "iQ R200L/300/400", CUT_BARCO1366, "BARCO_1366"
138 },
139 { SIS_630, "2.00.07", "09/27/2002-13:38:25",
140 0x323FBD,
141 { 0x220, 0x227, 0x228, 0x229, 0x0ee },
142 { 0x00, 0x5a, 0x64, 0x41, 0xef },
143 0x1039, 0x6300,
144 "Barco", "iQ G200L/300/400/500", CUT_BARCO1024, "BARCO_1024"
145 },
146 { SIS_650, "", "",
147 0,
148 { 0, 0, 0, 0, 0 },
149 { 0, 0, 0, 0, 0 },
150 0x0e11, 0x083c,
151 "Inventec (Compaq)", "3017cl/3045US", CUT_COMPAQ12802, "COMPAQ_1280"
152 },
153 { SIS_650, "", "",
154 0, /* Special 1024x768 / dual link */
155 { 0x00c, 0, 0, 0, 0 },
156 { 'e' , 0, 0, 0, 0 },
157 0x1558, 0x0287,
158 "Clevo", "L285/L287 (Version 1)", CUT_CLEVO1024, "CLEVO_L28X_1"
159 },
160 { SIS_650, "", "",
161 0, /* Special 1024x768 / single link */
162 { 0x00c, 0, 0, 0, 0 },
163 { 'y' , 0, 0, 0, 0 },
164 0x1558, 0x0287,
165 "Clevo", "L285/L287 (Version 2)", CUT_CLEVO10242, "CLEVO_L28X_2"
166 },
167 { SIS_650, "", "",
168 0, /* Special 1400x1050 */
169 { 0, 0, 0, 0, 0 },
170 { 0, 0, 0, 0, 0 },
171 0x1558, 0x0400, /* possibly 401 and 402 as well; not panelsize specific? */
172 "Clevo", "D400S/D410S/D400H/D410H", CUT_CLEVO1400, "CLEVO_D4X0"
173 },
174 { SIS_650, "", "",
175 0, /* Shift LCD in LCD-via-CRT1 mode */
176 { 0, 0, 0, 0, 0 },
177 { 0, 0, 0, 0, 0 },
178 0x1558, 0x2263,
179 "Clevo", "D22ES/D27ES", CUT_UNIWILL1024, "CLEVO_D2X0ES"
180 },
181 { SIS_650, "", "",
182 0, /* Shift LCD in LCD-via-CRT1 mode */
183 { 0, 0, 0, 0, 0 },
184 { 0, 0, 0, 0, 0 },
185 0x1734, 0x101f,
186 "Uniwill", "N243S9", CUT_UNIWILL1024, "UNIWILL_N243S9"
187 },
188 { SIS_650, "", "",
189 0, /* Shift LCD in LCD-via-CRT1 mode */
190 { 0, 0, 0, 0, 0 },
191 { 0, 0, 0, 0, 0 },
192 0x1584, 0x5103,
193 "Uniwill", "N35BS1", CUT_UNIWILL10242, "UNIWILL_N35BS1"
194 },
195 { SIS_650, "1.09.2c", "", /* Other versions, too? */
196 0, /* Shift LCD in LCD-via-CRT1 mode */
197 { 0, 0, 0, 0, 0 },
198 { 0, 0, 0, 0, 0 },
199 0x1019, 0x0f05,
200 "ECS", "A928", CUT_UNIWILL1024, "ECS_A928"
201 },
202 { SIS_740, "1.11.27a", "",
203 0,
204 { 0, 0, 0, 0, 0 },
205 { 0, 0, 0, 0, 0 },
206 0x1043, 0x1612,
207 "Asus", "L3000D/L3500D", CUT_ASUSL3000D, "ASUS_L3X00"
208 },
209 { SIS_650, "1.10.9k", "",
210 0, /* For EMI */
211 { 0, 0, 0, 0, 0 },
212 { 0, 0, 0, 0, 0 },
213 0x1025, 0x0028,
214 "Acer", "Aspire 1700", CUT_ACER1280, "ACER_ASPIRE1700"
215 },
216 { SIS_650, "1.10.7w", "",
217 0, /* For EMI */
218 { 0, 0, 0, 0, 0 },
219 { 0, 0, 0, 0, 0 },
220 0x14c0, 0x0012,
221 "Compal", "??? (V1)", CUT_COMPAL1400_1, "COMPAL_1400_1"
222 },
223 { SIS_650, "1.10.7x", "", /* New BIOS on its way (from BG.) */
224 0, /* For EMI */
225 { 0, 0, 0, 0, 0 },
226 { 0, 0, 0, 0, 0 },
227 0x14c0, 0x0012,
228 "Compal", "??? (V2)", CUT_COMPAL1400_2, "COMPAL_1400_2"
229 },
230 { SIS_650, "1.10.8o", "",
231 0, /* For EMI (unknown) */
232 { 0, 0, 0, 0, 0 },
233 { 0, 0, 0, 0, 0 },
234 0x1043, 0x1612,
235 "Asus", "A2H (V1)", CUT_ASUSA2H_1, "ASUS_A2H_1"
236 },
237 { SIS_650, "1.10.8q", "",
238 0, /* For EMI */
239 { 0, 0, 0, 0, 0 },
240 { 0, 0, 0, 0, 0 },
241 0x1043, 0x1612,
242 "Asus", "A2H (V2)", CUT_ASUSA2H_2, "ASUS_A2H_2"
243 },
244 { 4321, "", "", /* never autodetected */
245 0,
246 { 0, 0, 0, 0, 0 },
247 { 0, 0, 0, 0, 0 },
248 0, 0,
249 "Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480"
250 },
251 { 0, "", "",
252 0,
253 { 0, 0, 0, 0 },
254 { 0, 0, 0, 0 },
255 0, 0,
256 "", "", CUT_NONE, ""
257 }
258 };
259
260 /* Our TV modes for the 6326. The data in these structures
261 * is mainly correct, but since we use our private CR and
262 * clock values anyway, small errors do no matter.
263 */
264 static DisplayModeRec SiS6326PAL800x600Mode = {
265 NULL, NULL, /* prev, next */
266 "PAL800x600", /* identifier of this mode */
267 MODE_OK, /* mode status */
268 M_T_BUILTIN, /* mode type */
269 36000, /* Clock frequency */
270 800, /* HDisplay */
271 848, /* HSyncStart */
272 912, /* HSyncEnd */
273 1008, /* HTotal */
274 0, /* HSkew */
275 600, /* VDisplay */
276 600, /* VSyncStart */
277 602, /* VSyncEnd */
278 625, /* VTotal */
279 0, /* VScan */
280 V_PHSYNC | V_PVSYNC, /* Flags */
281 -1, /* ClockIndex */
282 36000, /* SynthClock */
283 800, /* CRTC HDisplay */
284 808, /* CRTC HBlankStart */
285 848, /* CRTC HSyncStart */
286 912, /* CRTC HSyncEnd */
287 1008, /* CRTC HBlankEnd */
288 1008, /* CRTC HTotal */
289 0, /* CRTC HSkew */
290 600, /* CRTC VDisplay */
291 600, /* CRTC VBlankStart */
292 600, /* CRTC VSyncStart */
293 602, /* CRTC VSyncEnd */
294 625, /* CRTC VBlankEnd */
295 625, /* CRTC VTotal */
296 FALSE, /* CrtcHAdjusted */
297 FALSE, /* CrtcVAdjusted */
298 0, /* PrivSize */
299 NULL, /* Private */
300 0.0, /* HSync */
301 0.0 /* VRefresh */
302 };
303
304 /* Due to the scaling method this mode uses, the vertical data here
305 * does not match the CR data. But this does not matter, we use our
306 * private CR data anyway.
307 */
308 static DisplayModeRec SiS6326PAL800x600UMode = {
309 NULL, /* prev */
310 &SiS6326PAL800x600Mode, /* next */
311 "PAL800x600U", /* identifier of this mode */
312 MODE_OK, /* mode status */
313 M_T_BUILTIN, /* mode type */
314 37120, /* Clock frequency */
315 800, /* HDisplay */
316 872, /* HSyncStart */
317 984, /* HSyncEnd */
318 1088, /* HTotal */
319 0, /* HSkew */
320 600, /* VDisplay (548 due to scaling) */
321 600, /* VSyncStart (584) */
322 602, /* VSyncEnd (586) */
323 625, /* VTotal */
324 0, /* VScan */
325 V_PHSYNC | V_PVSYNC, /* Flags */
326 -1, /* ClockIndex */
327 37120, /* SynthClock */
328 800, /* CRTC HDisplay */
329 808, /* CRTC HBlankStart */
330 872, /* CRTC HSyncStart */
331 984, /* CRTC HSyncEnd */
332 1024, /* CRTC HBlankEnd */
333 1088, /* CRTC HTotal */
334 0, /* CRTC HSkew */
335 600, /* CRTC VDisplay (548 due to scaling) */
336 600, /* CRTC VBlankStart (600) */
337 600, /* CRTC VSyncStart (584) */
338 602, /* CRTC VSyncEnd (586) */
339 625, /* CRTC VBlankEnd */
340 625, /* CRTC VTotal */
341 FALSE, /* CrtcHAdjusted */
342 FALSE, /* CrtcVAdjusted */
343 0, /* PrivSize */
344 NULL, /* Private */
345 0.0, /* HSync */
346 0.0 /* VRefresh */
347 };
348
349 static DisplayModeRec SiS6326PAL720x540Mode = {
350 NULL, /* prev */
351 &SiS6326PAL800x600UMode, /* next */
352 "PAL720x540", /* identifier of this mode */
353 MODE_OK, /* mode status */
354 M_T_BUILTIN, /* mode type */
355 36000, /* Clock frequency */
356 720, /* HDisplay */
357 816, /* HSyncStart */
358 920, /* HSyncEnd */
359 1008, /* HTotal */
360 0, /* HSkew */
361 540, /* VDisplay */
362 578, /* VSyncStart */
363 580, /* VSyncEnd */
364 625, /* VTotal */
365 0, /* VScan */
366 V_PHSYNC | V_PVSYNC, /* Flags */
367 -1, /* ClockIndex */
368 36000, /* SynthClock */
369 720, /* CRTC HDisplay */
370 736, /* CRTC HBlankStart */
371 816, /* CRTC HSyncStart */
372 920, /* CRTC HSyncEnd */
373 1008, /* CRTC HBlankEnd */
374 1008, /* CRTC HTotal */
375 0, /* CRTC HSkew */
376 540, /* CRTC VDisplay */
377 577, /* CRTC VBlankStart */
378 578, /* CRTC VSyncStart */
379 580, /* CRTC VSyncEnd */
380 625, /* CRTC VBlankEnd */
381 625, /* CRTC VTotal */
382 FALSE, /* CrtcHAdjusted */
383 FALSE, /* CrtcVAdjusted */
384 0, /* PrivSize */
385 NULL, /* Private */
386 0.0, /* HSync */
387 0.0 /* VRefresh */
388 };
389
390 static DisplayModeRec SiS6326PAL640x480Mode = {
391 NULL, /* prev */
392 &SiS6326PAL720x540Mode, /* next */
393 "PAL640x480", /* identifier of this mode */
394 MODE_OK, /* mode status */
395 M_T_BUILTIN, /* mode type */
396 36000, /* Clock frequency */
397 640, /* HDisplay */
398 768, /* HSyncStart */
399 920, /* HSyncEnd */
400 1008, /* HTotal */
401 0, /* HSkew */
402 480, /* VDisplay */
403 532, /* VSyncStart */
404 534, /* VSyncEnd */
405 625, /* VTotal */
406 0, /* VScan */
407 V_NHSYNC | V_NVSYNC, /* Flags */
408 -1, /* ClockIndex */
409 36000, /* SynthClock */
410 640, /* CRTC HDisplay */
411 648, /* CRTC HBlankStart */
412 768, /* CRTC HSyncStart */
413 920, /* CRTC HSyncEnd */
414 944, /* CRTC HBlankEnd */
415 1008, /* CRTC HTotal */
416 0, /* CRTC HSkew */
417 480, /* CRTC VDisplay */
418 481, /* CRTC VBlankStart */
419 532, /* CRTC VSyncStart */
420 534, /* CRTC VSyncEnd */
421 561, /* CRTC VBlankEnd */
422 625, /* CRTC VTotal */
423 FALSE, /* CrtcHAdjusted */
424 FALSE, /* CrtcVAdjusted */
425 0, /* PrivSize */
426 NULL, /* Private */
427 0.0, /* HSync */
428 0.0 /* VRefresh */
429 };
430
431 static DisplayModeRec SiS6326NTSC640x480Mode = {
432 NULL, NULL, /* prev, next */
433 "NTSC640x480", /* identifier of this mode */
434 MODE_OK, /* mode status */
435 M_T_BUILTIN, /* mode type */
436 27000, /* Clock frequency */
437 640, /* HDisplay */
438 664, /* HSyncStart */
439 760, /* HSyncEnd */
440 800, /* HTotal */
441 0, /* HSkew */
442 480, /* VDisplay */
443 489, /* VSyncStart */
444 491, /* VSyncEnd */
445 525, /* VTotal */
446 0, /* VScan */
447 V_NHSYNC | V_NVSYNC, /* Flags */
448 -1, /* ClockIndex */
449 27000, /* SynthClock */
450 640, /* CRTC HDisplay */
451 648, /* CRTC HBlankStart */
452 664, /* CRTC HSyncStart */
453 760, /* CRTC HSyncEnd */
454 792, /* CRTC HBlankEnd */
455 800, /* CRTC HTotal */
456 0, /* CRTC HSkew */
457 480, /* CRTC VDisplay */
458 488, /* CRTC VBlankStart */
459 489, /* CRTC VSyncStart */
460 491, /* CRTC VSyncEnd */
461 517, /* CRTC VBlankEnd */
462 525, /* CRTC VTotal */
463 FALSE, /* CrtcHAdjusted */
464 FALSE, /* CrtcVAdjusted */
465 0, /* PrivSize */
466 NULL, /* Private */
467 0.0, /* HSync */
468 0.0 /* VRefresh */
469 };
470
471 /* Due to the scaling method this mode uses, the vertical data here
472 * does not match the CR data. But this does not matter, we use our
473 * private CR data anyway.
474 */
475 static DisplayModeRec SiS6326NTSC640x480UMode = {
476 NULL, /* prev */
477 &SiS6326NTSC640x480Mode, /* next */
478 "NTSC640x480U", /* identifier of this mode */
479 MODE_OK, /* mode status */
480 M_T_BUILTIN, /* mode type */
481 32215, /* Clock frequency */
482 640, /* HDisplay */
483 696, /* HSyncStart */
484 840, /* HSyncEnd */
485 856, /* HTotal */
486 0, /* HSkew */
487 480, /* VDisplay (439 due to scaling) */
488 489, /* VSyncStart (473) */
489 491, /* VSyncEnd (475) */
490 525, /* VTotal */
491 0, /* VScan */
492 V_NHSYNC | V_NVSYNC, /* Flags */
493 -1, /* ClockIndex */
494 32215, /* SynthClock */
495 640, /* CRTC HDisplay */
496 656, /* CRTC HBlankStart */
497 696, /* CRTC HSyncStart */
498 840, /* CRTC HSyncEnd */
499 856, /* CRTC HBlankEnd */
500 856, /* CRTC HTotal */
501 0, /* CRTC HSkew */
502 480, /* CRTC VDisplay */
503 488, /* CRTC VBlankStart */
504 489, /* CRTC VSyncStart */
505 491, /* CRTC VSyncEnd */
506 517, /* CRTC VBlankEnd */
507 525, /* CRTC VTotal */
508 FALSE, /* CrtcHAdjusted */
509 FALSE, /* CrtcVAdjusted */
510 0, /* PrivSize */
511 NULL, /* Private */
512 0.0, /* HSync */
513 0.0 /* VRefresh */
514 };
515
516
517 static DisplayModeRec SiS6326NTSC640x400Mode = {
518 NULL, /* prev */
519 &SiS6326NTSC640x480UMode, /* next */
520 "NTSC640x400", /* identifier of this mode */
521 MODE_OK, /* mode status */
522 M_T_BUILTIN, /* mode type */
523 27000, /* Clock frequency */
524 640, /* HDisplay */
525 664, /* HSyncStart */
526 760, /* HSyncEnd */
527 800, /* HTotal */
528 0, /* HSkew */
529 400, /* VDisplay */
530 459, /* VSyncStart */
531 461, /* VSyncEnd */
532 525, /* VTotal */
533 0, /* VScan */
534 V_NHSYNC | V_NVSYNC, /* Flags */
535 -1, /* ClockIndex */
536 27000, /* SynthClock */
537 640, /* CRTC HDisplay */
538 648, /* CRTC HBlankStart */
539 664, /* CRTC HSyncStart */
540 760, /* CRTC HSyncEnd */
541 792, /* CRTC HBlankEnd */
542 800, /* CRTC HTotal */
543 0, /* CRTC HSkew */
544 400, /* CRTC VDisplay */
545 407, /* CRTC VBlankStart */
546 459, /* CRTC VSyncStart */
547 461, /* CRTC VSyncEnd */
548 490, /* CRTC VBlankEnd */
549 525, /* CRTC VTotal */
550 FALSE, /* CrtcHAdjusted */
551 FALSE, /* CrtcVAdjusted */
552 0, /* PrivSize */
553 NULL, /* Private */
554 0.0, /* HSync */
555 0.0 /* VRefresh */
556 };
557
558 /* Built-in hi-res modes for the 6326.
559 * For some reason, our default mode lines and the
560 * clock calculation functions in sis_dac.c do no
561 * good job on higher clocks. It seems, the hardware
562 * needs some tricks so make mode with higher clock
563 * rates than ca. 120MHz work. I didn't bother trying
564 * to find out what exactly is going wrong, so I
565 * implemented two special modes instead for 1280x1024
566 * and 1600x1200. These two are automatically added
567 * to the list if they are supported with the current
568 * depth.
569 * The data in the strucures below is a proximation,
570 * in sis_vga.c the register contents are fetched from
571 * fixed tables anyway.
572 */
573 static DisplayModeRec SiS6326SIS1280x1024_75Mode = {
574 NULL, /* prev */
575 NULL, /* next */
576 "SIS1280x1024-75", /* identifier of this mode */
577 MODE_OK, /* mode status */
578 M_T_BUILTIN, /* mode type */
579 135000, /* Clock frequency */
580 1280, /* HDisplay */
581 1296, /* HSyncStart */
582 1440, /* HSyncEnd */
583 1688, /* HTotal */
584 0, /* HSkew */
585 1024, /* VDisplay */
586 1025, /* VSyncStart */
587 1028, /* VSyncEnd */
588 1066, /* VTotal */
589 0, /* VScan */
590 V_PHSYNC | V_PVSYNC, /* Flags */
591 -1, /* ClockIndex */
592 135000, /* SynthClock */
593 1280, /* CRTC HDisplay */
594 1280, /* CRTC HBlankStart */
595 1296, /* CRTC HSyncStart */
596 1440, /* CRTC HSyncEnd */
597 1680, /* CRTC HBlankEnd */
598 1688, /* CRTC HTotal */
599 0, /* CRTC HSkew */
600 1024, /* CRTC VDisplay */
601 1024, /* CRTC VBlankStart */
602 1025, /* CRTC VSyncStart */
603 1028, /* CRTC VSyncEnd */
604 1065, /* CRTC VBlankEnd */
605 1066, /* CRTC VTotal */
606 FALSE, /* CrtcHAdjusted */
607 FALSE, /* CrtcVAdjusted */
608 0, /* PrivSize */
609 NULL, /* Private */
610 0.0, /* HSync */
611 0.0 /* VRefresh */
612 };
613
614 static DisplayModeRec SiS6326SIS1600x1200_60Mode = {
615 NULL, /* prev */
616 NULL, /* next */
617 "SIS1600x1200-60", /* identifier of this mode */
618 MODE_OK, /* mode status */
619 M_T_BUILTIN, /* mode type */
620 162000, /* Clock frequency */
621 1600, /* HDisplay */
622 1664, /* HSyncStart */
623 1856, /* HSyncEnd */
624 2160, /* HTotal */
625 0, /* HSkew */
626 1200, /* VDisplay */
627 1201, /* VSyncStart */
628 1204, /* VSyncEnd */
629 1250, /* VTotal */
630 0, /* VScan */
631 V_PHSYNC | V_PVSYNC, /* Flags */
632 -1, /* ClockIndex */
633 162000, /* SynthClock */
634 1600, /* CRTC HDisplay */
635 1600, /* CRTC HBlankStart */
636 1664, /* CRTC HSyncStart */
637 1856, /* CRTC HSyncEnd */
638 2152, /* CRTC HBlankEnd */
639 2160, /* CRTC HTotal */
640 0, /* CRTC HSkew */
641 1200, /* CRTC VDisplay */
642 1200, /* CRTC VBlankStart */
643 1201, /* CRTC VSyncStart */
644 1204, /* CRTC VSyncEnd */
645 1249, /* CRTC VBlankEnd */
646 1250, /* CRTC VTotal */
647 FALSE, /* CrtcHAdjusted */
648 FALSE, /* CrtcVAdjusted */
649 0, /* PrivSize */
650 NULL, /* Private */
651 0.0, /* HSync */
652 0.0 /* VRefresh */
653 };
654
655 /* TV filters for SiS video bridges
656 */
657 static const struct _SiSTVFilter301 {
658 unsigned char filter[7][4];
659 } SiSTVFilter301[] = {
660 {{ {0x00,0xE0,0x10,0x60}, /* NTSCFilter - 320 */
661 {0x00,0xEE,0x10,0x44},
662 {0x00,0xF4,0x10,0x38},
663 {0xF8,0xF4,0x18,0x38},
664 {0xFC,0xFB,0x14,0x2A},
665 {0x00,0x00,0x10,0x20},
666 {0x00,0x04,0x10,0x18} }},
667 {{ {0xF5,0xEE,0x1B,0x44}, /* NTSCFilter - 640 */
668 {0xF8,0xF4,0x18,0x38},
669 {0xEB,0x04,0x25,0x18},
670 {0xF1,0x05,0x1F,0x16},
671 {0xF6,0x06,0x1A,0x14},
672 {0xFA,0x06,0x16,0x14},
673 {0x00,0x04,0x10,0x18} }},
674 {{ {0xEB,0x04,0x25,0x18}, /* NTSCFilter - 720 */
675 {0xE7,0x0E,0x29,0x04},
676 {0xEE,0x0C,0x22,0x08},
677 {0xF6,0x0B,0x1A,0x0A},
678 {0xF9,0x0A,0x17,0x0C},
679 {0xFC,0x0A,0x14,0x0C},
680 {0x00,0x08,0x10,0x10} }},
681 {{ {0xEC,0x02,0x24,0x1C}, /* NTSCFilter - 800/400 */
682 {0xF2,0x04,0x1E,0x18},
683 {0xEB,0x15,0x25,0xF6},
684 {0xF4,0x10,0x1C,0x00},
685 {0xF8,0x0F,0x18,0x02},
686 {0x00,0x04,0x10,0x18},
687 {0x01,0x06,0x0F,0x14} }},
688 {{ {0x00,0xE0,0x10,0x60}, /* PALFilter - 320 */
689 {0x00,0xEE,0x10,0x44},
690 {0x00,0xF4,0x10,0x38},
691 {0xF8,0xF4,0x18,0x38},
692 {0xFC,0xFB,0x14,0x2A},
693 {0x00,0x00,0x10,0x20},
694 {0x00,0x04,0x10,0x18} }},
695 {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 640 */
696 {0xF8,0xF4,0x18,0x38},
697 {0xF1,0xF7,0x1F,0x32},
698 {0xF5,0xFB,0x1B,0x2A},
699 {0xF9,0xFF,0x17,0x22},
700 {0xFB,0x01,0x15,0x1E},
701 {0x00,0x04,0x10,0x18} }},
702 {{ {0xF5,0xEE,0x1B,0x2A}, /* PALFilter - 720 */
703 {0xEE,0xFE,0x22,0x24},
704 {0xF3,0x00,0x1D,0x20},
705 {0xF9,0x03,0x17,0x1A},
706 {0xFB,0x02,0x14,0x1E},
707 {0xFB,0x04,0x15,0x18},
708 {0x00,0x06,0x10,0x14} }},
709 {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 800/400 */
710 {0xF8,0xF4,0x18,0x38},
711 {0xFC,0xFB,0x14,0x2A},
712 {0xEB,0x05,0x25,0x16},
713 {0xF1,0x05,0x1F,0x16},
714 {0xFA,0x07,0x16,0x12},
715 {0x00,0x07,0x10,0x12} }}
716 };
717
718 static const struct _SiSTVFilter301B {
719 unsigned char filter[7][7];
720 } SiSTVFilter301B[] = {
721 {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* NTSC - 640 */
722 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
723 {0x01,0x01,0x00,0xf6,0x00,0x28,0x40},
724 {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46},
725 {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46},
726 {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a},
727 {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }},
728 {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* NTSC - 720 (?) */
729 {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36},
730 {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38},
731 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
732 {0x01,0x03,0xff,0xf6,0x00,0x27,0x40},
733 {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42},
734 {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }},
735 {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* NTSC - 800 */
736 {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30},
737 {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34},
738 {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38},
739 {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38},
740 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
741 {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }},
742 {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* NTSC - 1024 */
743 {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26},
744 {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28},
745 {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28},
746 {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c},
747 {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e},
748 {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }},
749 {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* PAL - 640 */
750 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
751 {0x01,0x01,0x00,0xf6,0x00,0x28,0x40},
752 {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46},
753 {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46},
754 {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a},
755 {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }},
756 {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* PAL - 720/768 */
757 {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36},
758 {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38},
759 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
760 {0x01,0x03,0xff,0xf6,0x00,0x27,0x40},
761 {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42},
762 {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }},
763 {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* PAL - 800 */
764 {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30},
765 {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34},
766 {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38},
767 {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38},
768 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c},
769 {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }},
770 {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* PAL - 1024 */
771 {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26},
772 {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28},
773 {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28},
774 {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c},
775 {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e},
776 {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }}
777 };
778
779 /* TV scaling data for SiS video bridges
780 */
781 typedef struct _SiSTVVScale {
782 unsigned short ScaleVDE;
783 int sindex;
784 unsigned short RealVDE;
785 #if 0
786 unsigned short HT, HRS, HRE, VT, VRS, VRE;
787 unsigned short NFF, HCFACT, HCMAX, VBHT, VBVT, VBHRS;
788 unsigned short HT300, HRS300, HRE300, VT300, VRS300, VRE300;
789 unsigned short NFF300, HCFACT300, HCMAX300, VBHT300, VBVT300, VBHRS300;
790 #endif
791 unsigned short reg[24];
792 } MySiSTVVScale, *MySiSTVVScalePtr;
793
794 static const MySiSTVVScale SiSTVVScale[] = {
795 { 0x01D6, 3, 480, /* NTSC 640 */
796 { 0x037C, 0x02B0, 0x00EF, 0x01FA, 0x01E7, 0x01E9,
797 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x00D4,
798 0x037C, 0x02CB, 0x0049, 0x01FB, 0x01EE, 0x01F0,
799 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x00E0 }
800 },
801 { 0x01CC, 2, 480,
802 { 0x0369, 0x02AD, 0x00E7, 0x01FF, 0x01E8, 0x01EB,
803 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x00D4,
804 0x0369, 0x02C6, 0x003A, 0x0200, 0x01F0, 0x01F3,
805 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x00E0 }
806 },
807 { 0x01C2, 1, 480,
808 { 0x0356, 0x02AB, 0x00E0, 0x0204, 0x01E9, 0x01EC,
809 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x00D4,
810 0x0356, 0x02C1, 0x002B, 0x0205, 0x01F3, 0x01F6,
811 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x00E0 }
812 },
813 { 0x01B8, 0, 480, /* default */
814 { 0x0343, 0x02A9, 0x00DA, 0x0209, 0x01EA, 0x01ED,
815 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x00D4,
816 0x0343, 0x02BD, 0x001F, 0x020A, 0x01F5, 0x01F8,
817 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x00E0 }
818 },
819 { 0x01AE, -1, 480,
820 { 0x035B, 0x02AC, 0x00E3, 0x020E, 0x01EC, 0x01F0,
821 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x0152,
822 0x035B, 0x02C3, 0x0031, 0x020F, 0x01F8, 0x01FC,
823 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x015E }
824 },
825 { 0x01A4, -2, 480,
826 { 0x0347, 0x02A9, 0x00DB, 0x0213, 0x01ED, 0x01F1,
827 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x0102,
828 0x0347, 0x02BE, 0x0022, 0x0214, 0x01FA, 0x01FE,
829 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x010E }
830 },
831 { 0x019A, -3, 480,
832 { 0x0333, 0x02A7, 0x00D4, 0x0218, 0x01EE, 0x01F2,
833 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x016A,
834 0x0333, 0x02B9, 0x0013, 0x0219, 0x01FD, 0x0201,
835 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x016A }
836 },
837 { 0x01D6, 3, 480, /* NTSC 720 */
838 { 0x037C, 0x0307, 0x005D, 0x01FB, 0x01EE, 0x01F0,
839 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x0090 }
840 },
841 { 0x01CC, 2, 480,
842 { 0x0369, 0x0302, 0x004E, 0x0200, 0x01F0, 0x01F3,
843 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x0090 }
844 },
845 { 0x01C2, 1, 480,
846 { 0x0356, 0x02FD, 0x003F, 0x0205, 0x01F3, 0x01F6,
847 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x0090 }
848 },
849 { 0x01B8, 0, 480, /* default */
850 { 0x0343, 0x02F9, 0x0033, 0x020A, 0x01F5, 0x01F8,
851 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x0090 }
852 },
853 { 0x01AE, -1, 480,
854 { 0x035B, 0x02FF, 0x0045, 0x020F, 0x01F8, 0x01FC,
855 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x010E }
856 },
857 { 0x01A4, -2, 480,
858 { 0x0347, 0x02FA, 0x0036, 0x0214, 0x01FA, 0x01FE,
859 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x00BE }
860 },
861 { 0x019A, -3, 480,
862 { 0x0333, 0x02F5, 0x0027, 0x0219, 0x01FD, 0x0201,
863 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x0136 }
864 },
865 { 0x01D6, 3, 600, /* NTSC 800 */
866 { 0x0438, 0x0353, 0x0099, 0x0272, 0x025F, 0x0261,
867 0x0000, 0x0073, 0x008F, 0x0438, 0x0273, 0x020A,
868 0x0438, 0x0372, 0x00FE, 0x0273, 0x0266, 0x0268,
869 0x0000, 0x0073, 0x008F, 0x0438, 0x0273, 0x020A }
870 },
871 { 0x01CC, 2, 600,
872 { 0x0421, 0x0350, 0x0090, 0x0277, 0x0260, 0x0263,
873 0x0000, 0x0073, 0x008F, 0x0421, 0x0278, 0x020A,
874 0x0421, 0x036C, 0x00EC, 0x0278, 0x0268, 0x026B,
875 0x0000, 0x0073, 0x008F, 0x0421, 0x0278, 0x020A }
876 },
877 { 0x01C2, 1, 600,
878 { 0x0413, 0x034F, 0x008C, 0x027C, 0x0261, 0x0264,
879 0x0000, 0x0074, 0x008F, 0x0413, 0x027D, 0x01FE,
880 0x0413, 0x0369, 0x00E3, 0x027D, 0x026B, 0x026E,
881 0x0000, 0x0074, 0x008F, 0x0413, 0x027D, 0x020C }
882 },
883 { 0x01B8, 0, 600, /* default */
884 { 0x041F, 0x0350, 0x0090, 0x0281, 0x0262, 0x0265,
885 0x0000, 0x0078, 0x008F, 0x041F, 0x0282, 0x0220,
886 0x041F, 0x036C, 0x00EC, 0x0282, 0x026D, 0x0270,
887 0x0001, 0x0078, 0x008F, 0x041F, 0x0282, 0x0220 }
888 },
889 { 0x01AE, -1, 600,
890 { 0x0407, 0x034D, 0x0087, 0x0286, 0x0264, 0x0268,
891 0x0000, 0x0078, 0x008F, 0x0407, 0x0287, 0x0220,
892 0x0407, 0x0366, 0x00DA, 0x0287, 0x0270, 0x0274,
893 0x0001, 0x0078, 0x008F, 0x0407, 0x0287, 0x0220 }
894 },
895 { 0x01A4, -2, 600,
896 { 0x03EF, 0x034A, 0x007E, 0x028B, 0x0265, 0x0269,
897 0x0000, 0x0078, 0x008F, 0x03EF, 0x028C, 0x0220,
898 0x03EF, 0x0360, 0x00C8, 0x028C, 0x0272, 0x0276,
899 0x0001, 0x0078, 0x008F, 0x03EF, 0x028C, 0x0220 }
900 },
901 { 0x019A, -3, 600,
902 { 0x0429, 0x0351, 0x0093, 0x0290, 0x0266, 0x026A,
903 0x0000, 0x0082, 0x008F, 0x0429, 0x0291, 0x024E,
904 0x0429, 0x036E, 0x00F2, 0x0291, 0x0275, 0x0279,
905 0x0001, 0x0082, 0x008F, 0x0429, 0x0291, 0x024E }
906 },
907 { 0x0230, 3, 480, /* PAL 640 */
908 { 0x0371, 0x02AE, 0x00EA, 0x01FF, 0x01E8, 0x01EB,
909 0x0000, 0x0007, 0x0010, 0x0371, 0x0200, 0x0032,
910 0x0371, 0x02C8, 0x0040, 0x0200, 0x01F0, 0x01F3,
911 0x0000, 0x000E, 0x0020, 0x0371, 0x0200, 0x0032 }
912 },
913 { 0x0226, 2, 480,
914 { 0x0383, 0x02B1, 0x00F2, 0x0204, 0x01E9, 0x01EC,
915 0x0000, 0x0005, 0x000B, 0x0383, 0x0205, 0x0032,
916 0x0383, 0x02CD, 0x004F, 0x0205, 0x01F3, 0x01F6,
917 0x0000, 0x0005, 0x000B, 0x0383, 0x0205, 0x0032 }
918 },
919 { 0x021C, 1, 480,
920 { 0x035F, 0x02AC, 0x00E4, 0x0209, 0x01EA, 0x01ED,
921 0x0000, 0x0004, 0x0009, 0x035F, 0x020A, 0x0032,
922 0x035F, 0x02C4, 0x0034, 0x020A, 0x01F5, 0x01F8,
923 0x0000, 0x0004, 0x0009, 0x035F, 0x020A, 0x0032 }
924 },
925 { 0x0212, 0, 480, /* default */
926 { 0x034F, 0x02AA, 0x00DE, 0x020E, 0x01EC, 0x01F0,
927 0x0000, 0x0004, 0x0009, 0x034F, 0x020F, 0x0032,
928 0x034F, 0x02C0, 0x0028, 0x020F, 0x01F8, 0x01FC,
929 0x0000, 0x0004, 0x0009, 0x034F, 0x020F, 0x0032 }
930 },
931 { 0x0208, -1, 480,
932 { 0x033F, 0x02A8, 0x00D8, 0x0213, 0x01ED, 0x01F1,
933 0x0000, 0x0004, 0x0009, 0x033F, 0x0214, 0x0032,
934 0x033F, 0x02BC, 0x001C, 0x0214, 0x01FA, 0x01FE,
935 0x0000, 0x0004, 0x0009, 0x033F, 0x0214, 0x0032 }
936 },
937 { 0x01FE, -2, 480,
938 { 0x0395, 0x02B3, 0x00F8, 0x0218, 0x01EE, 0x01F2,
939 0x0000, 0x0001, 0x0002, 0x0395, 0x0219, 0x0032,
940 0x0395, 0x02D1, 0x005B, 0x0219, 0x01FD, 0x0201,
941 0x0000, 0x0001, 0x0002, 0x0395, 0x0219, 0x0032 }
942 },
943 { 0x01F4, -3, 480,
944 { 0x0383, 0x02B1, 0x00F2, 0x021D, 0x01EF, 0x01F3,
945 0x0000, 0x0001, 0x0002, 0x0383, 0x021E, 0x0032,
946 0x0383, 0x02CD, 0x004F, 0x021E, 0x01FF, 0x0203,
947 0x0000, 0x0001, 0x0002, 0x0383, 0x021E, 0x0032 }
948 },
949 { 0x0230, 2, 576, /* PAL 720 */
950 { 0x03BF, 0x0318, 0x0090, 0x0260, 0x0250, 0x0253,
951 0x0000, 0x0004, 0x0007, 0x03BF, 0x0260, 0x00E0,
952 0x6954, 0x6C6C, 0x5320, 0x666F, 0x6169, 0x4220,
953 0x7265, 0x746E, 0x7373, 0x6E6F, 0x0260, 0x00E0 }
954 },
955 { 0x0226, 1, 576,
956 { 0x03DD, 0x031F, 0x00A5, 0x0265, 0x0253, 0x0256,
957 0x0000, 0x0003, 0x0005, 0x03DD, 0x0265, 0x013B,
958 0x7242, 0x756F, 0x6867, 0x2074, 0x6F74, 0x7920,
959 0x756F, 0x6220, 0x2079, 0x6F6E, 0x2074, 0x2061 }
960 },
961 { 0x021C, 0, 576, /* default */
962 { 0x0437, 0x0336, 0x00EA, 0x026A, 0x0255, 0x0258,
963 0x0000, 0x0002, 0x0003, 0x0437, 0x026A, 0x0180,
964 0x656D, 0x6572, 0x5720, 0x7A69, 0x7261, 0x2064,
965 0x7562, 0x2074, 0x6874, 0x2065, 0x0274, 0x01CE }
966 },
967 { 0x0212, -1, 576,
968 { 0x0423, 0x0331, 0x00DB, 0x026F, 0x0258, 0x025C,
969 0x0001, 0x0002, 0x0003, 0x0423, 0x026F, 0x01CA,
970 0x6957, 0x617A, 0x6472, 0x4520, 0x7478, 0x6172,
971 0x726F, 0x6964, 0x616E, 0x7269, 0x3A65, 0x01CE }
972 },
973 { 0x0208, -2, 576,
974 { 0x040F, 0x032C, 0x00CC, 0x0274, 0x025A, 0x025E,
975 0x0000, 0x0002, 0x0003, 0x040F, 0x0274, 0x01CA,
976 0x6854, 0x6D6F, 0x7361, 0x5720, 0x6E69, 0x7369,
977 0x6863, 0x6F68, 0x6566, 0x2172, 0x027E, 0x01CA }
978 },
979 { 0x01FE, -3, 576,
980 { 0x03FB, 0x0327, 0x00BD, 0x0279, 0x025D, 0x0261,
981 0x0000, 0x0002, 0x0003, 0x03FB, 0x0279, 0x01CA,
982 }
983 },
984 { 0x01F4, -4, 576,
985 { 0x03E7, 0x0322, 0x00AE, 0x027E, 0x025F, 0x0263,
986 0x0000, 0x0002, 0x0003, 0x03E7, 0x027E, 0x01CA,
987 0x6854, 0x7369, 0x7320, 0x6170, 0x6563, 0x6620,
988 0x726F, 0x7320, 0x6C61, 0x0365, 0x027F, 0x01FE }
989 },
990 { 0x0230, 3, 600, /* PAL 800 */
991 { 0x047F, 0x035C, 0x00B4, 0x0277, 0x0260, 0x0263,
992 0x0000, 0x0005, 0x0007, 0x047F, 0x0278, 0x0170,
993 0x047F, 0x0384, 0x0034, 0x0278, 0x0268, 0x026B,
994 0x0000, 0x0005, 0x0007, 0x047F, 0x0278, 0x017E }
995 },
996 { 0x0226, 2, 600,
997 { 0x044B, 0x0356, 0x00A1, 0x027C, 0x0261, 0x0264,
998 0x0000, 0x0019, 0x0024, 0x044B, 0x027D, 0x0150,
999 0x044B, 0x0377, 0x000D, 0x027D, 0x026B, 0x026E,
1000 0x0000, 0x0019, 0x0024, 0x044B, 0x027D, 0x015E }
1001 },
1002 { 0x021C, 1, 600,
1003 { 0x0437, 0x0353, 0x0099, 0x0281, 0x0262, 0x0265,
1004 0x0000, 0x0019, 0x0024, 0x0437, 0x0282, 0x0150,
1005 0x0437, 0x0372, 0x00FE, 0x0282, 0x026D, 0x0270,
1006 0x0000, 0x0019, 0x0024, 0x0437, 0x0282, 0x015E }
1007 },
1008 { 0x0212, 0, 600, /* default */
1009 { 0x0423, 0x0351, 0x0092, 0x0286, 0x0264, 0x0268,
1010 0x0000, 0x0019, 0x0024, 0x0423, 0x0287, 0x01C8,
1011 0x0423, 0x036D, 0x00EF, 0x0287, 0x0270, 0x0274,
1012 0x0000, 0x0019, 0x0024, 0x0423, 0x0287, 0x01D6 }
1013 },
1014 { 0x0208, -1, 600,
1015 { 0x040F, 0x034E, 0x008A, 0x028B, 0x0265, 0x0269,
1016 0x0000, 0x0019, 0x0024, 0x040F, 0x028C, 0x01A0,
1017 0x040F, 0x0368, 0x00E0, 0x028C, 0x0272, 0x0276,
1018 0x0000, 0x0019, 0x0024, 0x040F, 0x028C, 0x01AE }
1019 },
1020 { 0x01FE, -2, 600,
1021 { 0x03FB, 0x034C, 0x0083, 0x0290, 0x0266, 0x026A,
1022 0x0000, 0x0019, 0x0024, 0x03FB, 0x0291, 0x01C8,
1023 0x03FB, 0x0363, 0x00D1, 0x0291, 0x0275, 0x0279,
1024 0x0000, 0x0019, 0x0024, 0x03FB, 0x0291, 0x01D6 }
1025 },
1026 { 0x01F4, -3, 600,
1027 { 0x0437, 0x0353, 0x0099, 0x0295, 0x0267, 0x026B,
1028 0x0000, 0x0003, 0x0004, 0x0437, 0x0296, 0x01BF,
1029 0x0437, 0x0372, 0x00FE, 0x0296, 0x0277, 0x027B,
1030 0x0000, 0x0003, 0x0004, 0x0437, 0x0296, 0x01BA }
1031 },
1032 };
1033
1034 unsigned const char SiSScalingP1Regs[] = {
1035 0x08,0x09,0x0b,0x0c,0x0d,0x0e,0x10,0x11,0x12
1036 };
1037 unsigned const char SiSScalingP4Regs[] = {
1038 0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b
1039 };
1040
1041 static const unsigned char SiS301CScaling[] = {
1042
1043 /* NTSC/PAL-M/525ip 640x480 */
1044
1045 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x06,0x7E,0x7F,0x1B,0x09,0x7D,
1046 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C,
1047 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E,
1048 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x06,0x1C,0x00,0x7E,0x05,0x1C,0x01,
1049
1050 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x00,0x1B,0x07,0x7E,0x7F,0x1B,0x09,0x7D,
1051 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C,
1052 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E,
1053 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1B,0x00,0x7E,0x05,0x1B,0x02,
1054
1055 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
1056 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
1057 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
1058 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
1059
1060 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
1061 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
1062 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
1063 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
1064
1065 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C,
1066 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D,
1067 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7D,0x10,0x16,0x7D,0x7D,0x0E,0x17,0x7E,
1068 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1069
1070 0x05,0x18,0x05,0x7E,0x04,0x19,0x07,0x7C,0x02,0x18,0x08,0x7E,0x01,0x18,0x0A,0x7D,
1071 0x00,0x17,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x15,0x0F,0x7E,0x7E,0x14,0x11,0x7D,
1072 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x17,0x7E,
1073 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x19,0x03,
1074
1075 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D,
1076 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1077 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F,
1078 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04,
1079
1080 /* NTSC/PAL-M/525ip 720x480 */
1081
1082 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x06,0x7E,0x7F,0x1B,0x09,0x7D,
1083 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C,
1084 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E,
1085 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x06,0x1C,0x00,0x7E,0x05,0x1C,0x01,
1086
1087 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x00,0x1B,0x07,0x7E,0x7F,0x1B,0x09,0x7D,
1088 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C,
1089 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E,
1090 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1B,0x00,0x7E,0x05,0x1B,0x02,
1091
1092 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
1093 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
1094 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
1095 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
1096
1097 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
1098 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
1099 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
1100 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
1101
1102 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C,
1103 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D,
1104 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7D,0x10,0x16,0x7D,0x7D,0x0E,0x17,0x7E,
1105 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1106
1107 0x05,0x18,0x05,0x7E,0x04,0x19,0x07,0x7C,0x02,0x18,0x08,0x7E,0x01,0x18,0x0A,0x7D,
1108 0x00,0x17,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x15,0x0F,0x7E,0x7E,0x14,0x11,0x7D,
1109 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x17,0x7E,
1110 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x19,0x03,
1111
1112 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D,
1113 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1114 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F,
1115 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04,
1116
1117 /* NTSC/PAL-M/525i 800x600 */
1118
1119 0x07,0x15,0x07,0x7D,0x05,0x15,0x08,0x7E,0x04,0x15,0x09,0x7E,0x03,0x15,0x0B,0x7D,
1120 0x02,0x14,0x0C,0x7E,0x01,0x14,0x0D,0x7E,0x00,0x13,0x0F,0x7E,0x00,0x12,0x10,0x7E,
1121 0x7F,0x11,0x11,0x7F,0x7E,0x10,0x12,0x00,0x7E,0x0F,0x13,0x00,0x7E,0x0D,0x14,0x01,
1122 0x7D,0x0C,0x14,0x03,0x7D,0x0B,0x15,0x03,0x7D,0x09,0x15,0x05,0x7D,0x08,0x15,0x06,
1123
1124 0x07,0x15,0x07,0x7D,0x06,0x15,0x08,0x7D,0x05,0x15,0x09,0x7D,0x04,0x14,0x0B,0x7D,
1125 0x03,0x14,0x0C,0x7D,0x02,0x13,0x0D,0x7E,0x01,0x13,0x0E,0x7E,0x00,0x12,0x10,0x7E,
1126 0x7F,0x11,0x11,0x7F,0x7F,0x10,0x12,0x7F,0x7E,0x0E,0x13,0x01,0x7E,0x0D,0x13,0x02,
1127 0x7E,0x0C,0x14,0x02,0x7D,0x0B,0x14,0x04,0x7D,0x09,0x15,0x05,0x7D,0x08,0x15,0x06,
1128
1129 0x07,0x14,0x07,0x7E,0x06,0x14,0x08,0x7E,0x05,0x14,0x0A,0x7D,0x04,0x14,0x0B,0x7D,
1130 0x03,0x13,0x0C,0x7E,0x02,0x13,0x0D,0x7E,0x01,0x12,0x0E,0x7F,0x00,0x11,0x0F,0x00,
1131 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x13,0x02,
1132 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x14,0x03,0x7D,0x0A,0x14,0x05,0x7D,0x08,0x14,0x07,
1133
1134 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E,
1135 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F,
1136 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03,
1137 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06,
1138
1139 0x08,0x13,0x08,0x7D,0x07,0x13,0x09,0x7D,0x05,0x13,0x0A,0x7E,0x04,0x13,0x0B,0x7E,
1140 0x04,0x12,0x0C,0x7E,0x03,0x12,0x0D,0x7E,0x02,0x11,0x0E,0x7F,0x01,0x10,0x0F,0x00,
1141 0x00,0x10,0x10,0x00,0x00,0x0F,0x10,0x01,0x7F,0x0E,0x11,0x02,0x7F,0x0D,0x12,0x02,
1142 0x7E,0x0C,0x12,0x04,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x13,0x05,0x7E,0x09,0x13,0x06,
1143
1144 0x08,0x13,0x08,0x7D,0x07,0x13,0x09,0x7D,0x06,0x12,0x0A,0x7E,0x05,0x12,0x0B,0x7E,
1145 0x04,0x12,0x0C,0x7E,0x03,0x11,0x0D,0x7F,0x02,0x11,0x0E,0x7F,0x01,0x10,0x0E,0x01,
1146 0x01,0x0F,0x0F,0x01,0x00,0x0E,0x10,0x02,0x00,0x0E,0x11,0x01,0x7F,0x0D,0x11,0x03,
1147 0x7F,0x0C,0x12,0x03,0x7E,0x0B,0x12,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x13,0x06,
1148
1149 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x12,0x0B,0x7E,
1150 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0D,0x7F,0x02,0x10,0x0D,0x01,0x02,0x10,0x0E,0x00,
1151 0x01,0x0F,0x0F,0x01,0x00,0x0E,0x10,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0D,0x11,0x03,
1152 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x12,0x04,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07,
1153
1154 /* PAL/PAL-N 640x480 */
1155
1156 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1157 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1158 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1159 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1160
1161 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1162 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1163 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1164 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1165
1166 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1167 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1168 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1169 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1170
1171 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1172 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1173 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1174 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1175
1176 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1177 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1178 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1179 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1180
1181 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1182 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1183 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1184 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1185
1186 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
1187 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
1188 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C,
1189 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E,
1190
1191 /* PAL/PAL-N 720x576, 768x576 */
1192
1193 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x07,0x7D,0x7F,0x1B,0x09,0x7D,
1194 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C,
1195 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E,
1196 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1C,0x7F,0x7E,0x05,0x1C,0x01,
1197
1198 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x01,0x1B,0x07,0x7D,0x7F,0x1B,0x09,0x7D,
1199 0x7E,0x1A,0x0B,0x7D,0x7E,0x19,0x0D,0x7C,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C,
1200 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E,
1201 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7D,0x07,0x1B,0x01,0x7E,0x05,0x1B,0x02,
1202
1203 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
1204 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
1205 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
1206 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02,
1207
1208 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x1A,0x09,0x7D,
1209 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
1210 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
1211 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
1212
1213 0x04,0x19,0x04,0x7F,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C,
1214 0x7F,0x18,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D,
1215 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7C,0x10,0x16,0x7E,0x7C,0x0E,0x17,0x7F,
1216 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1217
1218 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
1219 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1220 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
1221 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1222
1223 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x08,0x7D,0x01,0x18,0x0A,0x7D,
1224 0x00,0x17,0x0C,0x7D,0x7F,0x16,0x0E,0x7D,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1225 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F,
1226 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x18,0x04,
1227
1228 /* PAL/PAL-N 800x600 */
1229
1230 0x04,0x1A,0x04,0x7E,0x02,0x1A,0x05,0x7F,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
1231 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
1232 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F,
1233 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1A,0x03,
1234
1235 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
1236 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
1237 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E,
1238 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02,
1239
1240 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C,
1241 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D,
1242 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7C,0x10,0x16,0x7E,0x7C,0x0E,0x17,0x7F,
1243 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1244
1245 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
1246 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1247 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E,
1248 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04,
1249
1250 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x08,0x7D,0x01,0x18,0x0A,0x7D,
1251 0x00,0x17,0x0C,0x7D,0x7F,0x16,0x0E,0x7D,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1252 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F,
1253 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x18,0x04,
1254
1255 0x06,0x18,0x06,0x7C,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D,
1256 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
1257 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F,
1258 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04,
1259
1260 0x06,0x17,0x06,0x7D,0x05,0x17,0x07,0x7D,0x03,0x17,0x09,0x7D,0x02,0x17,0x0A,0x7D,
1261 0x01,0x16,0x0C,0x7D,0x00,0x15,0x0E,0x7D,0x7F,0x14,0x0F,0x7E,0x7F,0x13,0x11,0x7D,
1262 0x7E,0x12,0x12,0x7E,0x7E,0x11,0x13,0x7E,0x7D,0x0F,0x14,0x00,0x7D,0x0E,0x15,0x00,
1263 0x7D,0x0C,0x16,0x01,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x17,0x03,0x7D,0x07,0x17,0x05
1264 };
1265
1266
1267 /* Mandatory functions */
1268 static void SISIdentify(int flags);
1269 static Bool SISProbe(DriverPtr drv, int flags);
1270 static Bool SISPreInit(ScrnInfoPtr pScrn, int flags);
1271 static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
1272 static Bool SISEnterVT(int scrnIndex, int flags);
1273 static void SISLeaveVT(int scrnIndex, int flags);
1274 static Bool SISCloseScreen(int scrnIndex, ScreenPtr pScreen);
1275 static Bool SISSaveScreen(ScreenPtr pScreen, int mode);
1276 static Bool SISSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
1277 static void SISAdjustFrame(int scrnIndex, int x, int y, int flags);
1278 #ifdef SISDUALHEAD
1279 static Bool SISSaveScreenDH(ScreenPtr pScreen, int mode);
1280 #endif
1281
1282 /* Optional functions */
1283 static void SISFreeScreen(int scrnIndex, int flags);
1284 static ModeStatus SISValidMode(int scrnIndex, DisplayModePtr mode,
1285 Bool verbose, int flags);
1286
1287 /* Internally used functions */
1288 static Bool SISMapMem(ScrnInfoPtr pScrn);
1289 static Bool SISUnmapMem(ScrnInfoPtr pScrn);
1290 #ifdef SIS_NEED_MAP_IOP
1291 static Bool SISMapIOPMem(ScrnInfoPtr pScrn);
1292 static Bool SISUnmapIOPMem(ScrnInfoPtr pScrn);
1293 #endif
1294 static void SISSave(ScrnInfoPtr pScrn);
1295 static void SISRestore(ScrnInfoPtr pScrn);
1296 static void SISVESARestore(ScrnInfoPtr pScrn);
1297 static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
1298 static void SISModifyModeInfo(DisplayModePtr mode);
1299 static void SiSPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int viewmode);
1300 static void SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg);
1301 static void SiS6326PostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg);
1302 static Bool SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode);
1303 static void SiSBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe);
1304 static UShort SiSCalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
1305 static void SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function);
1306 static void SISBridgeRestore(ScrnInfoPtr pScrn);
1307 static void SiSEnableTurboQueue(ScrnInfoPtr pScrn);
1308 unsigned char SISSearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode);
1309 static void SISWaitVBRetrace(ScrnInfoPtr pScrn);
1310 void SISWaitRetraceCRT1(ScrnInfoPtr pScrn);
1311 void SISWaitRetraceCRT2(ScrnInfoPtr pScrn);
1312 static Bool InRegion(int x, int y, region r);
1313 static USHORT SiS_CheckModeCRT1(ScrnInfoPtr pScrn, DisplayModePtr mode,
1314 unsigned long VBFlags, BOOLEAN hcm);
1315 static USHORT SiS_CheckModeCRT2(ScrnInfoPtr pScrn, DisplayModePtr mode,
1316 unsigned long VBFlags, BOOLEAN hcm);
1317 #ifdef SISMERGED
1318 static void SISMergePointerMoved(int scrnIndex, int x, int y);
1319 #endif
1320 BOOLEAN SiSBridgeIsInSlaveMode(ScrnInfoPtr pScrn);
1321 USHORT SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned long VBFlags);
1322 unsigned char SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value);
1323 #ifdef DEBUG
1324 static void SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
1325 #endif
1326 void SISDetermineLCDACap(ScrnInfoPtr pScrn);
1327 void SISSaveDetectedDevices(ScrnInfoPtr pScrn);
1328
1329 extern USHORT SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
1330 int Depth, BOOL FSTN, int LCDwith, int LCDheight);
1331 extern USHORT SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth,
1332 BOOLEAN FSTN, USHORT CustomT, int LCDwith, int LCDheight);
1333 extern USHORT SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth);
1334 extern USHORT SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth);
1335 extern int SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber);
1336 extern int SiSTranslateToOldMode(int modenumber);
1337 extern BOOLEAN SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo);
1338 extern BOOLEAN SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
1339 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
1340 extern BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
1341 ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch);
1342 extern void SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
1343 extern void SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,USHORT ModeNo);
1344 extern void SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO);
1345 extern DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes,
1346 BOOLEAN isfordvi);
1347 extern BOOLEAN SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
1348 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
1349 extern BOOLEAN SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension,
1350 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
1351
1352 /* For power management for 315 series */
1353 extern void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension);
1354 extern void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr);
1355 extern void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension);
1356 extern void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension);
1357
1358