theora-fpga/theora_hardware/clamp.vhd

   1 -------------------------------------------------------------------------------
   2 --  Description: If x < 0 then sat receives 0.
   3 --               If x > 255 then sat receives 255
   4 --               Else sat receives the eights low-order bits.
   5 -------------------------------------------------------------------------------
   6
   7 library std;
   8 library IEEE;
   9 use IEEE.numeric_std.all;
  10 use IEEE.std_logic_1164.all;
  11
  12 entity clamp is
  13
  14   port (
  15     x   : in  SIGNED(16 downto 0);
  16     sat : out UNSIGNED(7 downto 0));
  17
  18   -- purpose: saturate the number in x to an unsigned number till 255
  19 end clamp;
  20
  21 architecture a_clamp of clamp is
  22 begin  -- a_clamp
  23
  24   sat <= "00000000" WHEN (x < 0) ELSE
  25          "11111111" WHEN (x > 255) ELSE
  26          unsigned(x(7 downto 0));
  27
  28
  29 end a_clamp;