Add support store ddr param in flash.
[xloong.git] / dump / frame.h
blob6f3498777b1168593f4f465e87c481529c50ddbd
1 /* $OpenBSD: frame.h,v 1.3 1998/09/15 10:50:12 pefo Exp $ */
3 /*
4 * Copyright (c) 1998, 2000 Per Fogelstrom, Opsycon AB
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Per Fogelstrom,
17 * Opsycon AB, Sweden.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
34 #ifndef _MIPS_FRAME_H_
35 #define _MIPS_FRAME_H_
37 typedef int64_t f_register_t;
39 struct trapframe {
40 register_t zero;
41 register_t ast;
42 register_t v0;
43 register_t v1;
44 register_t a0;
45 register_t a1;
46 register_t a2;
47 register_t a3;
48 register_t t0;
49 register_t t1;
50 register_t t2;
51 register_t t3;
52 register_t t4;
53 register_t t5;
54 register_t t6;
55 register_t t7;
56 register_t s0;
57 register_t s1;
58 register_t s2;
59 register_t s3;
60 register_t s4;
61 register_t s5;
62 register_t s6;
63 register_t s7;
64 register_t t8;
65 register_t t9;
66 register_t k0;
67 register_t k1;
68 register_t gp;
69 register_t sp;
70 register_t s8;
71 register_t ra;
72 register_t sr;
73 register_t mullo;
74 register_t mulhi;
75 register_t badvaddr;
76 register_t cause;
77 register_t pc;
79 f_register_t f0;
80 f_register_t f1;
81 f_register_t f2;
82 f_register_t f3;
83 f_register_t f4;
84 f_register_t f5;
85 f_register_t f6;
86 f_register_t f7;
87 f_register_t f8;
88 f_register_t f9;
89 f_register_t f10;
90 f_register_t f11;
91 f_register_t f12;
92 f_register_t f13;
93 f_register_t f14;
94 f_register_t f15;
95 f_register_t f16;
96 f_register_t f17;
97 f_register_t f18;
98 f_register_t f19;
99 f_register_t f20;
100 f_register_t f21;
101 f_register_t f22;
102 f_register_t f23;
103 f_register_t f24;
104 f_register_t f25;
105 f_register_t f26;
106 f_register_t f27;
107 f_register_t f28;
108 f_register_t f29;
109 f_register_t f30;
110 f_register_t f31;
111 register_t fsr;
113 register_t count;
114 register_t compare;
115 register_t watchlo;
116 register_t watchhi;
117 register_t watchm;
118 register_t watch1;
119 register_t watch2;
120 register_t lladr;
121 register_t ecc;
122 register_t cacher;
123 register_t taglo;
124 register_t taghi;
125 register_t wired;
126 register_t pgmsk;
127 register_t entlo0;
128 register_t entlo1;
129 register_t enthi;
130 register_t context;
131 register_t xcontext;
132 register_t index;
133 register_t random;
134 register_t config;
135 register_t icr;
136 register_t ipllo;
137 register_t iplhi;
138 register_t prid;
139 register_t pcount;
140 register_t pctrl;
141 register_t errpc;
144 #endif /* !_MIPS_FRAME_H_ */