arch/arm/mach-davinci/include/mach/da8xx.h

   1 /*
   2  * Chip specific defines for DA8XX/OMAP L1XX SoC
   3  *
   4  * Author: Mark A. Greer <mgreer@mvista.com>
   5  *
   6  * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
   7  * the terms of the GNU General Public License version 2. This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11 #ifndef __ASM_ARCH_DAVINCI_DA8XX_H
  12 #define __ASM_ARCH_DAVINCI_DA8XX_H
  13
  14 #include <video/da8xx-fb.h>
  15
  16 #include <linux/platform_device.h>
  17 #include <linux/davinci_emac.h>
  18 #include <linux/spi/spi.h>
  19
  20 #include <mach/serial.h>
  21 #include <mach/edma.h>
  22 #include <mach/i2c.h>
  23 #include <mach/asp.h>
  24 #include <mach/mmc.h>
  25 #include <mach/usb.h>
  26 #include <mach/pm.h>
  27 #include <mach/spi.h>
  28
  29 extern void __iomem *da8xx_syscfg0_base;
  30 extern void __iomem *da8xx_syscfg1_base;
  31
  32 /*
  33  * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
  34  * (than the regular 300Mhz variant), the board code should set this up
  35  * with the supported speed before calling da850_register_cpufreq().
  36  */
  37 extern unsigned int da850_max_speed;
  38
  39 /*
  40  * The cp_intc interrupt controller for the da8xx isn't in the same
  41  * chunk of physical memory space as the other registers (like it is
  42  * on the davincis) so it needs to be mapped separately.  It will be
  43  * mapped early on when the I/O space is mapped and we'll put it just
  44  * before the I/O space in the processor's virtual memory space.
  45  */
  46 #define DA8XX_CP_INTC_BASE      0xfffee000
  47 #define DA8XX_CP_INTC_SIZE      SZ_8K
  48 #define DA8XX_CP_INTC_VIRT      (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
  49
  50 #define DA8XX_SYSCFG0_BASE      (IO_PHYS + 0x14000)
  51 #define DA8XX_SYSCFG0_VIRT(x)   (da8xx_syscfg0_base + (x))
  52 #define DA8XX_JTAG_ID_REG       0x18
  53 #define DA8XX_CFGCHIP0_REG      0x17c
  54 #define DA8XX_CFGCHIP2_REG      0x184
  55 #define DA8XX_CFGCHIP3_REG      0x188
  56
  57 #define DA8XX_SYSCFG1_BASE      (IO_PHYS + 0x22C000)
  58 #define DA8XX_SYSCFG1_VIRT(x)   (da8xx_syscfg1_base + (x))
  59 #define DA8XX_DEEPSLEEP_REG     0x8
  60 #define DA8XX_PWRDN_REG         0x18
  61
  62 #define DA8XX_PSC0_BASE         0x01c10000
  63 #define DA8XX_PLL0_BASE         0x01c11000
  64 #define DA8XX_TIMER64P0_BASE    0x01c20000
  65 #define DA8XX_TIMER64P1_BASE    0x01c21000
  66 #define DA8XX_GPIO_BASE         0x01e26000
  67 #define DA8XX_PSC1_BASE         0x01e27000
  68 #define DA8XX_AEMIF_CS2_BASE    0x60000000
  69 #define DA8XX_AEMIF_CS3_BASE    0x62000000
  70 #define DA8XX_AEMIF_CTL_BASE    0x68000000
  71 #define DA8XX_ARM_RAM_BASE      0xffff0000
  72
  73 void __init da830_init(void);
  74 void __init da850_init(void);
  75
  76 int da830_register_edma(struct edma_rsv_info *rsv);
  77 int da850_register_edma(struct edma_rsv_info *rsv[2]);
  78 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
  79 int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);
  80 int da8xx_register_watchdog(void);
  81 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
  82 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
  83 int da8xx_register_emac(void);
  84 int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
  85 int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
  86 int da850_register_mmcsd1(struct davinci_mmc_config *config);
  87 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
  88 int da8xx_register_rtc(void);
  89 int da850_register_cpufreq(char *async_clk);
  90 int da8xx_register_cpuidle(void);
  91 void __iomem * __init da8xx_get_mem_ctlr(void);
  92 int da850_register_pm(struct platform_device *pdev);
  93 int __init da850_register_sata(unsigned long refclkpn);
  94 void da8xx_restart(char mode, const char *cmd);
  95
  96 extern struct platform_device da8xx_serial_device;
  97 extern struct emac_platform_data da8xx_emac_pdata;
  98 extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
  99 extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
 100 extern struct davinci_spi_platform_data da8xx_spi_pdata[];
 101
 102 extern struct platform_device da8xx_wdt_device;
 103
 104 extern const short da830_emif25_pins[];
 105 extern const short da830_spi0_pins[];
 106 extern const short da830_spi1_pins[];
 107 extern const short da830_mmc_sd_pins[];
 108 extern const short da830_uart0_pins[];
 109 extern const short da830_uart1_pins[];
 110 extern const short da830_uart2_pins[];
 111 extern const short da830_usb20_pins[];
 112 extern const short da830_usb11_pins[];
 113 extern const short da830_uhpi_pins[];
 114 extern const short da830_cpgmac_pins[];
 115 extern const short da830_emif3c_pins[];
 116 extern const short da830_mcasp0_pins[];
 117 extern const short da830_mcasp1_pins[];
 118 extern const short da830_mcasp2_pins[];
 119 extern const short da830_i2c0_pins[];
 120 extern const short da830_i2c1_pins[];
 121 extern const short da830_lcdcntl_pins[];
 122 extern const short da830_pwm_pins[];
 123 extern const short da830_ecap0_pins[];
 124 extern const short da830_ecap1_pins[];
 125 extern const short da830_ecap2_pins[];
 126 extern const short da830_eqep0_pins[];
 127 extern const short da830_eqep1_pins[];
 128
 129 extern const short da850_i2c0_pins[];
 130 extern const short da850_i2c1_pins[];
 131 extern const short da850_lcdcntl_pins[];
 132
 133 #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */