spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / arm / mach-imx / mach-imx6q.c
blobc25728106917be3bdec5c8a5e687adc83e84a1ca
1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/phy.h>
23 #include <linux/micrel_phy.h>
24 #include <asm/hardware/cache-l2x0.h>
25 #include <asm/hardware/gic.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/time.h>
28 #include <mach/common.h>
29 #include <mach/hardware.h>
31 void imx6q_restart(char mode, const char *cmd)
33 struct device_node *np;
34 void __iomem *wdog_base;
36 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
37 wdog_base = of_iomap(np, 0);
38 if (!wdog_base)
39 goto soft;
41 imx_src_prepare_restart();
43 /* enable wdog */
44 writew_relaxed(1 << 2, wdog_base);
45 /* write twice to ensure the request will not get ignored */
46 writew_relaxed(1 << 2, wdog_base);
48 /* wait for reset to assert ... */
49 mdelay(500);
51 pr_err("Watchdog reset failed to assert reset\n");
53 /* delay to allow the serial port to show the message */
54 mdelay(50);
56 soft:
57 /* we'll take a jump through zero as a poor second */
58 soft_restart(0);
61 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
62 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
64 /* min rx data delay */
65 phy_write(phydev, 0x0b, 0x8105);
66 phy_write(phydev, 0x0c, 0x0000);
68 /* max rx/tx clock delay, min rx/tx control delay */
69 phy_write(phydev, 0x0b, 0x8104);
70 phy_write(phydev, 0x0c, 0xf0f0);
71 phy_write(phydev, 0x0b, 0x104);
73 return 0;
76 static void __init imx6q_init_machine(void)
78 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
79 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
80 ksz9021rn_phy_fixup);
82 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
84 imx6q_pm_init();
87 static void __init imx6q_map_io(void)
89 imx_lluart_map_io();
90 imx_scu_map_io();
91 imx6q_clock_map_io();
94 static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
95 struct device_node *interrupt_parent)
97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
99 gpio_irq_base -= 32;
100 irq_domain_add_simple(np, gpio_irq_base);
102 return 0;
105 static const struct of_device_id imx6q_irq_match[] __initconst = {
106 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
107 { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
108 { /* sentinel */ }
111 static void __init imx6q_init_irq(void)
113 l2x0_of_init(0, ~0UL);
114 imx_src_init();
115 imx_gpc_init();
116 of_irq_init(imx6q_irq_match);
119 static void __init imx6q_timer_init(void)
121 mx6q_clocks_init();
124 static struct sys_timer imx6q_timer = {
125 .init = imx6q_timer_init,
128 static const char *imx6q_dt_compat[] __initdata = {
129 "fsl,imx6q-arm2",
130 "fsl,imx6q-sabrelite",
131 NULL,
134 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
135 .map_io = imx6q_map_io,
136 .init_irq = imx6q_init_irq,
137 .handle_irq = imx6q_handle_irq,
138 .timer = &imx6q_timer,
139 .init_machine = imx6q_init_machine,
140 .dt_compat = imx6q_dt_compat,
141 .restart = imx6q_restart,
142 MACHINE_END