arch/arm/mach-imx/mach-mx53_ard.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/clk.h>
  23 #include <linux/delay.h>
  24 #include <linux/gpio.h>
  25 #include <linux/smsc911x.h>
  26
  27 #include <mach/common.h>
  28 #include <mach/hardware.h>
  29 #include <mach/iomux-mx53.h>
  30
  31 #include <asm/mach-types.h>
  32 #include <asm/mach/arch.h>
  33 #include <asm/mach/time.h>
  34
  35 #include "devices-imx53.h"
  36
  37 #define ARD_ETHERNET_INT_B      IMX_GPIO_NR(2, 31)
  38 #define ARD_SD1_CD              IMX_GPIO_NR(1, 1)
  39 #define ARD_SD1_WP              IMX_GPIO_NR(1, 9)
  40 #define ARD_I2CPORTEXP_B        IMX_GPIO_NR(2, 3)
  41 #define ARD_VOLUMEDOWN          IMX_GPIO_NR(4, 0)
  42 #define ARD_HOME                        IMX_GPIO_NR(5, 10)
  43 #define ARD_BACK                        IMX_GPIO_NR(5, 11)
  44 #define ARD_PROG                        IMX_GPIO_NR(5, 12)
  45 #define ARD_VOLUMEUP            IMX_GPIO_NR(5, 13)
  46
  47 static iomux_v3_cfg_t mx53_ard_pads[] = {
  48         /* UART1 */
  49         MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
  50         MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
  51         /* WEIM for CS1 */
  52         MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */
  53         MX53_PAD_EIM_D16__EMI_WEIM_D_16,
  54         MX53_PAD_EIM_D17__EMI_WEIM_D_17,
  55         MX53_PAD_EIM_D18__EMI_WEIM_D_18,
  56         MX53_PAD_EIM_D19__EMI_WEIM_D_19,
  57         MX53_PAD_EIM_D20__EMI_WEIM_D_20,
  58         MX53_PAD_EIM_D21__EMI_WEIM_D_21,
  59         MX53_PAD_EIM_D22__EMI_WEIM_D_22,
  60         MX53_PAD_EIM_D23__EMI_WEIM_D_23,
  61         MX53_PAD_EIM_D24__EMI_WEIM_D_24,
  62         MX53_PAD_EIM_D25__EMI_WEIM_D_25,
  63         MX53_PAD_EIM_D26__EMI_WEIM_D_26,
  64         MX53_PAD_EIM_D27__EMI_WEIM_D_27,
  65         MX53_PAD_EIM_D28__EMI_WEIM_D_28,
  66         MX53_PAD_EIM_D29__EMI_WEIM_D_29,
  67         MX53_PAD_EIM_D30__EMI_WEIM_D_30,
  68         MX53_PAD_EIM_D31__EMI_WEIM_D_31,
  69         MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0,
  70         MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1,
  71         MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2,
  72         MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3,
  73         MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4,
  74         MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5,
  75         MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6,
  76         MX53_PAD_EIM_OE__EMI_WEIM_OE,
  77         MX53_PAD_EIM_RW__EMI_WEIM_RW,
  78         MX53_PAD_EIM_CS1__EMI_WEIM_CS_1,
  79         /* SDHC1 */
  80         MX53_PAD_SD1_CMD__ESDHC1_CMD,
  81         MX53_PAD_SD1_CLK__ESDHC1_CLK,
  82         MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
  83         MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
  84         MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
  85         MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
  86         MX53_PAD_PATA_DATA8__ESDHC1_DAT4,
  87         MX53_PAD_PATA_DATA9__ESDHC1_DAT5,
  88         MX53_PAD_PATA_DATA10__ESDHC1_DAT6,
  89         MX53_PAD_PATA_DATA11__ESDHC1_DAT7,
  90         MX53_PAD_GPIO_1__GPIO1_1,
  91         MX53_PAD_GPIO_9__GPIO1_9,
  92         /* I2C2 */
  93         MX53_PAD_EIM_EB2__I2C2_SCL,
  94         MX53_PAD_KEY_ROW3__I2C2_SDA,
  95         /* I2C3 */
  96         MX53_PAD_GPIO_3__I2C3_SCL,
  97         MX53_PAD_GPIO_16__I2C3_SDA,
  98         /* GPIO */
  99         MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */
 100         MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */
 101         MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */
 102         MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */
 103         MX53_PAD_GPIO_10__GPIO4_0,              /* vol down */
 104 };
 105
 106 #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake)    \
 107 {                                                       \
 108         .gpio           = gpio_num,                             \
 109         .type           = EV_KEY,                               \
 110         .code           = ev_code,                              \
 111         .active_low     = act_low,                              \
 112         .desc           = "btn " descr,                 \
 113         .wakeup         = wake,                                 \
 114 }
 115
 116 static struct gpio_keys_button ard_buttons[] = {
 117         GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0),
 118         GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0),
 119         GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0),
 120         GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0),
 121         GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0),
 122 };
 123
 124 static const struct gpio_keys_platform_data ard_button_data __initconst = {
 125         .buttons        = ard_buttons,
 126         .nbuttons       = ARRAY_SIZE(ard_buttons),
 127 };
 128
 129 static struct resource ard_smsc911x_resources[] = {
 130         {
 131                 .start = MX53_CS1_64MB_BASE_ADDR,
 132                 .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1,
 133                 .flags = IORESOURCE_MEM,
 134         },
 135         {
 136                 .start =  IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
 137                 .end =  IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
 138                 .flags = IORESOURCE_IRQ,
 139         },
 140 };
 141
 142 struct smsc911x_platform_config ard_smsc911x_config = {
 143         .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 144         .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
 145         .flags = SMSC911X_USE_32BIT,
 146 };
 147
 148 static struct platform_device ard_smsc_lan9220_device = {
 149         .name = "smsc911x",
 150         .id = -1,
 151         .num_resources = ARRAY_SIZE(ard_smsc911x_resources),
 152         .resource = ard_smsc911x_resources,
 153         .dev = {
 154                 .platform_data = &ard_smsc911x_config,
 155         },
 156 };
 157
 158 static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = {
 159         .cd_gpio = ARD_SD1_CD,
 160         .wp_gpio = ARD_SD1_WP,
 161 };
 162
 163 static struct imxi2c_platform_data mx53_ard_i2c2_data = {
 164         .bitrate = 50000,
 165 };
 166
 167 static struct imxi2c_platform_data mx53_ard_i2c3_data = {
 168         .bitrate = 400000,
 169 };
 170
 171 static void __init mx53_ard_io_init(void)
 172 {
 173         gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
 174         gpio_direction_input(ARD_ETHERNET_INT_B);
 175
 176         gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst");
 177         gpio_direction_output(ARD_I2CPORTEXP_B, 1);
 178 }
 179
 180 /* Config CS1 settings for ethernet controller */
 181 static int weim_cs_config(void)
 182 {
 183         u32 reg;
 184         void __iomem *weim_base, *iomuxc_base;
 185
 186         weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K);
 187         if (!weim_base)
 188                 return -ENOMEM;
 189
 190         iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
 191         if (!iomuxc_base) {
 192                 iounmap(weim_base);
 193                 return -ENOMEM;
 194         }
 195
 196         /* CS1 timings for LAN9220 */
 197         writel(0x20001, (weim_base + 0x18));
 198         writel(0x0, (weim_base + 0x1C));
 199         writel(0x16000202, (weim_base + 0x20));
 200         writel(0x00000002, (weim_base + 0x24));
 201         writel(0x16002082, (weim_base + 0x28));
 202         writel(0x00000000, (weim_base + 0x2C));
 203         writel(0x00000000, (weim_base + 0x90));
 204
 205         /* specify 64 MB on CS1 and CS0 on GPR1 */
 206         reg = readl(iomuxc_base + 0x4);
 207         reg &= ~0x3F;
 208         reg |= 0x1B;
 209         writel(reg, (iomuxc_base + 0x4));
 210
 211         iounmap(iomuxc_base);
 212         iounmap(weim_base);
 213
 214         return 0;
 215 }
 216
 217 void __init imx53_ard_common_init(void)
 218 {
 219         mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
 220                                          ARRAY_SIZE(mx53_ard_pads));
 221         weim_cs_config();
 222 }
 223
 224 static struct platform_device *devices[] __initdata = {
 225         &ard_smsc_lan9220_device,
 226 };
 227
 228 static void __init mx53_ard_board_init(void)
 229 {
 230         imx53_soc_init();
 231         imx53_add_imx_uart(0, NULL);
 232
 233         imx53_ard_common_init();
 234         mx53_ard_io_init();
 235         platform_add_devices(devices, ARRAY_SIZE(devices));
 236
 237         imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
 238         imx53_add_imx2_wdt(0, NULL);
 239         imx53_add_imx_i2c(1, &mx53_ard_i2c2_data);
 240         imx53_add_imx_i2c(2, &mx53_ard_i2c3_data);
 241         imx_add_gpio_keys(&ard_button_data);
 242         imx53_add_ahci_imx();
 243 }
 244
 245 static void __init mx53_ard_timer_init(void)
 246 {
 247         mx53_clocks_init(32768, 24000000, 22579200, 0);
 248 }
 249
 250 static struct sys_timer mx53_ard_timer = {
 251         .init   = mx53_ard_timer_init,
 252 };
 253
 254 MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
 255         .map_io = mx53_map_io,
 256         .init_early = imx53_init_early,
 257         .init_irq = mx53_init_irq,
 258         .handle_irq = imx53_handle_irq,
 259         .timer = &mx53_ard_timer,
 260         .init_machine = mx53_ard_board_init,
 261         .restart        = mxc_restart,
 262 MACHINE_END