arch/arm/mach-imx/platsmp.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/smp.h>
  15 #include <asm/page.h>
  16 #include <asm/smp_scu.h>
  17 #include <asm/hardware/gic.h>
  18 #include <asm/mach/map.h>
  19 #include <mach/common.h>
  20 #include <mach/hardware.h>
  21
  22 static void __iomem *scu_base;
  23
  24 static struct map_desc scu_io_desc __initdata = {
  25         /* .virtual and .pfn are run-time assigned */
  26         .length         = SZ_4K,
  27         .type           = MT_DEVICE,
  28 };
  29
  30 void __init imx_scu_map_io(void)
  31 {
  32         unsigned long base;
  33
  34         /* Get SCU base */
  35         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  36
  37         scu_io_desc.virtual = IMX_IO_P2V(base);
  38         scu_io_desc.pfn = __phys_to_pfn(base);
  39         iotable_init(&scu_io_desc, 1);
  40
  41         scu_base = IMX_IO_ADDRESS(base);
  42 }
  43
  44 void __cpuinit platform_secondary_init(unsigned int cpu)
  45 {
  46         /*
  47          * if any interrupts are already enabled for the primary
  48          * core (e.g. timer irq), then they will not have been enabled
  49          * for us: do so
  50          */
  51         gic_secondary_init(0);
  52 }
  53
  54 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  55 {
  56         imx_set_cpu_jump(cpu, v7_secondary_startup);
  57         imx_enable_cpu(cpu, true);
  58         return 0;
  59 }
  60
  61 /*
  62  * Initialise the CPU possible map early - this describes the CPUs
  63  * which may be present or become present in the system.
  64  */
  65 void __init smp_init_cpus(void)
  66 {
  67         int i, ncores;
  68
  69         ncores = scu_get_core_count(scu_base);
  70
  71         for (i = 0; i < ncores; i++)
  72                 set_cpu_possible(i, true);
  73
  74         set_smp_cross_call(gic_raise_softirq);
  75 }
  76
  77 void imx_smp_prepare(void)
  78 {
  79         scu_enable(scu_base);
  80 }
  81
  82 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
  83 {
  84         imx_smp_prepare();
  85 }