arch/arm/mach-imx/src.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/of.h>
  16 #include <linux/of_address.h>
  17 #include <linux/smp.h>
  18 #include <asm/smp_plat.h>
  19
  20 #define SRC_SCR                         0x000
  21 #define SRC_GPR1                        0x020
  22 #define BP_SRC_SCR_WARM_RESET_ENABLE    0
  23 #define BP_SRC_SCR_CORE1_RST            14
  24 #define BP_SRC_SCR_CORE1_ENABLE         22
  25
  26 static void __iomem *src_base;
  27
  28 void imx_enable_cpu(int cpu, bool enable)
  29 {
  30         u32 mask, val;
  31
  32         cpu = cpu_logical_map(cpu);
  33         mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
  34         val = readl_relaxed(src_base + SRC_SCR);
  35         val = enable ? val | mask : val & ~mask;
  36         writel_relaxed(val, src_base + SRC_SCR);
  37 }
  38
  39 void imx_set_cpu_jump(int cpu, void *jump_addr)
  40 {
  41         cpu = cpu_logical_map(cpu);
  42         writel_relaxed(virt_to_phys(jump_addr),
  43                        src_base + SRC_GPR1 + cpu * 8);
  44 }
  45
  46 void imx_src_prepare_restart(void)
  47 {
  48         u32 val;
  49
  50         /* clear enable bits of secondary cores */
  51         val = readl_relaxed(src_base + SRC_SCR);
  52         val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE);
  53         writel_relaxed(val, src_base + SRC_SCR);
  54
  55         /* clear persistent entry register of primary core */
  56         writel_relaxed(0, src_base + SRC_GPR1);
  57 }
  58
  59 void __init imx_src_init(void)
  60 {
  61         struct device_node *np;
  62         u32 val;
  63
  64         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
  65         src_base = of_iomap(np, 0);
  66         WARN_ON(!src_base);
  67
  68         /*
  69          * force warm reset sources to generate cold reset
  70          * for a more reliable restart
  71          */
  72         val = readl_relaxed(src_base + SRC_SCR);
  73         val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE);
  74         writel_relaxed(val, src_base + SRC_SCR);
  75 }