arch/arm/mach-mmp/include/mach/regs-apmu.h

   1 /*
   2  * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
   3  *
   4  *   Application Subsystem Power Management Unit
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #ifndef __ASM_MACH_REGS_APMU_H
  12 #define __ASM_MACH_REGS_APMU_H
  13
  14 #include <mach/addr-map.h>
  15
  16 #define APMU_VIRT_BASE  (AXI_VIRT_BASE + 0x82800)
  17 #define APMU_REG(x)     (APMU_VIRT_BASE + (x))
  18
  19 /* Clock Reset Control */
  20 #define APMU_IRE        APMU_REG(0x048)
  21 #define APMU_LCD        APMU_REG(0x04c)
  22 #define APMU_CCIC       APMU_REG(0x050)
  23 #define APMU_SDH0       APMU_REG(0x054)
  24 #define APMU_SDH1       APMU_REG(0x058)
  25 #define APMU_USB        APMU_REG(0x05c)
  26 #define APMU_NAND       APMU_REG(0x060)
  27 #define APMU_DMA        APMU_REG(0x064)
  28 #define APMU_GEU        APMU_REG(0x068)
  29 #define APMU_BUS        APMU_REG(0x06c)
  30 #define APMU_SDH2       APMU_REG(0x0e8)
  31 #define APMU_SDH3       APMU_REG(0x0ec)
  32 #define APMU_ETH        APMU_REG(0x0fc)
  33
  34 #define APMU_FNCLK_EN   (1 << 4)
  35 #define APMU_AXICLK_EN  (1 << 3)
  36 #define APMU_FNRST_DIS  (1 << 1)
  37 #define APMU_AXIRST_DIS (1 << 0)
  38
  39 /* Wake Clear Register */
  40 #define APMU_WAKE_CLR   APMU_REG(0x07c)
  41
  42 #define APMU_PXA168_KP_WAKE_CLR         (1 << 7)
  43 #define APMU_PXA168_CFI_WAKE_CLR        (1 << 6)
  44 #define APMU_PXA168_XD_WAKE_CLR         (1 << 5)
  45 #define APMU_PXA168_MSP_WAKE_CLR        (1 << 4)
  46 #define APMU_PXA168_SD4_WAKE_CLR        (1 << 3)
  47 #define APMU_PXA168_SD3_WAKE_CLR        (1 << 2)
  48 #define APMU_PXA168_SD2_WAKE_CLR        (1 << 1)
  49 #define APMU_PXA168_SD1_WAKE_CLR        (1 << 0)
  50
  51 #endif /* __ASM_MACH_REGS_APMU_H */