3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5 * Author: Brian Swetland <swetland@google.com>
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <mach/hardware.h>
19 #include <mach/msm_iomap.h>
21 .macro addruart, rp, rv, tmp
22 #ifdef MSM_DEBUG_UART_PHYS
23 ldr \rp, =MSM_DEBUG_UART_PHYS
24 ldr \rv, =MSM_DEBUG_UART_BASE
28 .macro senduart, rd, rx
29 #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
34 strne \rd, [\rx, #0x0C]
38 .macro waituart, rd, rx
39 #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40 @ check for TX_EMT in UARTDM_SR
44 @ wait for TXREADY in UARTDM_ISR
45 1001: ldr \rd, [\rx, #0x14]
49 @ Clear TX_READY by writing to the UARTDM_CR register
52 @ Write 0x1 to NCF register
55 @ UARTDM reg. Read to induce delay
59 1001: ldr \rd, [\rx, #0x08]
65 .macro busyuart, rd, rx