spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / ia64 / include / asm / sn / rw_mmr.h
blob2d78f4c5a45e216a3218616c4287625ae37eef73
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2002-2006 Silicon Graphics, Inc. All Rights Reserved.
7 */
8 #ifndef _ASM_IA64_SN_RW_MMR_H
9 #define _ASM_IA64_SN_RW_MMR_H
13 * This file that access MMRs via uncached physical addresses.
14 * pio_phys_read_mmr - read an MMR
15 * pio_phys_write_mmr - write an MMR
16 * pio_atomic_phys_write_mmrs - atomically write 1 or 2 MMRs with psr.ic=0
17 * Second MMR will be skipped if address is NULL
19 * Addresses passed to these routines should be uncached physical addresses
20 * ie., 0x80000....
24 extern long pio_phys_read_mmr(volatile long *mmr);
25 extern void pio_phys_write_mmr(volatile long *mmr, long val);
26 extern void pio_atomic_phys_write_mmrs(volatile long *mmr1, long val1, volatile long *mmr2, long val2);
28 #endif /* _ASM_IA64_SN_RW_MMR_H */