spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / ia64 / sn / include / ioerror.h
blobe68f2b0789a76e347256e0d81eaed4727ec709d0
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
7 */
8 #ifndef _ASM_IA64_SN_IOERROR_H
9 #define _ASM_IA64_SN_IOERROR_H
12 * IO error structure.
14 * This structure would expand to hold the information retrieved from
15 * all IO related error registers.
17 * This structure is defined to hold all system specific
18 * information related to a single error.
20 * This serves a couple of purpose.
21 * - Error handling often involves translating one form of address to other
22 * form. So, instead of having different data structures at each level,
23 * we have a single structure, and the appropriate fields get filled in
24 * at each layer.
25 * - This provides a way to dump all error related information in any layer
26 * of erorr handling (debugging aid).
28 * A second possibility is to allow each layer to define its own error
29 * data structure, and fill in the proper fields. This has the advantage
30 * of isolating the layers.
31 * A big concern is the potential stack usage (and overflow), if each layer
32 * defines these structures on stack (assuming we don't want to do kmalloc.
34 * Any layer wishing to pass extra information to a layer next to it in
35 * error handling hierarchy, can do so as a separate parameter.
38 typedef struct io_error_s {
39 /* Bit fields indicating which structure fields are valid */
40 union {
41 struct {
42 unsigned ievb_errortype:1;
43 unsigned ievb_widgetnum:1;
44 unsigned ievb_widgetdev:1;
45 unsigned ievb_srccpu:1;
46 unsigned ievb_srcnode:1;
47 unsigned ievb_errnode:1;
48 unsigned ievb_sysioaddr:1;
49 unsigned ievb_xtalkaddr:1;
50 unsigned ievb_busspace:1;
51 unsigned ievb_busaddr:1;
52 unsigned ievb_vaddr:1;
53 unsigned ievb_memaddr:1;
54 unsigned ievb_epc:1;
55 unsigned ievb_ef:1;
56 unsigned ievb_tnum:1;
57 } iev_b;
58 unsigned iev_a;
59 } ie_v;
61 short ie_errortype; /* error type: extra info about error */
62 short ie_widgetnum; /* Widget number that's in error */
63 short ie_widgetdev; /* Device within widget in error */
64 cpuid_t ie_srccpu; /* CPU on srcnode generating error */
65 cnodeid_t ie_srcnode; /* Node which caused the error */
66 cnodeid_t ie_errnode; /* Node where error was noticed */
67 iopaddr_t ie_sysioaddr; /* Sys specific IO address */
68 iopaddr_t ie_xtalkaddr; /* Xtalk (48bit) addr of Error */
69 iopaddr_t ie_busspace; /* Bus specific address space */
70 iopaddr_t ie_busaddr; /* Bus specific address */
71 caddr_t ie_vaddr; /* Virtual address of error */
72 iopaddr_t ie_memaddr; /* Physical memory address */
73 caddr_t ie_epc; /* pc when error reported */
74 caddr_t ie_ef; /* eframe when error reported */
75 short ie_tnum; /* Xtalk TNUM field */
76 } ioerror_t;
78 #define IOERROR_INIT(e) do { (e)->ie_v.iev_a = 0; } while (0)
79 #define IOERROR_SETVALUE(e,f,v) do { (e)->ie_ ## f = (v); (e)->ie_v.iev_b.ievb_ ## f = 1; } while (0)
81 #endif /* _ASM_IA64_SN_IOERROR_H */