spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / m68k / include / asm / mvme16xhw.h
blob6117f56653d28d3c14bcbee597a552b18cf6cecd
1 #ifndef _M68K_MVME16xHW_H_
2 #define _M68K_MVME16xHW_H_
4 #include <asm/irq.h>
6 /* Board ID data structure - pointer to this retrieved from Bug by head.S */
8 /* Note, bytes 12 and 13 are board no in BCD (0162,0166,0167,0177,etc) */
10 extern long mvme_bdid_ptr;
12 typedef struct {
13 char bdid[4];
14 u_char rev, mth, day, yr;
15 u_short size, reserved;
16 u_short brdno;
17 char brdsuffix[2];
18 u_long options;
19 u_short clun, dlun, ctype, dnum;
20 u_long option2;
21 } t_bdid, *p_bdid;
24 typedef struct {
25 u_char ack_icr,
26 flt_icr,
27 sel_icr,
28 pe_icr,
29 bsy_icr,
30 spare1,
31 isr,
32 cr,
33 spare2,
34 spare3,
35 spare4,
36 data;
37 } MVMElp, *MVMElpPtr;
39 #define MVME_LPR_BASE 0xfff42030
41 #define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))
43 typedef struct {
44 unsigned char
45 ctrl,
46 bcd_sec,
47 bcd_min,
48 bcd_hr,
49 bcd_dow,
50 bcd_dom,
51 bcd_mth,
52 bcd_year;
53 } MK48T08_t, *MK48T08ptr_t;
55 #define RTC_WRITE 0x80
56 #define RTC_READ 0x40
57 #define RTC_STOP 0x20
59 #define MVME_RTC_BASE 0xfffc1ff8
61 #define MVME_I596_BASE 0xfff46000
63 #define MVME_SCC_A_ADDR 0xfff45005
64 #define MVME_SCC_B_ADDR 0xfff45001
65 #define MVME_SCC_PCLK 10000000
67 #define MVME162_IRQ_TYPE_PRIO 0
69 #define MVME167_IRQ_PRN (IRQ_USER+20)
70 #define MVME16x_IRQ_I596 (IRQ_USER+23)
71 #define MVME16x_IRQ_SCSI (IRQ_USER+21)
72 #define MVME16x_IRQ_FLY (IRQ_USER+63)
73 #define MVME167_IRQ_SER_ERR (IRQ_USER+28)
74 #define MVME167_IRQ_SER_MODEM (IRQ_USER+29)
75 #define MVME167_IRQ_SER_TX (IRQ_USER+30)
76 #define MVME167_IRQ_SER_RX (IRQ_USER+31)
77 #define MVME16x_IRQ_TIMER (IRQ_USER+25)
78 #define MVME167_IRQ_ABORT (IRQ_USER+46)
79 #define MVME162_IRQ_ABORT (IRQ_USER+30)
81 /* SCC interrupts, for MVME162 */
82 #define MVME162_IRQ_SCC_BASE (IRQ_USER+0)
83 #define MVME162_IRQ_SCCB_TX (IRQ_USER+0)
84 #define MVME162_IRQ_SCCB_STAT (IRQ_USER+2)
85 #define MVME162_IRQ_SCCB_RX (IRQ_USER+4)
86 #define MVME162_IRQ_SCCB_SPCOND (IRQ_USER+6)
87 #define MVME162_IRQ_SCCA_TX (IRQ_USER+8)
88 #define MVME162_IRQ_SCCA_STAT (IRQ_USER+10)
89 #define MVME162_IRQ_SCCA_RX (IRQ_USER+12)
90 #define MVME162_IRQ_SCCA_SPCOND (IRQ_USER+14)
92 /* MVME162 version register */
94 #define MVME162_VERSION_REG 0xfff4202e
96 extern unsigned short mvme16x_config;
98 /* Lower 8 bits must match the revision register in the MC2 chip */
100 #define MVME16x_CONFIG_SPEED_32 0x0001
101 #define MVME16x_CONFIG_NO_VMECHIP2 0x0002
102 #define MVME16x_CONFIG_NO_SCSICHIP 0x0004
103 #define MVME16x_CONFIG_NO_ETHERNET 0x0008
104 #define MVME16x_CONFIG_GOT_FPU 0x0010
106 #define MVME16x_CONFIG_GOT_LP 0x0100
107 #define MVME16x_CONFIG_GOT_CD2401 0x0200
108 #define MVME16x_CONFIG_GOT_SCCA 0x0400
109 #define MVME16x_CONFIG_GOT_SCCB 0x0800
111 #endif