spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / powerpc / boot / dts / p1010rdb.dts
blobb868d22984e961eb9c05a7d7340c8accd5ef89e0
1 /*
2  * P1010 RDB Device Tree Source
3  *
4  * Copyright 2011 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
12 /include/ "fsl/p1010si-pre.dtsi"
14 / {
15         model = "fsl,P1010RDB";
16         compatible = "fsl,P1010RDB";
18         memory {
19                 device_type = "memory";
20         };
22         board_ifc: ifc: ifc@ffe1e000 {
23                 /* NOR, NAND Flashes and CPLD on board */
24                 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
25                           0x1 0x0 0x0 0xff800000 0x00010000
26                           0x3 0x0 0x0 0xffb00000 0x00000020>;
27                 reg = <0x0 0xffe1e000 0 0x2000>;
28         };
30         board_soc: soc: soc@ffe00000 {
31                 ranges = <0x0 0x0 0xffe00000 0x100000>;
32         };
34         pci0: pcie@ffe09000 {
35                 reg = <0 0xffe09000 0 0x1000>;
36                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
37                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
38                 pcie@0 {
39                         ranges = <0x2000000 0x0 0xa0000000
40                                   0x2000000 0x0 0xa0000000
41                                   0x0 0x20000000
43                                   0x1000000 0x0 0x0
44                                   0x1000000 0x0 0x0
45                                   0x0 0x100000>;
46                 };
47         };
49         pci1: pcie@ffe0a000 {
50                 reg = <0 0xffe0a000 0 0x1000>;
51                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
52                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
53                 pcie@0 {
54                         ranges = <0x2000000 0x0 0x80000000
55                                   0x2000000 0x0 0x80000000
56                                   0x0 0x20000000
58                                   0x1000000 0x0 0x0
59                                   0x1000000 0x0 0x0
60                                   0x0 0x100000>;
61                 };
62         };
65 /include/ "p1010rdb.dtsi"
66 /include/ "fsl/p1010si-post.dtsi"